532 lines
12 KiB
C
532 lines
12 KiB
C
/*
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* omap-dmic.c -- OMAP ASoC DMIC DAI driver
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*
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* Copyright (C) 2010 - 2011 Texas Instruments
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*
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* Author: David Lambert <dlambert@ti.com>
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* Misael Lopez Cruz <misael.lopez@ti.com>
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* Liam Girdwood <lrg@ti.com>
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* Peter Ujfalusi <peter.ujfalusi@ti.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/pm_runtime.h>
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#include <linux/of_device.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/initval.h>
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#include <sound/soc.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/omap-pcm.h>
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#include "omap-dmic.h"
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struct omap_dmic {
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struct device *dev;
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void __iomem *io_base;
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struct clk *fclk;
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struct pm_qos_request pm_qos_req;
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int latency;
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int fclk_freq;
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int out_freq;
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int clk_div;
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int sysclk;
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int threshold;
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u32 ch_enabled;
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bool active;
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struct mutex mutex;
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struct snd_dmaengine_dai_dma_data dma_data;
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};
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static inline void omap_dmic_write(struct omap_dmic *dmic, u16 reg, u32 val)
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{
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writel_relaxed(val, dmic->io_base + reg);
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}
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static inline int omap_dmic_read(struct omap_dmic *dmic, u16 reg)
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{
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return readl_relaxed(dmic->io_base + reg);
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}
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static inline void omap_dmic_start(struct omap_dmic *dmic)
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{
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u32 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
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/* Configure DMA controller */
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omap_dmic_write(dmic, OMAP_DMIC_DMAENABLE_SET_REG,
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OMAP_DMIC_DMA_ENABLE);
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omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, ctrl | dmic->ch_enabled);
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}
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static inline void omap_dmic_stop(struct omap_dmic *dmic)
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{
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u32 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
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omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG,
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ctrl & ~OMAP_DMIC_UP_ENABLE_MASK);
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/* Disable DMA request generation */
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omap_dmic_write(dmic, OMAP_DMIC_DMAENABLE_CLR_REG,
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OMAP_DMIC_DMA_ENABLE);
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}
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static inline int dmic_is_enabled(struct omap_dmic *dmic)
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{
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return omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG) &
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OMAP_DMIC_UP_ENABLE_MASK;
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}
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static int omap_dmic_dai_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
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int ret = 0;
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mutex_lock(&dmic->mutex);
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if (!dai->active)
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dmic->active = 1;
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else
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ret = -EBUSY;
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mutex_unlock(&dmic->mutex);
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return ret;
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}
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static void omap_dmic_dai_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
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mutex_lock(&dmic->mutex);
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pm_qos_remove_request(&dmic->pm_qos_req);
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if (!dai->active)
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dmic->active = 0;
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mutex_unlock(&dmic->mutex);
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}
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static int omap_dmic_select_divider(struct omap_dmic *dmic, int sample_rate)
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{
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int divider = -EINVAL;
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/*
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* 192KHz rate is only supported with 19.2MHz/3.84MHz clock
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* configuration.
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*/
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if (sample_rate == 192000) {
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if (dmic->fclk_freq == 19200000 && dmic->out_freq == 3840000)
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divider = 0x6; /* Divider: 5 (192KHz sampling rate) */
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else
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dev_err(dmic->dev,
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"invalid clock configuration for 192KHz\n");
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return divider;
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}
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switch (dmic->out_freq) {
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case 1536000:
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if (dmic->fclk_freq != 24576000)
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goto div_err;
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divider = 0x4; /* Divider: 16 */
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break;
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case 2400000:
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switch (dmic->fclk_freq) {
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case 12000000:
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divider = 0x5; /* Divider: 5 */
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break;
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case 19200000:
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divider = 0x0; /* Divider: 8 */
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break;
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case 24000000:
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divider = 0x2; /* Divider: 10 */
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break;
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default:
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goto div_err;
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}
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break;
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case 3072000:
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if (dmic->fclk_freq != 24576000)
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goto div_err;
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divider = 0x3; /* Divider: 8 */
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break;
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case 3840000:
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if (dmic->fclk_freq != 19200000)
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goto div_err;
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divider = 0x1; /* Divider: 5 (96KHz sampling rate) */
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break;
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default:
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dev_err(dmic->dev, "invalid out frequency: %dHz\n",
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dmic->out_freq);
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break;
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}
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return divider;
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div_err:
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dev_err(dmic->dev, "invalid out frequency %dHz for %dHz input\n",
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dmic->out_freq, dmic->fclk_freq);
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return -EINVAL;
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}
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static int omap_dmic_dai_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
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struct snd_dmaengine_dai_dma_data *dma_data;
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int channels;
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dmic->clk_div = omap_dmic_select_divider(dmic, params_rate(params));
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if (dmic->clk_div < 0) {
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dev_err(dmic->dev, "no valid divider for %dHz from %dHz\n",
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dmic->out_freq, dmic->fclk_freq);
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return -EINVAL;
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}
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dmic->ch_enabled = 0;
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channels = params_channels(params);
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switch (channels) {
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case 6:
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dmic->ch_enabled |= OMAP_DMIC_UP3_ENABLE;
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case 4:
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dmic->ch_enabled |= OMAP_DMIC_UP2_ENABLE;
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case 2:
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dmic->ch_enabled |= OMAP_DMIC_UP1_ENABLE;
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break;
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default:
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dev_err(dmic->dev, "invalid number of legacy channels\n");
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return -EINVAL;
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}
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/* packet size is threshold * channels */
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dma_data = snd_soc_dai_get_dma_data(dai, substream);
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dma_data->maxburst = dmic->threshold * channels;
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dmic->latency = (OMAP_DMIC_THRES_MAX - dmic->threshold) * USEC_PER_SEC /
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params_rate(params);
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return 0;
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}
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static int omap_dmic_dai_prepare(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
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u32 ctrl;
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if (pm_qos_request_active(&dmic->pm_qos_req))
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pm_qos_update_request(&dmic->pm_qos_req, dmic->latency);
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/* Configure uplink threshold */
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omap_dmic_write(dmic, OMAP_DMIC_FIFO_CTRL_REG, dmic->threshold);
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ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
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/* Set dmic out format */
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ctrl &= ~(OMAP_DMIC_FORMAT | OMAP_DMIC_POLAR_MASK);
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ctrl |= (OMAP_DMICOUTFORMAT_LJUST | OMAP_DMIC_POLAR1 |
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OMAP_DMIC_POLAR2 | OMAP_DMIC_POLAR3);
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/* Configure dmic clock divider */
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ctrl &= ~OMAP_DMIC_CLK_DIV_MASK;
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ctrl |= OMAP_DMIC_CLK_DIV(dmic->clk_div);
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omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, ctrl);
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omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG,
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ctrl | OMAP_DMICOUTFORMAT_LJUST | OMAP_DMIC_POLAR1 |
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OMAP_DMIC_POLAR2 | OMAP_DMIC_POLAR3);
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return 0;
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}
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static int omap_dmic_dai_trigger(struct snd_pcm_substream *substream,
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int cmd, struct snd_soc_dai *dai)
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{
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struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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omap_dmic_start(dmic);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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omap_dmic_stop(dmic);
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break;
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default:
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break;
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}
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return 0;
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}
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static int omap_dmic_select_fclk(struct omap_dmic *dmic, int clk_id,
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unsigned int freq)
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{
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struct clk *parent_clk;
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char *parent_clk_name;
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int ret = 0;
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switch (freq) {
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case 12000000:
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case 19200000:
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case 24000000:
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case 24576000:
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break;
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default:
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dev_err(dmic->dev, "invalid input frequency: %dHz\n", freq);
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dmic->fclk_freq = 0;
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return -EINVAL;
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}
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if (dmic->sysclk == clk_id) {
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dmic->fclk_freq = freq;
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return 0;
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}
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/* re-parent not allowed if a stream is ongoing */
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if (dmic->active && dmic_is_enabled(dmic)) {
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dev_err(dmic->dev, "can't re-parent when DMIC active\n");
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return -EBUSY;
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}
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switch (clk_id) {
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case OMAP_DMIC_SYSCLK_PAD_CLKS:
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parent_clk_name = "pad_clks_ck";
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break;
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case OMAP_DMIC_SYSCLK_SLIMBLUS_CLKS:
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parent_clk_name = "slimbus_clk";
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break;
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case OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS:
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parent_clk_name = "dmic_sync_mux_ck";
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break;
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default:
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dev_err(dmic->dev, "fclk clk_id (%d) not supported\n", clk_id);
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return -EINVAL;
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}
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parent_clk = clk_get(dmic->dev, parent_clk_name);
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if (IS_ERR(parent_clk)) {
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dev_err(dmic->dev, "can't get %s\n", parent_clk_name);
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return -ENODEV;
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}
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mutex_lock(&dmic->mutex);
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if (dmic->active) {
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/* disable clock while reparenting */
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pm_runtime_put_sync(dmic->dev);
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ret = clk_set_parent(dmic->fclk, parent_clk);
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pm_runtime_get_sync(dmic->dev);
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} else {
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ret = clk_set_parent(dmic->fclk, parent_clk);
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}
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mutex_unlock(&dmic->mutex);
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if (ret < 0) {
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dev_err(dmic->dev, "re-parent failed\n");
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goto err_busy;
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}
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dmic->sysclk = clk_id;
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dmic->fclk_freq = freq;
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err_busy:
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clk_put(parent_clk);
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return ret;
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}
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static int omap_dmic_select_outclk(struct omap_dmic *dmic, int clk_id,
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unsigned int freq)
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{
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int ret = 0;
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if (clk_id != OMAP_DMIC_ABE_DMIC_CLK) {
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dev_err(dmic->dev, "output clk_id (%d) not supported\n",
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clk_id);
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return -EINVAL;
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}
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switch (freq) {
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case 1536000:
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case 2400000:
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case 3072000:
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case 3840000:
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dmic->out_freq = freq;
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break;
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default:
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dev_err(dmic->dev, "invalid out frequency: %dHz\n", freq);
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dmic->out_freq = 0;
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ret = -EINVAL;
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}
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return ret;
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}
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static int omap_dmic_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
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unsigned int freq, int dir)
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{
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struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
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if (dir == SND_SOC_CLOCK_IN)
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return omap_dmic_select_fclk(dmic, clk_id, freq);
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else if (dir == SND_SOC_CLOCK_OUT)
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return omap_dmic_select_outclk(dmic, clk_id, freq);
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dev_err(dmic->dev, "invalid clock direction (%d)\n", dir);
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return -EINVAL;
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}
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static const struct snd_soc_dai_ops omap_dmic_dai_ops = {
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.startup = omap_dmic_dai_startup,
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.shutdown = omap_dmic_dai_shutdown,
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.hw_params = omap_dmic_dai_hw_params,
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.prepare = omap_dmic_dai_prepare,
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.trigger = omap_dmic_dai_trigger,
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.set_sysclk = omap_dmic_set_dai_sysclk,
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};
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static int omap_dmic_probe(struct snd_soc_dai *dai)
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{
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struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
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pm_runtime_enable(dmic->dev);
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/* Disable lines while request is ongoing */
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pm_runtime_get_sync(dmic->dev);
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omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, 0x00);
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pm_runtime_put_sync(dmic->dev);
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/* Configure DMIC threshold value */
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dmic->threshold = OMAP_DMIC_THRES_MAX - 3;
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snd_soc_dai_init_dma_data(dai, NULL, &dmic->dma_data);
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return 0;
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}
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static int omap_dmic_remove(struct snd_soc_dai *dai)
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{
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struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
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pm_runtime_disable(dmic->dev);
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return 0;
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}
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static struct snd_soc_dai_driver omap_dmic_dai = {
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.name = "omap-dmic",
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.probe = omap_dmic_probe,
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.remove = omap_dmic_remove,
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.capture = {
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.channels_min = 2,
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.channels_max = 6,
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.rates = SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000,
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.formats = SNDRV_PCM_FMTBIT_S32_LE,
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.sig_bits = 24,
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},
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.ops = &omap_dmic_dai_ops,
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};
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static const struct snd_soc_component_driver omap_dmic_component = {
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.name = "omap-dmic",
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};
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static int asoc_dmic_probe(struct platform_device *pdev)
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{
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struct omap_dmic *dmic;
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struct resource *res;
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int ret;
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dmic = devm_kzalloc(&pdev->dev, sizeof(struct omap_dmic), GFP_KERNEL);
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if (!dmic)
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return -ENOMEM;
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platform_set_drvdata(pdev, dmic);
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dmic->dev = &pdev->dev;
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dmic->sysclk = OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS;
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mutex_init(&dmic->mutex);
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dmic->fclk = devm_clk_get(dmic->dev, "fck");
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if (IS_ERR(dmic->fclk)) {
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dev_err(dmic->dev, "cant get fck\n");
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return -ENODEV;
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}
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
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if (!res) {
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dev_err(dmic->dev, "invalid dma memory resource\n");
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return -ENODEV;
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}
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dmic->dma_data.addr = res->start + OMAP_DMIC_DATA_REG;
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dmic->dma_data.filter_data = "up_link";
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
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dmic->io_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(dmic->io_base))
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return PTR_ERR(dmic->io_base);
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ret = devm_snd_soc_register_component(&pdev->dev,
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&omap_dmic_component,
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&omap_dmic_dai, 1);
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if (ret)
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return ret;
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ret = omap_pcm_platform_register(&pdev->dev);
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if (ret)
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return ret;
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|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id omap_dmic_of_match[] = {
|
|
{ .compatible = "ti,omap4-dmic", },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, omap_dmic_of_match);
|
|
|
|
static struct platform_driver asoc_dmic_driver = {
|
|
.driver = {
|
|
.name = "omap-dmic",
|
|
.of_match_table = omap_dmic_of_match,
|
|
},
|
|
.probe = asoc_dmic_probe,
|
|
};
|
|
|
|
module_platform_driver(asoc_dmic_driver);
|
|
|
|
MODULE_ALIAS("platform:omap-dmic");
|
|
MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@ti.com>");
|
|
MODULE_DESCRIPTION("OMAP DMIC ASoC Interface");
|
|
MODULE_LICENSE("GPL");
|