105 lines
3.3 KiB
Plaintext
105 lines
3.3 KiB
Plaintext
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Analog Device ADV7511(W)/13/33 HDMI Encoders
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-----------------------------------------
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The ADV7511, ADV7511W, ADV7513 and ADV7533 are HDMI audio and video transmitters
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compatible with HDMI 1.4 and DVI 1.0. They support color space conversion,
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S/PDIF, CEC and HDCP. ADV7533 supports the DSI interface for input pixels, while
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the others support RGB interface.
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Required properties:
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- compatible: Should be one of:
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"adi,adv7511"
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"adi,adv7511w"
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"adi,adv7513"
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"adi,adv7533"
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- reg: I2C slave address
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The ADV7511 supports a large number of input data formats that differ by their
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color depth, color format, clock mode, bit justification and random
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arrangement of components on the data bus. The combination of the following
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properties describe the input and map directly to the video input tables of the
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ADV7511 datasheet that document all the supported combinations.
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- adi,input-depth: Number of bits per color component at the input (8, 10 or
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12).
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- adi,input-colorspace: The input color space, one of "rgb", "yuv422" or
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"yuv444".
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- adi,input-clock: The input clock type, one of "1x" (one clock cycle per
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pixel), "2x" (two clock cycles per pixel), "ddr" (one clock cycle per pixel,
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data driven on both edges).
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The following input format properties are required except in "rgb 1x" and
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"yuv444 1x" modes, in which case they must not be specified.
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- adi,input-style: The input components arrangement variant (1, 2 or 3), as
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listed in the input format tables in the datasheet.
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- adi,input-justification: The input bit justification ("left", "evenly",
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"right").
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The following properties are required for ADV7533:
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- adi,dsi-lanes: Number of DSI data lanes connected to the DSI host. It should
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be one of 1, 2, 3 or 4.
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Optional properties:
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- interrupts: Specifier for the ADV7511 interrupt
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- pd-gpios: Specifier for the GPIO connected to the power down signal
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- adi,clock-delay: Video data clock delay relative to the pixel clock, in ps
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(-1200 ps .. 1600 ps). Defaults to no delay.
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- adi,embedded-sync: The input uses synchronization signals embedded in the
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data stream (similar to BT.656). Defaults to separate H/V synchronization
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signals.
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- adi,disable-timing-generator: Only for ADV7533. Disables the internal timing
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generator. The chip will rely on the sync signals in the DSI data lanes,
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rather than generate its own timings for HDMI output.
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Required nodes:
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The ADV7511 has two video ports. Their connections are modelled using the OF
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graph bindings specified in Documentation/devicetree/bindings/graph.txt.
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- Video port 0 for the RGB, YUV or DSI input. In the case of ADV7533, the
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remote endpoint phandle should be a reference to a valid mipi_dsi_host device
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node.
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- Video port 1 for the HDMI output
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Example
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-------
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adv7511w: hdmi@39 {
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compatible = "adi,adv7511w";
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reg = <39>;
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interrupt-parent = <&gpio3>;
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interrupts = <29 IRQ_TYPE_EDGE_FALLING>;
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adi,input-depth = <8>;
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adi,input-colorspace = "rgb";
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adi,input-clock = "1x";
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adi,input-style = <1>;
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adi,input-justification = "evenly";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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adv7511w_in: endpoint {
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remote-endpoint = <&dpi_out>;
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};
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};
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port@1 {
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reg = <1>;
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adv7511_out: endpoint {
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remote-endpoint = <&hdmi_connector_in>;
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};
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};
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};
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};
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