167 lines
7.8 KiB
Plaintext
167 lines
7.8 KiB
Plaintext
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Device tree binding for NVIDIA Tegra XUSB host mode controller (XHCI)
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============================
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The Tegra xHCI controller complies to xHCI specifications which supports
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both USB 2.0 HighSpeed/FullSpeed/LowSpeed and USB 3.0 SuperSpeed protocols.
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Required properties:
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--------------------
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- compatible: For Tegra124, must be "nvidia,tegra124-xusb".
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For Tegra186, must be "nvidia,tegra186-xhci".
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For Tegra194, must be "nvidia,tegra194-xhci".
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For Tegra210, must be "nvidia,tegra210-xhci".
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For Tegra210b01, must be "nvidia,tegra210b01-xhci".
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- reg: For Tegra124, Tegra210 and Tegra210b01, must contain the base and length of
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the xHCI host registers, XUSB FPCI registers and XUSB IPFS registers.
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For Tegra186 and Tegra194, must contain the base and length of the xHCI host
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registers, XUSB FPCI registers.
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- interrupts: Must contain the xHCI host interrupt, the mailbox interrupt and the
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padctl interrupt.
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- interrupt-parent: For Tegra186 and Tegra194, must be the parent's entry of the
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xHCI interrupt, the mailbox interrupt and the padctl interrupt.
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- clocks: Must contain an entry for each entry in clock-names.
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See ../clock/clock-bindings.txt for details.
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- clock-names: Must include the following entries:
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- xusb_host
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- xusb_falcon_src
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- xusb_ss
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- xusb_ss_src
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- xusb_hs_src
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- xusb_fs_src
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- pll_u_480m
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- clk_m
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- pll_e
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- iommus: phandle and IOMMU specifier for the IOMMU that serves the XUSB host.
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See ../iommu/iommu.txt for details.
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Required properties for Tegra xhci:
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---------------------------------
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- nvidia,xusb-padctl: phandle to the XUSB pad controller that is used to
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configure the USB pads used by the XHCI controller.
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- phys: Must contain an entry for each entry in phy-names.
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See ../phy/phy-bindings.txt for details.
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- phy-names: Must contain an entry for each PHY used by the controller.
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Names must be of the form <type>-<port_number>, where <type> is "usb2" or "usb3".
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and <port number> is a 0-based index. The following PHYs are available:
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- Tegra124: usb2-0, usb2-1, usb2-2, usb2-3, hsic-0, hsic-1, usb3-0, usb3-1
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- Tegra186: usb2-0, usb2-1, usb2-2, hsic-0, usb3-0, usb3-1, usb3-2
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- Tegra194: usb2-0, usb2-1, usb2-2, usb2-3, usb3-0, usb3-1, usb3-2, usb3-3
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- Tegra210: usb2-0, usb2-1, usb2-2, usb2-3, hsic-0, usb3-0, usb3-1, usb3-2, usb3-3
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- Tegra210b01: usb2-0, usb2-1, usb2-2, usb2-3, hsic-0, usb3-0, usb3-1, usb3-2, usb3-3
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For Tegra124:
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- avddio-pex-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
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- dvddio-pex-supply: PCIe/USB3 digital logic power supply. Must supply 1.05 V.
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- avdd-usb-supply: USB controller power supply. Must supply 3.3 V.
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- avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.
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- avdd-pll-erefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.
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- avdd-usb-ss-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V.
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- hvdd-usb-ss-supply: High-voltage PCIe/USB3 power supply. Must supply 3.3 V.
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- hvdd-usb-ss-pll-e-supply: High-voltage PLLE power supply. Must supply 3.3 V.
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For Tegra210:
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- hvdd_usb-supply: PEX USB 3.0 pads power supply. Must supply 1.8 V.
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- avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.
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- vddio_hsic-supply: HSIC regulator supply for HSIC rail. Must supply 1.8 V.
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- avddio-usb-supply: USB 2.0 pads power supply. Must supply 3.3 V.
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- dvdd_sata-supply: SATA digital logic power supply. Must supply 1.05 V.
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- avddio-pll-uerefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.
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For Tegra210b01:
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- hvdd_usb-supply: PEX USB 3.0 pads power supply. Must supply 1.8 V.
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- avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.
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- avddio-usb-supply: USB 2.0 pads power supply. Must supply 3.3 V.
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- avddio-pll-uerefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.
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Optional properties:
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--------------------
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- extcon-cables: OTG support. Must contains an excon-cable entry which detects
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USB ID pin. See ../extcon/extcon-gpio-states.txt for details.
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When the extcon cable state is 1, OTG port will transition to host mode.
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- extcon-cable-names: Must be "id".
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- nvidia,boost_cpu_freq: Specifies the value to which CPU frequency is boosted.
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This is only the minimum frequency; DVFS can scale up CPU frequency further
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based on need and CPU loading. CPU boost frequency through PMQOS is enabled
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for the xHCI controller only when this field’s value is greater than zero.
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The boost is applicable only for bulk and ISOC transfers; other endpoints do
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not need to be boosted.
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Example :
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Before boosting on Quill-prod:
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Output of "cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq"
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345600
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2419200
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2419200
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345600
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345600
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345600
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After boosting on QUill-prod: (nvidia,boost_cpu_freq = <800>)
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Output of "cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq"
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806400
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2419200
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2419200
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806400
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806400
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806400
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- nvidia,boost_cpu_trigger: Minimum buffer length of the bulk or isoc transfers
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beyond which we boost frequency. This field is applicable only if
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"nvidia,boost_cpu_freq" > 0. This field should be > 16384(16KB), else driver
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will use default 16384.
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- nvidia,boost_emc_freq: Set the value which EMC frequency will be requested.
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XHCI controller will request EMC bandwidth through BWMGR for Bulk and Isoc
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transfers.
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For Tegra210 and Tegra210b01:
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- nvidia,pmc-wakeup: The PMC is the only device that can wake up the system from
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deep sleep mode (i.e. LP0). There are some wake up events in the PMC wake mask
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register that can be used to trigger PMC to wake up the system. The PMC wake mask
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register defines which devices or siganls can be the source to trigger the PMC
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waking up. If the devices support waking up the system from deep sleep mode, then
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it needs to describe a property for PMC wake up events. This property defines the usage.
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The entries should be of the form <pmc_phandle event_type event_offset trigger_type>
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pmc_phandle: the phandle of PMC device tree node
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event_type: 0 = PMC_WAKE_TYPE_GPIO
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1 = PMC_WAKE_TYPE_EVENT
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event_offset: the offset of PMC wake mask register
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trigger_type: set 0 when event_type is PMC_WAKE_TYPE_GPIO
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if event_type is PMC_WAKE_TYPE_EVENT
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0 = PMC_TRIGGER_TYPE_NONE
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1 = PMC_TRIGGER_TYPE_RISING
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2 = PMC_TRIGGER_TYPE_FALLING
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4 = PMC_TRIGGER_TYPE_HIGH
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8 = PMC_TRIGGER_TYPE_LOW
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The assignments of event_type and trigger_type can be found in header file <dt-bindings/soc/tegra-pmc.h>.
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Example:
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--------
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xhci@3530000 {
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compatible = "nvidia,tegra186-xhci";
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reg = <0x0 0x03530000 0x0 0x8000>,
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<0x0 0x03538000 0x0 0x1000>;
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interrupts = <0 163 0x4>, <0 164 0x4>, <0 167 0x4>;
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interrupt-parent = <&pm_irq>;
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clocks = <&tegra_car TEGRA186_CLK_XUSB_HOST>,
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<&tegra_car TEGRA186_CLK_XUSB_FALCON>,
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<&tegra_car TEGRA186_CLK_XUSB_SS>,
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<&tegra_car TEGRA186_CLK_XUSB_CORE_SS>,
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<&tegra_car TEGRA186_CLK_CLK_M>,
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<&tegra_car TEGRA186_CLK_XUSB_FS>,
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<&tegra_car TEGRA186_CLK_PLLU>,
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<&tegra_car TEGRA186_CLK_CLK_M>,
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<&tegra_car TEGRA186_CLK_PLLE>;
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clock-names = "xusb_host", "xusb_falcon_src", "xusb_ss", "xusb_ss_src", "xusb_hs_src", "xusb_fs_src", "pll_u_480m", "clk_m", "pll_e";
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iommus = <&smmu TEGRA_SID_XUSB_HOST>;
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iommu_sodev_map;
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nvidia,xusb-padctl = <&xusb_padctl>;
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phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>, /* USB 2.0 micro-AB, J20 */
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<&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-1}>, /* USB 3.0 STD-A, J19 */
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<&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-1}>; /* USB 3.0 STD-A, J19 */
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phy-names = "usb2-0", "usb2-1", "usb3-1";
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extcon-cables = <&vbus_id_extcon 1>;
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extcon-cable-names = "id";
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#extcon-cells = <1>;
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nvidia,boost_cpu_freq = <800>;
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nvidia,boost_cpu_trigger = <18432>;
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};
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