560 lines
14 KiB
C
560 lines
14 KiB
C
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/*
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* Tegra NVDEC Module Support
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*
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* Copyright (c) 2013-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/slab.h> /* for kzalloc */
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#include <linux/firmware.h>
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#include <linux/module.h>
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#include <linux/fs.h>
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#include <linux/nvhost.h>
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#include <linux/pm_runtime.h>
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#include <linux/clk/tegra.h>
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#include <asm/byteorder.h> /* for parsing ucode image wrt endianness */
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#include <linux/delay.h> /* for udelay */
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#include <linux/scatterlist.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_platform.h>
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#include <linux/dma-mapping.h>
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#include <soc/tegra/chip-id.h>
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#include <linux/version.h>
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#include <linux/tegra_pm_domains.h>
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#include <uapi/linux/nvhost_nvdec_ioctl.h>
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#include <linux/platform/tegra/mc.h>
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#include "dev.h"
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#include "nvdec.h"
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#include "nvhost_vm.h"
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#include "hw_nvdec.h"
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#include "bus_client.h"
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#include "nvhost_acm.h"
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#include "nvhost_scale.h"
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#include "chip_support.h"
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#include "t124/t124.h"
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#include "t210/t210.h"
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#include "iomap.h"
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#if defined(CONFIG_TRUSTED_LITTLE_KERNEL) || defined(CONFIG_TRUSTY)
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#include <linux/ote_protocol.h>
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#endif
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#ifdef CONFIG_ARCH_TEGRA_18x_SOC
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#include "t186/t186.h"
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#endif
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#ifdef CONFIG_TEGRA_T19X_GRHOST
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#include "t194/t194.h"
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#endif
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#define FW_NAME_SIZE 32
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static inline struct flcn **get_nvdec(struct platform_device *dev)
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{
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return (struct flcn **)nvhost_get_falcon_data(dev);
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}
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static inline void set_nvdec(struct platform_device *dev, struct flcn **flcn)
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{
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nvhost_set_falcon_data(dev, flcn);
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}
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static int nvhost_nvdec_init_sw(struct platform_device *dev);
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static unsigned int tegra_nvdec_enabled_in_bootcmd = -1;
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static unsigned int tegra_nvdec_bootloader_enabled;
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static int nvdec_get_bl_fw_name(struct platform_device *pdev, char *name)
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{
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u8 maj, min;
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struct nvhost_device_data *pdata = platform_get_drvdata(pdev);
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u32 debug_mode = host1x_readl(pdev, nvdec_scp_ctl_stat_r()) &
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nvdec_scp_ctl_stat_debug_mode_m();
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bool sim_mode = tegra_platform_is_qt() || tegra_platform_is_vdk();
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nvdec_decode_ver(pdata->version, &maj, &min);
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if (!tegra_nvdec_bootloader_enabled) {
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snprintf(name, FW_NAME_SIZE, "nvhost_nvdec0%d%d_ns.fw",
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maj, min);
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return 0;
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}
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if (sim_mode && debug_mode) {
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snprintf(name, FW_NAME_SIZE, "nvhost_nvdec_bl_no_wpr0%d%d.fw",
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maj, min);
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} else if (sim_mode && !debug_mode) {
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dev_info(&pdev->dev, "Prod + No-WPR not allowed\n");
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return -EINVAL;
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} else if (debug_mode) {
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snprintf(name, FW_NAME_SIZE, "nvhost_nvdec_bl0%d%d.fw",
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maj, min);
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} else {
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snprintf(name, FW_NAME_SIZE, "nvhost_nvdec_bl0%d%d_prod.fw",
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maj, min);
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}
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dev_info(&pdev->dev, "fw name:%s\n", name);
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return 0;
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}
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static void nvdec_get_fw_name(struct platform_device *pdev, char *name)
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{
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u8 maj, min;
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struct nvhost_device_data *pdata = platform_get_drvdata(pdev);
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u32 debug_mode = host1x_readl(pdev, nvdec_scp_ctl_stat_r()) &
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nvdec_scp_ctl_stat_debug_mode_m();
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nvdec_decode_ver(pdata->version, &maj, &min);
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if (debug_mode)
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snprintf(name, FW_NAME_SIZE, "nvhost_nvdec0%d%d.fw", maj, min);
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else
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snprintf(name, FW_NAME_SIZE, "nvhost_nvdec0%d%d_prod.fw", maj,
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min);
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dev_info(&pdev->dev, "fw name:%s\n", name);
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}
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static int nvhost_nvdec_bl_init(struct platform_device *dev)
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{
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u32 fb_data_offset = 0;
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struct flcn **m = get_nvdec(dev);
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struct nvdec_bl_shared_data shared_data = {0};
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u32 debug = host1x_readl(dev,
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nvdec_scp_ctl_stat_r()) &
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nvdec_scp_ctl_stat_debug_mode_m();
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bool skip_wpr_settings = debug &&
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(tegra_platform_is_qt() || tegra_platform_is_vdk());
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/*
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* debuginfo is cleared by the firmware on boot, write a dummy
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* value here so that a successful boot can be detected.
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*/
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host1x_writel(dev, nvdec_debuginfo_r(), 0xDEADBEEF);
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fb_data_offset = (m[0]->os.bin_data_offset +
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m[0]->os.data_offset) / (sizeof(u32));
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shared_data.ls_fw_start_addr = m[1]->dma_addr >> 8;
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shared_data.ls_fw_size = m[1]->size;
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/* no wpr firmware does not need these */
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if (!skip_wpr_settings) {
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struct mc_carveout_info inf;
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int ret;
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ret = mc_get_carveout_info(&inf, NULL,
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MC_SECURITY_CARVEOUT1);
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if (ret) {
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dev_err(&dev->dev, "carveout memory allocation failed");
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return -ENOMEM;
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}
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/* Put the 40-bit addr formed by wpr_addr_hi and
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wpr_addr_lo divided by 256 into 32-bit wpr_addr */
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shared_data.wpr_addr = inf.base >> 8;
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shared_data.wpr_size = inf.size; /* Already in bytes. */
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}
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/* store fw start address for nvdec bl to read */
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memcpy(&(m[0]->mapped[fb_data_offset]), &shared_data,
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sizeof(shared_data));
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return 0;
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}
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int nvhost_nvdec_finalize_poweron(struct platform_device *dev)
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{
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struct nvhost_device_data *pdata = platform_get_drvdata(dev);
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int err = 0;
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struct flcn **m;
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dev_dbg(&dev->dev, "flcn_boot: start\n");
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err = nvhost_nvdec_init_sw(dev);
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if (err)
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return err;
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m = get_nvdec(dev);
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err = nvhost_flcn_wait_mem_scrubbing(dev);
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if (err)
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return err;
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/* load transcfg configuration if defined */
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if (pdata->transcfg_addr)
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host1x_writel(dev, pdata->transcfg_addr, pdata->transcfg_val);
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if (tegra_nvdec_bootloader_enabled) {
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err = nvhost_nvdec_bl_init(dev);
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if (err)
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return err;
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}
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err = nvhost_flcn_load_image(dev, m[0]->dma_addr, &m[0]->os, 0);
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if (err)
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return err;
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nvhost_flcn_irq_mask_set(dev);
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nvhost_flcn_irq_dest_set(dev);
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nvhost_flcn_ctxtsw_init(dev);
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nvhost_flcn_start(dev, 0);
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if (tegra_nvdec_bootloader_enabled) {
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u32 debuginfo = host1x_readl(dev, nvdec_debuginfo_r());
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/* Must be zero for successful boot */
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if (debuginfo) {
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dev_err(&dev->dev, "boot failed, debuginfo=%x",
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debuginfo);
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return -ETIMEDOUT;
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}
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}
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dev_dbg(&dev->dev, "flcn_boot: success\n");
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#if defined(CONFIG_TRUSTED_LITTLE_KERNEL)
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tlk_restore_keyslots();
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#endif
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#if defined(CONFIG_TRUSTY)
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trusty_restore_keyslots();
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#endif
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return 0;
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}
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static int nvdec_read_ucode(struct platform_device *dev,
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const char *fw_name,
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struct flcn *m)
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{
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const struct firmware *ucode_fw;
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struct ucode_v1_flcn ucode;
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int err;
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DEFINE_DMA_ATTRS(attrs);
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dma_set_attr(DMA_ATTR_READ_ONLY, __DMA_ATTR(attrs));
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m->dma_addr = 0;
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m->mapped = NULL;
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ucode_fw = nvhost_client_request_firmware(dev, fw_name);
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if (!ucode_fw) {
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dev_err(&dev->dev, "failed to get nvdec firmware %s\n",
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fw_name);
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err = -ENOENT;
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return err;
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}
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m->size = ucode_fw->size;
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m->mapped = dma_alloc_attrs(&dev->dev, m->size, &m->dma_addr,
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GFP_KERNEL, __DMA_ATTR(attrs));
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if (!m->mapped) {
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dev_err(&dev->dev, "dma memory allocation failed");
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err = -ENOMEM;
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goto clean_up;
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}
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err = flcn_setup_ucode_image(dev, m, ucode_fw, &ucode);
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if (err) {
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dev_err(&dev->dev, "failed to parse firmware image %s\n",
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fw_name);
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goto clean_up;
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}
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m->valid = true;
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release_firmware(ucode_fw);
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return 0;
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clean_up:
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if (m->mapped) {
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dma_free_attrs(&dev->dev, m->size, m->mapped, m->dma_addr,
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__DMA_ATTR(attrs));
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m->mapped = NULL;
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m->dma_addr = 0;
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}
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release_firmware(ucode_fw);
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return err;
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}
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static int nvhost_nvdec_init_sw(struct platform_device *dev)
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{
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int err = 0;
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struct flcn **m = get_nvdec(dev);
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char fw_name[2][FW_NAME_SIZE];
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int i;
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nvhost_dbg_fn("in dev:%p", dev);
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/* check if firmware resources already allocated */
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if (m)
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return 0;
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err = nvdec_get_bl_fw_name(dev, fw_name[0]);
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if (err)
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return -EINVAL;
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if (tegra_nvdec_bootloader_enabled)
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nvdec_get_fw_name(dev, fw_name[1]);
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m = kzalloc(2 * sizeof(struct flcn *), GFP_KERNEL);
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if (!m) {
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dev_err(&dev->dev, "couldn't allocate ucode ptr");
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return -ENOMEM;
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}
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set_nvdec(dev, m);
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nvhost_dbg_fn("primed dev:%p", dev);
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for (i = 0; i < (1 + tegra_nvdec_bootloader_enabled); i++) {
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m[i] = kzalloc(sizeof(struct flcn), GFP_KERNEL);
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if (!m[i]) {
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dev_err(&dev->dev, "couldn't alloc ucode");
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err = -ENOMEM;
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goto err_ucode;
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}
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err = nvdec_read_ucode(dev, fw_name[i], m[i]);
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if (err || !m[i]->valid) {
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dev_err(&dev->dev, "ucode not valid");
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goto err_ucode;
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}
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}
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return 0;
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err_ucode:
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kfree(m[0]);
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kfree(m[1]);
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return err;
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}
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static struct of_device_id tegra_nvdec_of_match[] = {
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#ifdef TEGRA_21X_OR_HIGHER_CONFIG
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{ .compatible = "nvidia,tegra210-nvdec",
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.data = (struct nvhost_device_data *)&t21_nvdec_info },
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#endif
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#ifdef CONFIG_ARCH_TEGRA_18x_SOC
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{ .compatible = "nvidia,tegra186-nvdec",
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.data = (struct nvhost_device_data *)&t18_nvdec_info },
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#endif
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#ifdef CONFIG_TEGRA_T19X_GRHOST
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{ .compatible = "nvidia,tegra194-nvdec",
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.data = (struct nvhost_device_data *)&t19_nvdec_info,
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.name = "nvdec" },
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{ .compatible = "nvidia,tegra194-nvdec",
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.data = (struct nvhost_device_data *)&t19_nvdec1_info,
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.name = "nvdec1" },
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#endif
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{ },
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};
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static int nvdec_open(struct inode *inode, struct file *file)
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{
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struct nvhost_device_data *pdata;
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struct nvdec_private *priv;
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pdata = container_of(inode->i_cdev,
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struct nvhost_device_data, ctrl_cdev);
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if (WARN_ONCE(pdata == NULL,
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"pdata not found, %s failed\n", __func__))
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return -ENODEV;
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if (WARN_ONCE(pdata->pdev == NULL,
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"device not found, %s failed\n", __func__))
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return -ENODEV;
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priv = kzalloc(sizeof(struct nvdec_private), GFP_KERNEL);
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if (!priv) {
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dev_err(&pdata->pdev->dev,
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"couldn't allocate nvdec private");
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return -ENOMEM;
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}
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priv->pdev = pdata->pdev;
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atomic_set(&priv->refcnt, 0);
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file->private_data = priv;
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return 0;
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}
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static long nvdec_ioctl(struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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struct nvdec_private *priv = file->private_data;
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struct platform_device *pdev = priv->pdev;
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int err;
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if (WARN_ONCE(pdev == NULL, "pdata not found, %s failed\n", __func__))
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return -ENODEV;
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if (_IOC_TYPE(cmd) != NVHOST_NVDEC_IOCTL_MAGIC)
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return -EFAULT;
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switch (cmd) {
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case NVHOST_NVDEC_IOCTL_POWERON:
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err = nvhost_module_busy(pdev);
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if (err)
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return err;
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atomic_inc(&priv->refcnt);
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break;
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case NVHOST_NVDEC_IOCTL_POWEROFF:
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if (atomic_dec_if_positive(&priv->refcnt) >= 0)
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nvhost_module_idle(pdev);
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break;
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default:
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dev_err(&pdev->dev,
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"%s: Unknown nvdec ioctl.\n", __func__);
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return -EINVAL;
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}
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return 0;
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}
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static int nvdec_release(struct inode *inode, struct file *file)
|
||
|
{
|
||
|
struct nvdec_private *priv = file->private_data;
|
||
|
|
||
|
nvhost_module_idle_mult(priv->pdev, atomic_read(&priv->refcnt));
|
||
|
kfree(priv);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
static int nvdec_probe(struct platform_device *dev)
|
||
|
{
|
||
|
int err = 0;
|
||
|
struct nvhost_device_data *pdata = NULL;
|
||
|
|
||
|
if (dev->dev.of_node) {
|
||
|
const struct of_device_id *match;
|
||
|
|
||
|
match = of_match_device(tegra_nvdec_of_match, &dev->dev);
|
||
|
if (match)
|
||
|
pdata = (struct nvhost_device_data *)match->data;
|
||
|
} else
|
||
|
pdata = (struct nvhost_device_data *)dev->dev.platform_data;
|
||
|
|
||
|
WARN_ON(!pdata);
|
||
|
if (!pdata) {
|
||
|
dev_info(&dev->dev, "no platform data\n");
|
||
|
return -ENODATA;
|
||
|
}
|
||
|
|
||
|
pdata->pdev = dev;
|
||
|
|
||
|
if (tegra_platform_is_sim() && tegra_get_chip_id() == TEGRA194) {
|
||
|
dev_info(&dev->dev, "context isolation disabled on simulator");
|
||
|
pdata->isolate_contexts = false;
|
||
|
}
|
||
|
|
||
|
mutex_init(&pdata->lock);
|
||
|
|
||
|
platform_set_drvdata(dev, pdata);
|
||
|
|
||
|
err = nvhost_client_device_get_resources(dev);
|
||
|
if (err)
|
||
|
return err;
|
||
|
|
||
|
dev->dev.platform_data = NULL;
|
||
|
|
||
|
/* get the module clocks to sane state */
|
||
|
nvhost_module_init(dev);
|
||
|
|
||
|
err = nvhost_client_device_init(dev);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static int __exit nvdec_remove(struct platform_device *dev)
|
||
|
{
|
||
|
nvhost_client_device_release(dev);
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static struct platform_driver nvdec_driver = {
|
||
|
.probe = nvdec_probe,
|
||
|
.remove = __exit_p(nvdec_remove),
|
||
|
.driver = {
|
||
|
.owner = THIS_MODULE,
|
||
|
.name = "nvdec",
|
||
|
#ifdef CONFIG_OF
|
||
|
.of_match_table = tegra_nvdec_of_match,
|
||
|
#endif
|
||
|
#ifdef CONFIG_PM
|
||
|
.pm = &nvhost_module_pm_ops,
|
||
|
#endif
|
||
|
.suppress_bind_attrs = true,
|
||
|
}
|
||
|
};
|
||
|
|
||
|
const struct file_operations tegra_nvdec_ctrl_ops = {
|
||
|
.owner = THIS_MODULE,
|
||
|
.open = nvdec_open,
|
||
|
.unlocked_ioctl = nvdec_ioctl,
|
||
|
#ifdef CONFIG_COMPAT
|
||
|
.compat_ioctl = nvdec_ioctl,
|
||
|
#endif
|
||
|
.release = nvdec_release,
|
||
|
};
|
||
|
|
||
|
static struct of_device_id tegra_nvdec_domain_match[] = {
|
||
|
#ifdef TEGRA_21X_OR_HIGHER_CONFIG
|
||
|
{ .compatible = "nvidia,tegra210-nvdec-pd",
|
||
|
.data = (struct nvhost_device_data *)&t21_nvdec_info},
|
||
|
#endif
|
||
|
#ifdef CONFIG_ARCH_TEGRA_18x_SOC
|
||
|
{ .compatible = "nvidia,tegra186-nvdec-pd",
|
||
|
.data = (struct nvhost_device_data *)&t18_nvdec_info},
|
||
|
#endif
|
||
|
#ifdef CONFIG_TEGRA_T19X_GRHOST
|
||
|
{.compatible = "nvidia,tegra194-nvdec1-pd",
|
||
|
.data = (struct nvhost_device_data *)&t19_nvdec1_info},
|
||
|
#endif
|
||
|
{},
|
||
|
};
|
||
|
|
||
|
static int __init tegra_nvdec_bootloader_enabled_arg(char *options)
|
||
|
{
|
||
|
char *p = options;
|
||
|
|
||
|
tegra_nvdec_enabled_in_bootcmd = memparse(p, &p);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
early_param("nvdec_enabled", tegra_nvdec_bootloader_enabled_arg);
|
||
|
|
||
|
static int __init nvdec_init(void)
|
||
|
{
|
||
|
int ret;
|
||
|
|
||
|
if (tegra_nvdec_enabled_in_bootcmd != -1) {
|
||
|
/* If "nvdec_enabled" exists in kernel boot command,
|
||
|
tegra_nvdec_bootloader_enabled is updated with that value */
|
||
|
tegra_nvdec_bootloader_enabled = tegra_nvdec_enabled_in_bootcmd;
|
||
|
} else {
|
||
|
/* Below kernel config check is for T210 */
|
||
|
if (IS_ENABLED(CONFIG_NVDEC_BOOTLOADER))
|
||
|
tegra_nvdec_bootloader_enabled = 1;
|
||
|
}
|
||
|
|
||
|
ret = nvhost_domain_init(tegra_nvdec_domain_match);
|
||
|
if (ret)
|
||
|
return ret;
|
||
|
|
||
|
return platform_driver_register(&nvdec_driver);
|
||
|
}
|
||
|
|
||
|
static void __exit nvdec_exit(void)
|
||
|
{
|
||
|
platform_driver_unregister(&nvdec_driver);
|
||
|
}
|
||
|
|
||
|
module_init(nvdec_init);
|
||
|
module_exit(nvdec_exit);
|