209 lines
7.5 KiB
Plaintext
209 lines
7.5 KiB
Plaintext
/*
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* tegra210b01-soc-prod.dtsi: SOC specific DTSI file Prod nodes.
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*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#define SOR_NV_PDISP_SOR_PLL0 0x5C
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#define SOR_NV_PDISP_SOR_PLL1 0x60
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#define SOR_NV_PDISP_SOR_PLL2 0x64
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#define SOR_NV_PDISP_SOR_PLL3 0x68
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#define SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0x138
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#define SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0x148
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#define SOR_NV_PDISP_SOR_DP_PADCTL0 0x170
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#define SOR_NV_PDISP_SOR_DP_PADCTL2 0x1CC
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/ {
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host1x {
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sor1 {
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prod-settings {
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#prod-cells = <3>;
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prod_list_hdmi_soc = "prod_c_hdmi_0m_54m", "prod_c_hdmi_54m_111m",
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"prod_c_hdmi_111m_223m", "prod_c_hdmi_223m_300m",
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"prod_c_hdmi_300m_600m";
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prod_c_hdmi_0m_54m {
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asic {
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prod = <0x000003a0 0x00000002 0x00000002>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x2 */
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};
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char {
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prod = <
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SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050100
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SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
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SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
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SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
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SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333A3A3A
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SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
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SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x401000
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SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x54000000
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>;
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};
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};
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prod_c_hdmi_54m_111m {
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asic {
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prod = <0x000003a0 0x00000002 0x00000002>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x2 */
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};
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char {
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prod = <
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SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050100
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SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
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SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
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SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
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SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333A3A3A
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SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
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SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x404000
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SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x44000000
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>;
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};
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};
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prod_c_hdmi_111m_223m {
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asic {
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prod = <0x000003a0 0x00000002 0x00000000>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x2 */
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};
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char {
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prod = <
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SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050300
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SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
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SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
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SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
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SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333A3A3A
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SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
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SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x406600
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SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x34000000
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>;
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};
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};
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prod_c_hdmi_223m_300m {
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asic {
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prod = <0x000003a0 0x00000002 0x00000000>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x0 */
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};
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char {
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prod = <
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SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050300
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SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
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SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
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SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
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SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333F3F3F
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SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
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SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x406600
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SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x34000000
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>;
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};
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};
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prod_c_hdmi_300m_600m {
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asic {
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prod = <0x000003a0 0x00000002 0x00000002>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x0 */
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};
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char {
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prod = <
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SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050300
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SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
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SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
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SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
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SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333F3F3F
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SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
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SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x406600
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SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x34000000
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>;
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};
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};
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/* HDMI prod-settings for fall-back to old DT config
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* when prod_list_hdmi_soc/board are not found */
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prod_c_54M {
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asic {
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prod = <0x000003a0 0x00000002 0x00000002>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x2 */
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};
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char {
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prod = <
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SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050100
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SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
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SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
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SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
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SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333A3A3A
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SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
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SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x401000
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SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x54000000
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>;
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};
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};
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prod_c_75M {
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asic {
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prod = <0x000003a0 0x00000002 0x00000002>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x2 */
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};
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char {
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prod = <
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SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050100
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SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
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SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
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SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
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SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333A3A3A
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SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
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SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x404000
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SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x44000000
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>;
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};
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};
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prod_c_150M {
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asic {
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prod = <0x000003a0 0x00000002 0x00000000>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x2 */
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};
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char {
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prod = <
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SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050300
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SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
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SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
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SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
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SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333A3A3A
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SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
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SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x406600
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SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x34000000
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>;
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};
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};
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prod_c_300M {
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asic {
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prod = <0x000003a0 0x00000002 0x00000000>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x0 */
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};
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char {
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prod = <
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SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050300
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SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
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SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
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SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
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SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333F3F3F
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SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
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SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x406600
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SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x34000000
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>;
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};
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};
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prod_c_600M {
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asic {
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prod = <0x000003a0 0x00000002 0x00000002>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x0 */
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};
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char {
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prod = <
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SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050300
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SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
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SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
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SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
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SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333F3F3F
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SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
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SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x406600
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SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x34000000
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>;
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};
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};
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};
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};
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};
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};
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