59 lines
1.1 KiB
Plaintext
59 lines
1.1 KiB
Plaintext
Oxford Semiconductor OXNAS SoC Family RESET Controller
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================================================
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Please also refer to reset.txt in this directory for common reset
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controller binding usage.
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Required properties:
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- compatible: Should be "oxsemi,ox810se-reset"
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- #reset-cells: 1, see below
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Parent node should have the following properties :
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- compatible: Should be "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd"
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For OX810SE, the indices are :
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- 0 : ARM
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- 1 : COPRO
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- 2 : Reserved
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- 3 : Reserved
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- 4 : USBHS
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- 5 : USBHSPHY
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- 6 : MAC
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- 7 : PCI
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- 8 : DMA
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- 9 : DPE
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- 10 : DDR
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- 11 : SATA
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- 12 : SATA_LINK
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- 13 : SATA_PHY
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- 14 : Reserved
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- 15 : NAND
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- 16 : GPIO
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- 17 : UART1
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- 18 : UART2
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- 19 : MISC
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- 20 : I2S
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- 21 : AHB_MON
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- 22 : UART3
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- 23 : UART4
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- 24 : SGDMA
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- 25 : Reserved
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- 26 : Reserved
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- 27 : Reserved
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- 28 : Reserved
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- 29 : Reserved
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- 30 : Reserved
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- 31 : BUS
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example:
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sys: sys-ctrl@000000 {
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compatible = "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd";
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reg = <0x000000 0x100000>;
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reset: reset-controller {
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compatible = "oxsemi,ox810se-reset";
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#reset-cells = <1>;
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};
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};
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