Merge upstream changes from Marlin 2.1.2
This commit is contained in:
@@ -526,23 +526,22 @@ void SPIClass::onReceive(void(*callback)()) {
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_currentSetting->receiveCallback = callback;
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if (callback) {
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switch (_currentSetting->spi_d->clk_id) {
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#if BOARD_NR_SPI >= 1
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case RCC_SPI1:
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dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi1EventCallback);
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break;
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#endif
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#if BOARD_NR_SPI >= 2
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case RCC_SPI2:
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dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi2EventCallback);
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break;
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#endif
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#if BOARD_NR_SPI >= 3
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case RCC_SPI3:
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dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi3EventCallback);
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break;
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#endif
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default:
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ASSERT(0);
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#if BOARD_NR_SPI >= 1
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case RCC_SPI1:
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dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi1EventCallback);
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break;
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#endif
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#if BOARD_NR_SPI >= 2
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case RCC_SPI2:
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dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi2EventCallback);
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break;
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#endif
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#if BOARD_NR_SPI >= 3
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case RCC_SPI3:
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dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi3EventCallback);
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break;
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#endif
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default: ASSERT(0);
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}
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}
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else {
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@@ -554,23 +553,22 @@ void SPIClass::onTransmit(void(*callback)()) {
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_currentSetting->transmitCallback = callback;
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if (callback) {
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switch (_currentSetting->spi_d->clk_id) {
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#if BOARD_NR_SPI >= 1
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case RCC_SPI1:
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dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi1EventCallback);
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break;
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#endif
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#if BOARD_NR_SPI >= 2
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case RCC_SPI2:
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dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi2EventCallback);
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break;
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#endif
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#if BOARD_NR_SPI >= 3
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case RCC_SPI3:
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dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi3EventCallback);
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break;
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#endif
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default:
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ASSERT(0);
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#if BOARD_NR_SPI >= 1
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case RCC_SPI1:
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dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi1EventCallback);
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break;
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#endif
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#if BOARD_NR_SPI >= 2
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case RCC_SPI2:
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dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi2EventCallback);
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break;
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#endif
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#if BOARD_NR_SPI >= 3
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case RCC_SPI3:
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dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi3EventCallback);
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break;
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#endif
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default: ASSERT(0);
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}
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}
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else {
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@@ -33,6 +33,15 @@
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#include <stdint.h>
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#include <wirish.h>
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// Number of SPI ports
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#ifdef BOARD_SPI3_SCK_PIN
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#define BOARD_NR_SPI 3
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#elif defined(BOARD_SPI2_SCK_PIN)
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#define BOARD_NR_SPI 2
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#elif defined(BOARD_SPI1_SCK_PIN)
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#define BOARD_NR_SPI 1
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#endif
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// SPI_HAS_TRANSACTION means SPI has
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// - beginTransaction()
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// - endTransaction()
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@@ -215,22 +215,47 @@ uint32_t TFT_FSMC::GetID() {
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}
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bool TFT_FSMC::isBusy() {
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#define __IS_DMA_CONFIGURED(__DMAx__, __CHx__) (dma_channel_regs(__DMAx__, __CHx__)->CPAR != 0)
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if (!__IS_DMA_CONFIGURED(FSMC_DMA_DEV, FSMC_DMA_CHANNEL)) return false;
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// Check if DMA transfer error or transfer complete flags are set
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if ((dma_get_isr_bits(FSMC_DMA_DEV, FSMC_DMA_CHANNEL) & (DMA_ISR_TCIF | DMA_ISR_TEIF)) == 0) return true;
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__DSB();
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Abort();
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return false;
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}
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void TFT_FSMC::Abort() {
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dma_channel_reg_map *channel_regs = dma_channel_regs(FSMC_DMA_DEV, FSMC_DMA_CHANNEL);
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dma_disable(FSMC_DMA_DEV, FSMC_DMA_CHANNEL); // Abort DMA transfer if any
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// Deconfigure DMA
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channel_regs->CCR = 0U;
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channel_regs->CNDTR = 0U;
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channel_regs->CMAR = 0U;
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channel_regs->CPAR = 0U;
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}
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void TFT_FSMC::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count) {
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// TODO: HAL STM32 uses DMA2_Channel1 for FSMC on STM32F1
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dma_setup_transfer(FSMC_DMA_DEV, FSMC_DMA_CHANNEL, Data, DMA_SIZE_16BITS, &LCD->RAM, DMA_SIZE_16BITS, DMA_MEM_2_MEM | MemoryIncrease);
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dma_set_num_transfers(FSMC_DMA_DEV, FSMC_DMA_CHANNEL, Count);
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dma_clear_isr_bits(FSMC_DMA_DEV, FSMC_DMA_CHANNEL);
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dma_enable(FSMC_DMA_DEV, FSMC_DMA_CHANNEL);
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}
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void TFT_FSMC::Transmit(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count) {
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#if defined(FSMC_DMA_DEV) && defined(FSMC_DMA_CHANNEL)
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dma_setup_transfer(FSMC_DMA_DEV, FSMC_DMA_CHANNEL, Data, DMA_SIZE_16BITS, &LCD->RAM, DMA_SIZE_16BITS, DMA_MEM_2_MEM | MemoryIncrease);
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dma_set_num_transfers(FSMC_DMA_DEV, FSMC_DMA_CHANNEL, Count);
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dma_clear_isr_bits(FSMC_DMA_DEV, FSMC_DMA_CHANNEL);
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dma_enable(FSMC_DMA_DEV, FSMC_DMA_CHANNEL);
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while ((dma_get_isr_bits(FSMC_DMA_DEV, FSMC_DMA_CHANNEL) & 0x0A) == 0) {};
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dma_disable(FSMC_DMA_DEV, FSMC_DMA_CHANNEL);
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while ((dma_get_isr_bits(FSMC_DMA_DEV, FSMC_DMA_CHANNEL) & (DMA_CCR_TEIE | DMA_CCR_TCIE)) == 0) {}
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Abort();
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#endif
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}
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@@ -33,6 +33,10 @@
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#define DATASIZE_8BIT DMA_SIZE_8BITS
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#define DATASIZE_16BIT DMA_SIZE_16BITS
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#define TFT_IO_DRIVER TFT_FSMC
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#define DMA_MAX_SIZE 0xFFFF
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#define DMA_PINC_ENABLE DMA_PINC_MODE
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#define DMA_PINC_DISABLE 0
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typedef struct {
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__IO uint16_t REG;
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@@ -45,6 +49,7 @@ class TFT_FSMC {
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static uint32_t ReadID(uint16_t Reg);
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static void Transmit(uint16_t Data);
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static void Transmit(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count);
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static void TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count);
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public:
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@@ -59,13 +64,14 @@ class TFT_FSMC {
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static void WriteData(uint16_t Data) { Transmit(Data); }
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static void WriteReg(uint16_t Reg);
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static void WriteSequence(uint16_t *Data, uint16_t Count) { TransmitDMA(DMA_PINC_MODE, Data, Count); }
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static void WriteMultiple(uint16_t Color, uint16_t Count) { static uint16_t Data; Data = Color; TransmitDMA(DMA_CIRC_MODE, &Data, Count); }
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static void WriteSequence_DMA(uint16_t *Data, uint16_t Count) { TransmitDMA(DMA_PINC_ENABLE, Data, Count); }
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static void WriteMultiple_DMA(uint16_t Color, uint16_t Count) { static uint16_t Data; Data = Color; TransmitDMA(DMA_PINC_DISABLE, &Data, Count); }
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static void WriteSequence(uint16_t *Data, uint16_t Count) { Transmit(DMA_PINC_ENABLE, Data, Count); }
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static void WriteMultiple(uint16_t Color, uint32_t Count) {
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static uint16_t Data; Data = Color;
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while (Count > 0) {
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TransmitDMA(DMA_CIRC_MODE, &Data, Count > 0xFFFF ? 0xFFFF : Count);
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Count = Count > 0xFFFF ? Count - 0xFFFF : 0;
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Transmit(DMA_PINC_DISABLE, &Color, Count > DMA_MAX_SIZE ? DMA_MAX_SIZE : Count);
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Count = Count > DMA_MAX_SIZE ? Count - DMA_MAX_SIZE : 0;
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}
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}
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};
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@@ -26,7 +26,7 @@
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#include "tft_spi.h"
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SPIClass TFT_SPI::SPIx(1);
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SPIClass TFT_SPI::SPIx(TFT_SPI_DEVICE);
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void TFT_SPI::Init() {
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#if PIN_EXISTS(TFT_RESET)
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@@ -46,7 +46,7 @@ void TFT_SPI::Init() {
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* STM32F1 has 3 SPI ports, SPI1 in APB2, SPI2/SPI3 in APB1
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* so the minimum prescale of SPI1 is DIV4, SPI2/SPI3 is DIV2
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*/
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#if SPI_DEVICE == 1
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#if TFT_SPI_DEVICE == 1
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#define SPI_CLOCK_MAX SPI_CLOCK_DIV4
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#else
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#define SPI_CLOCK_MAX SPI_CLOCK_DIV2
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@@ -62,7 +62,7 @@ void TFT_SPI::Init() {
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case SPI_SPEED_6: clock = SPI_CLOCK_DIV64; break;
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default: clock = SPI_CLOCK_DIV2; // Default from the SPI library
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}
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SPIx.setModule(1);
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SPIx.setModule(TFT_SPI_DEVICE);
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SPIx.setClockDivider(clock);
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SPIx.setBitOrder(MSBFIRST);
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SPIx.setDataMode(SPI_MODE0);
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@@ -71,7 +71,7 @@ void TFT_SPI::Init() {
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void TFT_SPI::DataTransferBegin(uint16_t DataSize) {
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SPIx.setDataSize(DataSize);
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SPIx.begin();
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OUT_WRITE(TFT_CS_PIN, LOW);
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WRITE(TFT_CS_PIN, LOW);
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}
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#ifdef TFT_DEFAULT_DRIVER
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@@ -113,15 +113,53 @@ uint32_t TFT_SPI::ReadID(uint16_t Reg) {
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#endif
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}
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bool TFT_SPI::isBusy() { return false; }
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bool TFT_SPI::isBusy() {
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#define __IS_DMA_CONFIGURED(__DMAx__, __CHx__) (dma_channel_regs(__DMAx__, __CHx__)->CPAR != 0)
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void TFT_SPI::Abort() { DataTransferEnd(); }
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if (!__IS_DMA_CONFIGURED(DMAx, DMA_CHx)) return false;
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if (dma_get_isr_bits(DMAx, DMA_CHx) & DMA_ISR_TEIF) {
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// You should not be here - DMA transfer error flag is set
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// Abort DMA transfer and release SPI
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}
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else {
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// Check if DMA transfer completed flag is set
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if (!(dma_get_isr_bits(DMAx, DMA_CHx) & DMA_ISR_TCIF)) return true;
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// Check if SPI TX butter is empty and SPI is idle
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if (!(SPIdev->regs->SR & SPI_SR_TXE) || (SPIdev->regs->SR & SPI_SR_BSY)) return true;
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}
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Abort();
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return false;
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}
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void TFT_SPI::Abort() {
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dma_channel_reg_map *channel_regs = dma_channel_regs(DMAx, DMA_CHx);
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dma_disable(DMAx, DMA_CHx); // Abort DMA transfer if any
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spi_tx_dma_disable(SPIdev);
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// Deconfigure DMA
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channel_regs->CCR = 0U;
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channel_regs->CNDTR = 0U;
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channel_regs->CMAR = 0U;
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channel_regs->CPAR = 0U;
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DataTransferEnd();
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}
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void TFT_SPI::Transmit(uint16_t Data) { SPIx.send(Data); }
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void TFT_SPI::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count) {
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DataTransferBegin();
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OUT_WRITE(TFT_DC_PIN, HIGH);
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SPIx.dmaSendAsync(Data, Count, MemoryIncrease == DMA_MINC_ENABLE);
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TERN_(TFT_SHARED_SPI, while (isBusy()));
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}
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void TFT_SPI::Transmit(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count) {
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WRITE(TFT_DC_PIN, HIGH);
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DataTransferBegin();
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SPIx.dmaSend(Data, Count, MemoryIncrease == DMA_MINC_ENABLE);
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DataTransferEnd();
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}
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@@ -25,6 +25,27 @@
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#include <SPI.h>
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#define IS_SPI(N) (BOARD_NR_SPI >= N && (TFT_SCK_PIN == BOARD_SPI##N##_SCK_PIN) && (TFT_MOSI_PIN == BOARD_SPI##N##_MOSI_PIN) && (TFT_MISO_PIN == BOARD_SPI##N##_MISO_PIN))
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#if IS_SPI(1)
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#define TFT_SPI_DEVICE 1
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#define SPIdev SPI1
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#define DMAx DMA1
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#define DMA_CHx DMA_CH3
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#elif IS_SPI(2)
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#define TFT_SPI_DEVICE 2
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#define SPIdev SPI2
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#define DMAx DMA1
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#define DMA_CHx DMA_CH5
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#elif IS_SPI(3)
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#define TFT_SPI_DEVICE 3
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#define SPIdev SPI3
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#define DMAx DMA2
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#define DMA_CHx DMA_CH2
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#else
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#error "Invalid TFT SPI configuration."
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#endif
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#undef IS_SPI
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#ifndef LCD_READ_ID
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#define LCD_READ_ID 0x04 // Read display identification information (0xD3 on ILI9341)
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#endif
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@@ -32,17 +53,19 @@
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#define LCD_READ_ID4 0xD3 // Read display identification information (0xD3 on ILI9341)
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#endif
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#define DATASIZE_8BIT DATA_SIZE_8BIT
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#define DATASIZE_16BIT DATA_SIZE_16BIT
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#define TFT_IO_DRIVER TFT_SPI
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#define DATASIZE_8BIT DATA_SIZE_8BIT
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#define DATASIZE_16BIT DATA_SIZE_16BIT
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#define TFT_IO_DRIVER TFT_SPI
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#define DMA_MAX_SIZE 0xFFFF
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#define DMA_MINC_ENABLE 1
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#define DMA_MINC_DISABLE 0
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#define DMA_MINC_ENABLE DMA_MINC_MODE
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#define DMA_MINC_DISABLE 0
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class TFT_SPI {
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private:
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static uint32_t ReadID(uint16_t Reg);
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static void Transmit(uint16_t Data);
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static void Transmit(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count);
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static void TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count);
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public:
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@@ -58,15 +81,16 @@ public:
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static void DataTransferAbort();
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static void WriteData(uint16_t Data) { Transmit(Data); }
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static void WriteReg(uint16_t Reg) { WRITE(TFT_A0_PIN, LOW); Transmit(Reg); WRITE(TFT_A0_PIN, HIGH); }
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static void WriteReg(uint16_t Reg) { WRITE(TFT_DC_PIN, LOW); Transmit(Reg); WRITE(TFT_DC_PIN, HIGH); }
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static void WriteSequence(uint16_t *Data, uint16_t Count) { TransmitDMA(DMA_MINC_ENABLE, Data, Count); }
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static void WriteMultiple(uint16_t Color, uint16_t Count) { static uint16_t Data; Data = Color; TransmitDMA(DMA_MINC_DISABLE, &Data, Count); }
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static void WriteSequence_DMA(uint16_t *Data, uint16_t Count) { TransmitDMA(DMA_MINC_ENABLE, Data, Count); }
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static void WriteMultiple_DMA(uint16_t Color, uint16_t Count) { static uint16_t Data; Data = Color; TransmitDMA(DMA_MINC_DISABLE, &Data, Count); }
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static void WriteSequence(uint16_t *Data, uint16_t Count) { Transmit(DMA_MINC_ENABLE, Data, Count); }
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static void WriteMultiple(uint16_t Color, uint32_t Count) {
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static uint16_t Data; Data = Color;
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while (Count > 0) {
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TransmitDMA(DMA_MINC_DISABLE, &Data, Count > 0xFFFF ? 0xFFFF : Count);
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Count = Count > 0xFFFF ? Count - 0xFFFF : 0;
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Transmit(DMA_MINC_DISABLE, &Color, Count > DMA_MAX_SIZE ? DMA_MAX_SIZE : Count);
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Count = Count > DMA_MAX_SIZE ? Count - DMA_MAX_SIZE : 0;
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}
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}
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};
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