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update code base to Marlin 2.0.9.2

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This commit is contained in:
Stefan Kalscheuer
2021-10-03 18:57:12 +02:00
parent b9d7ba838e
commit 7077da3591
2617 changed files with 332093 additions and 103438 deletions
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56
buildroot/share/PlatformIO/boards/marlin_BTT_SKR_SE_BX.json Normal file
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@@ -0,0 +1,56 @@
{
"build": {
"core": "stm32",
"cpu": "cortex-m7",
"extra_flags": "-DSTM32H743xx",
"f_cpu": "400000000L",
"mcu": "stm32h743iit6",
"variant": "MARLIN_BTT_SKR_SE_BX"
},
"debug": {
"jlink_device": "STM32H743II",
"openocd_target": "stm32h7x",
"svd_path": "STM32H7x3.svd",
"tools": {
"stlink": {
"server": {
"arguments": [
"-f",
"scripts/interface/stlink.cfg",
"-c",
"transport select hla_swd",
"-f",
"scripts/target/stm32h7x.cfg",
"-c",
"reset_config none"
],
"executable": "bin/openocd",
"package": "tool-openocd"
}
}
}
},
"frameworks": [
"arduino",
"stm32cube"
],
"name": "STM32H743II (1024k RAM. 2048k Flash)",
"upload": {
"disable_flushing": false,
"maximum_ram_size": 1048576,
"maximum_size": 2097152,
"protocol": "stlink",
"protocols": [
"stlink",
"dfu",
"jlink",
"cmsis-dap"
],
"offset_address": "0x8020000",
"require_upload_port": true,
"use_1200bps_touch": false,
"wait_for_upload_port": false
},
"url": "https://www.st.com/en/microcontrollers-microprocessors/stm32h743ii.html",
"vendor": "Generic"
}

46
buildroot/share/PlatformIO/boards/marlin_BigTree_BTT002.json Normal file
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@@ -0,0 +1,46 @@
{
"build": {
"core": "stm32",
"cpu": "cortex-m4",
"extra_flags": "-DSTM32F4 -DSTM32F407xx -DSTM32F40_41xxx",
"f_cpu": "168000000L",
"hwids": [
[
"0x1EAF",
"0x0003"
],
[
"0x0483",
"0x3748"
]
],
"mcu": "stm32f407vgt6",
"variant": "MARLIN_BIGTREE_BTT002"
},
"debug": {
"jlink_device": "STM32F407VG",
"openocd_target": "stm32f4x",
"svd_path": "STM32F40x.svd"
},
"frameworks": [
"arduino"
],
"name": "STM32F407VG (192k RAM. 1024k Flash)",
"upload": {
"disable_flushing": false,
"maximum_ram_size": 131072,
"maximum_size": 1048576,
"protocol": "stlink",
"protocols": [
"stlink",
"dfu",
"jlink"
],
"offset_address": "0x8008000",
"require_upload_port": true,
"use_1200bps_touch": false,
"wait_for_upload_port": false
},
"url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f407vg.html",
"vendor": "Generic"
}

6
buildroot/share/PlatformIO/boards/BigTree_SKR_Pro.json → buildroot/share/PlatformIO/boards/marlin_BigTree_GTR_v1.json Executable file → Normal file
View File

@@ -14,9 +14,8 @@
"0x3748"
]
],
"ldscript": "stm32f407xg.ld",
"mcu": "stm32f407zgt6",
"variant": "BIGTREE_SKR_PRO_1v1"
"variant": "MARLIN_BIGTREE_GTR_V1"
},
"debug": {
"jlink_device": "STM32F407ZG",
@@ -37,10 +36,11 @@
"dfu",
"jlink"
],
"offset_address": "0x8008000",
"require_upload_port": true,
"use_1200bps_touch": false,
"wait_for_upload_port": false
},
"url": "http://www.st.com/en/microcontrollers/stm32f407zg.html",
"url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f407zg.html",
"vendor": "Generic"
}

35
buildroot/share/PlatformIO/boards/marlin_BigTree_Octopus_v1.json Normal file
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@@ -0,0 +1,35 @@
{
"build": {
"cpu": "cortex-m4",
"extra_flags": "-DSTM32F446xx",
"f_cpu": "180000000L",
"mcu": "stm32f446zet6",
"variant": "MARLIN_BIGTREE_OCTOPUS_V1"
},
"connectivity": [
"can"
],
"debug": {
"jlink_device": "STM32F446ZE",
"openocd_target": "stm32f4x",
"svd_path": "STM32F446x.svd"
},
"frameworks": [
"arduino",
"stm32cube"
],
"name": "STM32F446ZE (128k RAM. 512k Flash)",
"upload": {
"maximum_ram_size": 131072,
"maximum_size": 524288,
"protocol": "stlink",
"protocols": [
"jlink",
"stlink",
"blackmagic",
"serial"
]
},
"url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html",
"vendor": "Generic"
}

46
buildroot/share/PlatformIO/boards/marlin_BigTree_SKR_Pro.json Normal file
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@@ -0,0 +1,46 @@
{
"build": {
"core": "stm32",
"cpu": "cortex-m4",
"extra_flags": "-DSTM32F4 -DSTM32F407xx -DSTM32F40_41xxx",
"f_cpu": "168000000L",
"hwids": [
[
"0x1EAF",
"0x0003"
],
[
"0x0483",
"0x3748"
]
],
"mcu": "stm32f407zgt6",
"variant": "MARLIN_BIGTREE_SKR_PRO_11"
},
"debug": {
"jlink_device": "STM32F407ZG",
"openocd_target": "stm32f4x",
"svd_path": "STM32F40x.svd"
},
"frameworks": [
"arduino"
],
"name": "STM32F407ZG (192k RAM. 1024k Flash)",
"upload": {
"disable_flushing": false,
"maximum_ram_size": 196608,
"maximum_size": 1048576,
"protocol": "stlink",
"protocols": [
"stlink",
"dfu",
"jlink"
],
"offset_address": "0x8008000",
"require_upload_port": true,
"use_1200bps_touch": false,
"wait_for_upload_port": false
},
"url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f407zg.html",
"vendor": "Generic"
}

47
buildroot/share/PlatformIO/boards/marlin_CHITU_F103.json Normal file
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@@ -0,0 +1,47 @@
{
"build": {
"core": "maple",
"cpu": "cortex-m3",
"extra_flags": "-DSTM32F103xE -DSTM32F1",
"f_cpu": "72000000L",
"hwids": [
[
"0x1EAF",
"0x0003"
],
[
"0x1EAF",
"0x0004"
]
],
"mcu": "stm32f103zet6",
"variant": "marlin_CHITU_F103"
},
"debug": {
"jlink_device": "STM32F103ZE",
"openocd_target": "stm32f1x",
"svd_path": "STM32F103xx.svd"
},
"frameworks": [
"arduino"
],
"name": "CHITU STM32F103Z (64k RAM. 512k Flash)",
"upload": {
"disable_flushing": false,
"maximum_ram_size": 60536,
"maximum_size": 480288,
"protocol": "stlink",
"protocols": [
"jlink",
"stlink",
"blackmagic",
"serial",
"dfu"
],
"require_upload_port": true,
"use_1200bps_touch": false,
"wait_for_upload_port": false
},
"url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f103ze.html",
"vendor": "Generic"
}

66
buildroot/share/PlatformIO/boards/marlin_FYSETC_CHEETAH_V20.json Normal file
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@@ -0,0 +1,66 @@
{
"build": {
"core": "stm32",
"cpu": "cortex-m4",
"extra_flags": "-DSTM32F401xx",
"f_cpu": "84000000L",
"hwids": [
[
"0x1EAF",
"0x0003"
],
[
"0x0483",
"0x3748"
]
],
"ldscript": "stm32f401rc.ld",
"mcu": "stm32f401rct6",
"variant": "MARLIN_FYSETC_CHEETAH_V20"
},
"debug": {
"jlink_device": "STM32F401RC",
"openocd_target": "stm32f4x",
"svd_path": "STM32F40x.svd",
"tools": {
"stlink": {
"server": {
"arguments": [
"-f",
"scripts/interface/stlink.cfg",
"-c",
"transport select hla_swd",
"-f",
"scripts/target/stm32f4x.cfg",
"-c",
"reset_config none"
],
"executable": "bin/openocd",
"package": "tool-openocd"
}
}
}
},
"frameworks": [
"arduino",
"stm32cube"
],
"name": "STM32F401RC (64k RAM. 256k Flash)",
"upload": {
"disable_flushing": false,
"maximum_ram_size": 65536,
"maximum_size": 262144,
"protocol": "stlink",
"protocols": [
"stlink",
"dfu",
"jlink"
],
"offset_address": "0x800C000",
"require_upload_port": true,
"use_1200bps_touch": false,
"wait_for_upload_port": false
},
"url": "https://www.fysetc.com",
"vendor": "Generic"
}

53
buildroot/share/PlatformIO/boards/marlin_MEEB_3DP.json Normal file
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@@ -0,0 +1,53 @@
{
"build": {
"core": "maple",
"cpu": "cortex-m3",
"extra_flags": "-DSTM32F103xE -DSTM32F1",
"f_cpu": "72000000L",
"hwids": [
[
"0x1EAF",
"0x0003"
],
[
"0x1EAF",
"0x0004"
]
],
"libopencm3": {
"ldscript": "stm32f103xc.ld"
},
"mcu": "stm32f103rct6",
"variant": "marlin_MEEB_3DP"
},
"debug": {
"jlink_device": "STM32F103RC",
"openocd_target": "stm32f1x",
"svd_path": "STM32F103xx.svd"
},
"frameworks": [
"arduino",
"cmsis",
"libopencm3",
"stm32cube"
],
"name": "3D Printer control board for MEEB with 512k flash/rs422 bus/tmc2208 drivers",
"upload": {
"disable_flushing": false,
"maximum_ram_size": 49152,
"maximum_size": 524288,
"protocol": "dfu",
"protocols": [
"jlink",
"stlink",
"blackmagic",
"serial",
"dfu"
],
"require_upload_port": true,
"use_1200bps_touch": false,
"wait_for_upload_port": false
},
"url": "https://github.com/ccrobot-online/MEEB_3DP",
"vendor": "CCROBOT-ONLINE"
}

5
buildroot/share/PlatformIO/boards/STEVAL_STM32F401VE.json → buildroot/share/PlatformIO/boards/marlin_STEVAL_STM32F401VE.json Executable file → Normal file
View File

@@ -2,7 +2,7 @@
"build": {
"core": "stm32",
"cpu": "cortex-m4",
"extra_flags": "-DSTM32F401xx",
"extra_flags": "-DSTM32F401xx -DARDUINO_STEVAL",
"f_cpu": "84000000L",
"hwids": [
[
@@ -14,9 +14,8 @@
"0x3748"
]
],
"ldscript": "stm32f401xe.ld",
"mcu": "stm32f401vet6",
"variant": "STEVAL_F401VE"
"variant": "MARLIN_STEVAL_F401VE"
},
"debug": {
"jlink_device": "STM32F401VE",

56
buildroot/share/PlatformIO/boards/marlin_STM32F407VGT6_CCM.json Normal file
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@@ -0,0 +1,56 @@
{
"build": {
"core": "stm32",
"cpu": "cortex-m4",
"extra_flags": "-DSTM32F407xx -DSTM32F4",
"f_cpu": "168000000L",
"hwids": [
[
"0x1EAF",
"0x0003"
],
[
"0x0483",
"0x3748"
]
],
"mcu": "stm32f407vgt6",
"product_line": "STM32F407xx",
"variant": "Generic_F4x7Vx"
},
"debug": {
"default_tools": [
"stlink"
],
"jlink_device": "STM32F407VG",
"openocd_extra_args": [
"-c",
"reset_config none"
],
"openocd_target": "stm32f4x",
"svd_path": "STM32F40x.svd"
},
"frameworks": [
"arduino",
"cmsis",
"stm32cube",
"libopencm3"
],
"name": "STM32F407VG (128k RAM, 64k CCM RAM, 1024k Flash",
"upload": {
"disable_flushing": false,
"maximum_ram_size": 131072,
"maximum_size": 1048576,
"protocol": "stlink",
"protocols": [
"stlink",
"dfu",
"jlink"
],
"require_upload_port": true,
"use_1200bps_touch": false,
"wait_for_upload_port": false
},
"url": "https://www.st.com/content/st_com/en/products/microcontrollers/stm32-32-bit-arm-cortex-mcus/stm32-high-performance-mcus/stm32f4-series/stm32f407-417/stm32f407vg.html",
"vendor": "Generic"
}

8
buildroot/share/PlatformIO/boards/FLYF407ZG.json → buildroot/share/PlatformIO/boards/marlin_STM32F407ZGT6.json Executable file → Normal file
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@@ -14,9 +14,7 @@
"0x3748"
]
],
"ldscript": "stm32f407xg.ld",
"mcu": "stm32f407zgt6",
"variant": "FLY_F407ZG"
"mcu": "stm32f407zgt6"
},
"debug": {
"jlink_device": "STM32F407ZG",
@@ -50,7 +48,7 @@
"disable_flushing": false,
"maximum_ram_size": 196608,
"maximum_size": 1048576,
"protocol": "dfu",
"protocol": "stlink",
"protocols": [
"stlink",
"dfu",
@@ -60,6 +58,6 @@
"use_1200bps_touch": false,
"wait_for_upload_port": false
},
"url": "http://www.st.com/en/microcontrollers/stm32f407ZG.html",
"url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f407ZG.html",
"vendor": "Generic"
}

59
buildroot/share/PlatformIO/boards/marlin_archim.json Normal file
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@@ -0,0 +1,59 @@
{
"build": {
"core": "arduino",
"cpu": "cortex-m3",
"extra_flags": "-D__SAM3X8E__ -DARDUINO_ARCH_SAM -DARDUINO_SAM_DUE",
"f_cpu": "84000000L",
"hwids": [
[
"0x27B1",
"0x0001"
],
[
"0x2341",
"0x003E"
],
[
"0x2341",
"0x003D"
]
],
"ldscript": "linker_scripts/gcc/flash.ld",
"mcu": "at91sam3x8e",
"usb_product": "Archim",
"variant": "MARLIN_ARCHIM"
},
"connectivity": [
"can"
],
"debug": {
"jlink_device": "ATSAM3X8E",
"openocd_chipname": "at91sam3X8E",
"openocd_target": "at91sam3XXX",
"svd_path": "ATSAM3X8E.svd"
},
"frameworks": [
"arduino",
"simba"
],
"name": "Archim",
"upload": {
"disable_flushing": true,
"maximum_ram_size": 98304,
"maximum_size": 524288,
"native_usb": true,
"protocol": "sam-ba",
"protocols": [
"sam-ba",
"jlink",
"blackmagic",
"atmel-ice",
"stlink"
],
"require_upload_port": true,
"use_1200bps_touch": true,
"wait_for_upload_port": true
},
"url": "https://ultimachine.com",
"vendor": "UltiMachine"
}

0
buildroot/share/PlatformIO/boards/at90usb1286.json → buildroot/share/PlatformIO/boards/marlin_at90usb1286.json Executable file → Normal file
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7
buildroot/share/PlatformIO/boards/blackSTM32F407VET6.json → buildroot/share/PlatformIO/boards/marlin_blackSTM32F407VET6.json Executable file → Normal file
View File

@@ -2,7 +2,7 @@
"build": {
"core": "stm32",
"cpu": "cortex-m4",
"extra_flags": "-DSTM32F407xx",
"extra_flags": "-DSTM32F407xx -DARDUINO_BLACK_F407VE",
"f_cpu": "168000000L",
"hwids": [
[
@@ -14,7 +14,6 @@
"0x3748"
]
],
"ldscript": "stm32f407xe.ld",
"mcu": "stm32f407vet6",
"variant": "MARLIN_F407VE"
},
@@ -49,7 +48,7 @@
"upload": {
"disable_flushing": false,
"maximum_ram_size": 131072,
"maximum_size": 514288,
"maximum_size": 524288,
"protocol": "stlink",
"protocols": [
"stlink",
@@ -60,6 +59,6 @@
"use_1200bps_touch": false,
"wait_for_upload_port": false
},
"url": "http://www.st.com/en/microcontrollers/stm32f407ve.html",
"url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f407ve.html",
"vendor": "Generic"
}

4
buildroot/share/PlatformIO/boards/fysetc_s6.json → buildroot/share/PlatformIO/boards/marlin_fysetc_s6.json Executable file → Normal file
View File

@@ -4,7 +4,7 @@
"extra_flags": "-DSTM32F446xx",
"f_cpu": "180000000L",
"mcu": "stm32f446ret6",
"variant": "FYSETC_S6"
"variant": "MARLIN_FYSETC_S6"
},
"connectivity": [
"can"
@@ -32,4 +32,4 @@
},
"url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html",
"vendor": "FYSETC"
}
}

17
buildroot/share/PlatformIO/boards/BigTree_Btt002.json → buildroot/share/PlatformIO/boards/marlin_index_mobo_rev03.json Executable file → Normal file
View File

@@ -2,7 +2,7 @@
"build": {
"core": "stm32",
"cpu": "cortex-m4",
"extra_flags": "-DSTM32F4 -DSTM32F407xx -DSTM32F40_41xxx",
"extra_flags": "-DSTM32F407xx",
"f_cpu": "168000000L",
"hwids": [
[
@@ -12,11 +12,14 @@
[
"0x0483",
"0x3748"
],
[
"0x0483",
"0xdf11"
]
],
"ldscript": "stm32f407xg.ld",
"mcu": "stm32f407vet6",
"variant": "BIGTREE_BTT002"
"variant": "MARLIN_F407VE"
},
"debug": {
"jlink_device": "STM32F407VE",
@@ -24,7 +27,8 @@
"svd_path": "STM32F40x.svd"
},
"frameworks": [
"arduino"
"arduino",
"stm32cube"
],
"name": "STM32F407VE (192k RAM. 512k Flash)",
"upload": {
@@ -35,12 +39,13 @@
"protocols": [
"stlink",
"dfu",
"jlink"
"jlink",
"blackmagic"
],
"require_upload_port": true,
"use_1200bps_touch": false,
"wait_for_upload_port": false
},
"url": "http://www.st.com/en/microcontrollers/stm32f407ve.html",
"url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f407ve.html",
"vendor": "Generic"
}

3
buildroot/share/PlatformIO/boards/malyanM200.json → buildroot/share/PlatformIO/boards/marlin_malyanM200.json Executable file → Normal file
View File

@@ -11,7 +11,6 @@
"ldscript": "jtagOffset.ld",
"mcu": "stm32f103cb",
"variant": "malyanM200",
"genericvariant" : "MALYAN_M200_V1",
"vec_tab_addr": "0x8002000"
},
"debug": {
@@ -31,6 +30,6 @@
"use_1200bps_touch": false,
"wait_for_upload_port": false
},
"url": "http://www.st.com/content/st_com/en/products/microcontrollers/stm32-32-bit-arm-cortex-mcus/stm32f1-series/stm32f103/stm32f103cb.html",
"url": "https://www.st.com/content/st_com/en/products/microcontrollers/stm32-32-bit-arm-cortex-mcus/stm32f1-series/stm32f103/stm32f103cb.html",
"vendor": "Generic"
}

2
buildroot/share/PlatformIO/boards/malyanM200v2.json → buildroot/share/PlatformIO/boards/marlin_malyanM200v2.json Executable file → Normal file
View File

@@ -4,7 +4,7 @@
"extra_flags": "-DSTM32F070xB",
"f_cpu": "48000000L",
"mcu": "stm32f070rbt6",
"genericvariant" : "MALYAN_M200_V2",
"variant": "MALYANMx00_F070CB",
"vec_tab_addr": "0x8002000"
},
"debug": {

14
buildroot/share/PlatformIO/ldscripts/STM32F103RC_MEEB_3DP.ld Normal file
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@@ -0,0 +1,14 @@
MEMORY
{
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K - 40
rom (rx) : ORIGIN = 0x08002000, LENGTH = 512K - 8K - 4K
}
/* Provide memory region aliases for common.inc */
REGION_ALIAS("REGION_TEXT", rom);
REGION_ALIAS("REGION_DATA", ram);
REGION_ALIAS("REGION_BSS", ram);
REGION_ALIAS("REGION_RODATA", rom);
/* Let common.inc handle the real work. */
INCLUDE common.inc

0
buildroot/share/PlatformIO/ldscripts/STM32F103RC_SKR_MINI_256K.ld Executable file → Normal file
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0
buildroot/share/PlatformIO/ldscripts/STM32F103RC_SKR_MINI_512K.ld → buildroot/share/PlatformIO/ldscripts/STM32F103RE_SKR_MINI_512K.ld Executable file → Normal file
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0
buildroot/share/PlatformIO/ldscripts/STM32F103VE_longer.ld Executable file → Normal file
View File

14
buildroot/share/PlatformIO/ldscripts/ZONESTAR_ZM3E_256K.ld Normal file
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@@ -0,0 +1,14 @@
MEMORY
{
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K - 40
rom (rx) : ORIGIN = 0x08005000, LENGTH = 256K - 20K - 4K
}
/* Provide memory region aliases for common.inc */
REGION_ALIAS("REGION_TEXT", rom);
REGION_ALIAS("REGION_DATA", ram);
REGION_ALIAS("REGION_BSS", ram);
REGION_ALIAS("REGION_RODATA", rom);
/* Let common.inc handle the real work. */
INCLUDE common.inc

14
buildroot/share/PlatformIO/ldscripts/ZONESTAR_ZM3E_512K.ld Normal file
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@@ -0,0 +1,14 @@
MEMORY
{
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K - 40
rom (rx) : ORIGIN = 0x08005000, LENGTH = 512K - 20K - 4K
}
/* Provide memory region aliases for common.inc */
REGION_ALIAS("REGION_TEXT", rom);
REGION_ALIAS("REGION_DATA", ram);
REGION_ALIAS("REGION_BSS", ram);
REGION_ALIAS("REGION_RODATA", rom);
/* Let common.inc handle the real work. */
INCLUDE common.inc

14
buildroot/share/PlatformIO/ldscripts/creality.ld Normal file
View File

@@ -0,0 +1,14 @@
MEMORY
{
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K - 40
rom (rx) : ORIGIN = 0x08007000, LENGTH = 512K - 28K
}
/* Provide memory region aliases for common.inc */
REGION_ALIAS("REGION_TEXT", rom);
REGION_ALIAS("REGION_DATA", ram);
REGION_ALIAS("REGION_BSS", ram);
REGION_ALIAS("REGION_RODATA", rom);
/* Let common.inc handle the real work. */
INCLUDE common.inc

14
buildroot/share/PlatformIO/ldscripts/fly_mini.ld Normal file
View File

@@ -0,0 +1,14 @@
MEMORY
{
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K - 40
rom (rx) : ORIGIN = 0x08005000, LENGTH = 256K - 20K - 4K
}
/* Provide memory region aliases for common.inc */
REGION_ALIAS("REGION_TEXT", rom);
REGION_ALIAS("REGION_DATA", ram);
REGION_ALIAS("REGION_BSS", ram);
REGION_ALIAS("REGION_RODATA", rom);
/* Let common.inc handle the real work. */
INCLUDE common.inc

2
buildroot/share/PlatformIO/ldscripts/fysetc_aio_ii.ld → buildroot/share/PlatformIO/ldscripts/fysetc_stm32f103rc.ld Executable file → Normal file
View File

@@ -5,7 +5,7 @@
MEMORY
{
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K
rom (rx) : ORIGIN = 0x08010000, LENGTH = 256K - 40K - 4K
rom (rx) : ORIGIN = 0x08008000, LENGTH = 256K - 32K
}
/* Provide memory region aliases for common.inc */

0
buildroot/share/PlatformIO/ldscripts/jgaurora_a5s_a1.ld Executable file → Normal file
View File

0
buildroot/share/PlatformIO/ldscripts/mks_robin.ld Executable file → Normal file
View File

14
buildroot/share/PlatformIO/ldscripts/mks_robin_e3.ld Normal file
View File

@@ -0,0 +1,14 @@
MEMORY
{
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K - 40
rom (rx) : ORIGIN = 0x08005000, LENGTH = 256K - 20K - 4K
}
/* Provide memory region aliases for common.inc */
REGION_ALIAS("REGION_TEXT", rom);
REGION_ALIAS("REGION_DATA", ram);
REGION_ALIAS("REGION_BSS", ram);
REGION_ALIAS("REGION_RODATA", rom);
/* Let common.inc handle the real work. */
INCLUDE common.inc

2
buildroot/share/PlatformIO/ldscripts/STM32F103RE_SKR_E3_DIP.ld → buildroot/share/PlatformIO/ldscripts/mks_robin_e3p.ld Executable file → Normal file
View File

@@ -1,6 +1,6 @@
MEMORY
{
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K - 40
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K - 40
rom (rx) : ORIGIN = 0x08007000, LENGTH = 512K - 28K - 4K
}

0
buildroot/share/PlatformIO/ldscripts/mks_robin_lite.ld Executable file → Normal file
View File

0
buildroot/share/PlatformIO/ldscripts/mks_robin_lite3.ld Executable file → Normal file
View File

2
buildroot/share/PlatformIO/ldscripts/mks_robin_nano.ld
View File

@@ -1,7 +1,7 @@
MEMORY
{
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K - 40
rom (rx) : ORIGIN = 0x08007000, LENGTH = 512K - 28K
rom (rx) : ORIGIN = 0x08007000, LENGTH = 512K - 28K - 4K
}
/* Provide memory region aliases for common.inc */

0
buildroot/share/PlatformIO/ldscripts/mks_robin_pro.ld Executable file → Normal file
View File

19
buildroot/share/PlatformIO/scripts/SAMD51_grandcentral_m4.py Normal file
View File

@@ -0,0 +1,19 @@
#
# SAMD51_grandcentral_m4.py
# Customizations for env:SAMD51_grandcentral_m4
#
from os.path import join, isfile
import shutil
from pprint import pprint
Import("env")
mf = env["MARLIN_FEATURES"]
rxBuf = mf["RX_BUFFER_SIZE"] if "RX_BUFFER_SIZE" in mf else "0"
txBuf = mf["TX_BUFFER_SIZE"] if "TX_BUFFER_SIZE" in mf else "0"
serialBuf = str(max(int(rxBuf), int(txBuf), 350))
build_flags = env.get('BUILD_FLAGS')
build_flags.append("-DSERIAL_BUFFER_SIZE=" + serialBuf)
env.Replace(BUILD_FLAGS=build_flags)

11
buildroot/share/PlatformIO/scripts/STEVAL__F401XX.py
View File

@@ -1,11 +0,0 @@
import os
Import("env")
custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/variants/STEVAL_F401VE/ldscript.ld")
for i, flag in enumerate(env["LINKFLAGS"]):
if "-Wl,-T" in flag:
env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
elif flag == "-T":
env["LINKFLAGS"][i + 1] = custom_ld_script

58
buildroot/share/PlatformIO/scripts/STM32F103RC_MEEB_3DP.py Normal file
View File

@@ -0,0 +1,58 @@
#
# buildroot/share/PlatformIO/scripts/STM32F103RC_MEEB_3DP.py
#
try:
import configparser
except ImportError:
import ConfigParser as configparser
import os
Import("env", "projenv")
# access to global build environment
print(env)
# access to project build environment (is used source files in "src" folder)
print(projenv)
config = configparser.ConfigParser()
config.read("platformio.ini")
#com_port = config.get("env:STM32F103RC_meeb", "upload_port")
#print('Use the {0:s} to reboot the board to dfu mode.'.format(com_port))
#
# Upload actions
#
def before_upload(source, target, env):
print("before_upload")
# do some actions
# use com_port
#
env.Execute("pwd")
def after_upload(source, target, env):
print("after_upload")
# do some actions
#
#
env.Execute("pwd")
print("Current build targets", map(str, BUILD_TARGETS))
env.AddPreAction("upload", before_upload)
env.AddPostAction("upload", after_upload)
flash_size = 0
vect_tab_addr = 0
for define in env['CPPDEFINES']:
if define[0] == "VECT_TAB_ADDR":
vect_tab_addr = define[1]
if define[0] == "STM32_FLASH_SIZE":
flash_size = define[1]
print('Use the {0:s} address as the marlin app entry point.'.format(vect_tab_addr))
print('Use the {0:d}KB flash version of stm32f103rct6 chip.'.format(flash_size))
import marlin
marlin.custom_ld_script("STM32F103RC_MEEB_3DP.ld")

20
buildroot/share/PlatformIO/scripts/STM32F103RC_SKR_MINI.py
View File

@@ -1,20 +0,0 @@
import os
Import("env")
STM32_FLASH_SIZE = 256
for define in env['CPPDEFINES']:
if define[0] == "VECT_TAB_ADDR":
env['CPPDEFINES'].remove(define)
if define[0] == "STM32_FLASH_SIZE":
STM32_FLASH_SIZE = define[1]
# Relocate firmware from 0x08000000 to 0x08007000
env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08007000"))
custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/STM32F103RC_SKR_MINI_" + str(STM32_FLASH_SIZE) + "K.ld")
for i, flag in enumerate(env["LINKFLAGS"]):
if "-Wl,-T" in flag:
env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
elif flag == "-T":
env["LINKFLAGS"][i + 1] = custom_ld_script

33
buildroot/share/PlatformIO/scripts/STM32F103RC_fysetc.py Executable file → Normal file
View File

@@ -1,27 +1,19 @@
#
# buildroot/share/PlatformIO/scripts/STM32F103RC_fysetc.py
#
import os
from os.path import join
from os.path import expandvars
Import("env", "projenv")
# Relocate firmware from 0x08000000 to 0x08002000
#env['CPPDEFINES'].remove(("VECT_TAB_ADDR", 134217728))
#env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08010000"))
Import("env")
# Custom HEX from ELF
env.AddPostAction(
join("$BUILD_DIR","${PROGNAME}.elf"),
join("$BUILD_DIR", "${PROGNAME}.elf"),
env.VerboseAction(" ".join([
"$OBJCOPY", "-O ihex", "$TARGET", # TARGET=.pio/build/fysetc_STM32F1/firmware.elf
"\"" + join("$BUILD_DIR","${PROGNAME}.hex") + "\"", # Note: $BUILD_DIR is a full path
"$OBJCOPY", "-O ihex", "$TARGET",
"\"" + join("$BUILD_DIR", "${PROGNAME}.hex") + "\"", # Note: $BUILD_DIR is a full path
]), "Building $TARGET"))
# please keep $SOURCE variable, it will be replaced with a path to firmware
# Generic
#env.Replace(
# UPLOADER="serial_upload.bat"
# UPLOADCMD="$UPLOADER stm32loader.py $SOURCE"
#)
# In-line command with arguments
UPLOAD_TOOL="stm32flash"
platform = env.PioPlatform()
@@ -32,12 +24,3 @@ env.Replace(
UPLOADER=UPLOAD_TOOL,
UPLOADCMD=expandvars(UPLOAD_TOOL + " -v -i rts,-dtr,dtr -R -b 115200 -g 0x8000000 -w \"" + join("$BUILD_DIR","${PROGNAME}.hex")+"\"" + " $UPLOAD_PORT")
)
# Python callback
#def on_upload(source, target, env):
# print source, target
# firmware_path = str(source[0])
# # do something
# env.Execute(".\serial_upload.bat")
#env.Replace(UPLOADCMD=on_upload)

12
buildroot/share/PlatformIO/scripts/STM32F103RE_SKR_E3_DIP.py
View File

@@ -1,12 +0,0 @@
import os
Import("env")
# Relocate firmware from 0x08000000 to 0x08007000
env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08007000"))
custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/STM32F103RE_SKR_E3_DIP.ld")
for i, flag in enumerate(env["LINKFLAGS"]):
if "-Wl,-T" in flag:
env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
elif flag == "-T":
env["LINKFLAGS"][i + 1] = custom_ld_script

33
buildroot/share/PlatformIO/scripts/STM32F103VE_longer.py
View File

@@ -1,33 +0,0 @@
import os
Import("env")
# Relocate firmware from 0x08000000 to 0x08010000
for define in env['CPPDEFINES']:
if define[0] == "VECT_TAB_ADDR":
env['CPPDEFINES'].remove(define)
env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08010000"))
custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/STM32F103VE_longer.ld")
for i, flag in enumerate(env["LINKFLAGS"]):
if "-Wl,-T" in flag:
env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
elif flag == "-T":
env["LINKFLAGS"][i + 1] = custom_ld_script
# Rename ${PROGNAME}.bin and save it as 'project.bin' (No encryption on the Longer3D)
def encrypt(source, target, env):
firmware = open(target[0].path, "rb")
marlin_alfa = open(target[0].dir.path +'/project.bin', "wb")
length = os.path.getsize(target[0].path)
position = 0
try:
while position < length:
byte = firmware.read(1)
marlin_alfa.write(byte)
position += 1
finally:
firmware.close()
marlin_alfa.close()
env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);

30
buildroot/share/PlatformIO/scripts/STM32F1_create_variant.py Normal file
View File

@@ -0,0 +1,30 @@
#
# STM32F1_create_variant.py
#
import os,shutil,marlin
from SCons.Script import DefaultEnvironment
from platformio import util
env = DefaultEnvironment()
platform = env.PioPlatform()
board = env.BoardConfig()
FRAMEWORK_DIR = platform.get_package_dir("framework-arduinoststm32-maple")
assert os.path.isdir(FRAMEWORK_DIR)
source_root = os.path.join("buildroot", "share", "PlatformIO", "variants")
assert os.path.isdir(source_root)
variant = board.get("build.variant")
variant_dir = os.path.join(FRAMEWORK_DIR, "STM32F1", "variants", variant)
source_dir = os.path.join(source_root, variant)
assert os.path.isdir(source_dir)
if os.path.isdir(variant_dir):
shutil.rmtree(variant_dir)
if not os.path.isdir(variant_dir):
os.mkdir(variant_dir)
marlin.copytree(source_dir, variant_dir)

5
buildroot/share/PlatformIO/scripts/add_nanolib.py Normal file
View File

@@ -0,0 +1,5 @@
#
# add_nanolib.py
#
Import("env")
env.Append(LINKFLAGS=["--specs=nano.specs"])

41
buildroot/share/PlatformIO/scripts/chitu_crypt.py Executable file → Normal file
View File

@@ -1,20 +1,11 @@
import os
import struct
Import("env")
#
# buildroot/share/PlatformIO/scripts/chitu_crypt.py
# Customizations for Chitu boards
#
import os,random,struct,uuid,marlin
# Relocate firmware from 0x08000000 to 0x08008800
for define in env['CPPDEFINES']:
if define[0] == "VECT_TAB_ADDR":
env['CPPDEFINES'].remove(define)
env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x8008800"))
custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/chitu_f103.ld")
for i, flag in enumerate(env["LINKFLAGS"]):
if "-Wl,-T" in flag:
env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
elif flag == "-T":
env["LINKFLAGS"][i + 1] = custom_ld_script
marlin.relocate_firmware("0x08008800")
def calculate_crc(contents, seed):
accumulating_xor_value = seed;
@@ -32,7 +23,7 @@ def xor_block(r0, r1, block_number, block_size, file_key):
key_length = 0x18
# This is an initial seed
xor_seed = 0x4bad
xor_seed = 0x4BAD
# This is the block counter
block_number = xor_seed * block_number
@@ -42,7 +33,7 @@ def xor_block(r0, r1, block_number, block_size, file_key):
for loop_counter in range(0, block_size):
# meant to make sure different bits of the key are used.
xor_seed = int(loop_counter/key_length)
xor_seed = int(loop_counter / key_length)
# IP is a scratch register / R12
ip = loop_counter - (key_length * xor_seed)
@@ -68,14 +59,15 @@ def xor_block(r0, r1, block_number, block_size, file_key):
#increment the loop_counter
loop_counter = loop_counter + 1
def encrypt_file(input, output_file, file_length):
input_file = bytearray(input.read())
block_size = 0x800
key_length = 0x18
file_key = 0xDAB27F94
xor_crc = 0xef3d4323;
uid_value = uuid.uuid4()
file_key = int(uid_value.hex[0:8], 16)
xor_crc = 0xEF3D4323;
# the input file is exepcted to be in chunks of 0x800
# so round the size
@@ -87,11 +79,11 @@ def encrypt_file(input, output_file, file_length):
# encrypt the contents using a known file header key
# write the file_key
output_file.write(struct.pack(">I", 0x947FB2DA))
output_file.write(struct.pack("<I", file_key))
#TODO - how to enforce that the firmware aligns to block boundaries?
block_count = int(len(input_file) / block_size)
print "Block Count is ", block_count
print ("Block Count is ", block_count)
for block_number in range(0, block_count):
block_offset = (block_number * block_size)
block_end = block_offset + block_size
@@ -110,11 +102,10 @@ def encrypt_file(input, output_file, file_length):
output_file.write(input_file)
return
# Encrypt ${PROGNAME}.bin and save it as 'update.cbd'
def encrypt(source, target, env):
firmware = open(target[0].path, "rb")
update = open(target[0].dir.path +'/update.cbd', "wb")
update = open(target[0].dir.path + '/update.cbd', "wb")
length = os.path.getsize(target[0].path)
encrypt_file(firmware, update, length)
@@ -122,4 +113,4 @@ def encrypt(source, target, env):
firmware.close()
update.close()
env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);
marlin.add_post_action(encrypt);

22
buildroot/share/PlatformIO/scripts/common-cxxflags.py Executable file → Normal file
View File

@@ -10,3 +10,25 @@ env.Append(CXXFLAGS=[
#"-Wno-maybe-uninitialized",
#"-Wno-sign-compare"
])
#
# Add CPU frequency as a compile time constant instead of a runtime variable
#
def add_cpu_freq():
if 'BOARD_F_CPU' in env:
env['BUILD_FLAGS'].append('-DBOARD_F_CPU=' + env['BOARD_F_CPU'])
# Useful for JTAG debugging
#
# It will separate release and debug build folders.
# It useful to keep two live versions: a debug version for debugging and another for
# release, for flashing when upload is not done automatically by jlink/stlink.
# Without this, PIO needs to recompile everything twice for any small change.
if env.GetBuildType() == "debug" and env.get('UPLOAD_PROTOCOL') not in ['jlink', 'stlink']:
env['BUILD_DIR'] = '$PROJECT_BUILD_DIR/$PIOENV/debug'
# On some platform, F_CPU is a runtime variable. Since it's used to convert from ns
# to CPU cycles, this adds overhead preventing small delay (in the order of less than
# 30 cycles) to be generated correctly. By using a compile time constant instead
# the compiler will perform the computation and this overhead will be avoided
add_cpu_freq()

16
buildroot/share/PlatformIO/scripts/common-dependencies-post.py Normal file
View File

@@ -0,0 +1,16 @@
#
# common-dependencies-post.py
# Convenience script to add build flags for Marlin Enabled Features
#
Import("env")
Import("projenv")
def apply_board_build_flags():
if not 'BOARD_CUSTOM_BUILD_FLAGS' in env['MARLIN_FEATURES']:
return
projenv.Append(CCFLAGS=env['MARLIN_FEATURES']['BOARD_CUSTOM_BUILD_FLAGS'].split())
# We need to add the board build flags in a post script
# so the platform build script doesn't overwrite the custom CCFLAGS
apply_board_build_flags()

111
buildroot/share/PlatformIO/scripts/common-dependencies.h Normal file
View File

@@ -0,0 +1,111 @@
/**
* Marlin 3D Printer Firmware
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
*
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
/**
* The purpose of this file is just include Marlin Configuration files,
* to discover which FEATURES are enabled, without any HAL include.
* Used by common-dependencies.py
*/
#include "../../../../Marlin/src/inc/MarlinConfig.h"
//
// Conditionals only used for [features]
//
#if ENABLED(SR_LCD_3W_NL)
// Feature checks for SR_LCD_3W_NL
#elif EITHER(LCD_I2C_TYPE_MCP23017, LCD_I2C_TYPE_MCP23008)
#define USES_LIQUIDTWI2
#elif ENABLED(LCD_I2C_TYPE_PCA8574)
#define USES_LIQUIDCRYSTAL_I2C
#elif ANY(HAS_MARLINUI_HD44780, LCD_I2C_TYPE_PCF8575, SR_LCD_2W_NL, LCM1602)
#define USES_LIQUIDCRYSTAL
#endif
#if SAVED_POSITIONS
#define HAS_SAVED_POSITIONS
#endif
#if ENABLED(HOST_PROMPT_SUPPORT) && DISABLED(EMERGENCY_PARSER)
#define HAS_GCODE_M876
#endif
#if ENABLED(DUET_SMART_EFFECTOR) && PIN_EXISTS(SMART_EFFECTOR_MOD)
#define HAS_SMART_EFF_MOD
#endif
#if HAS_LCD_MENU
#if ENABLED(BACKLASH_GCODE)
#define HAS_MENU_BACKLASH
#endif
#if ENABLED(LEVEL_BED_CORNERS)
#define HAS_MENU_BED_CORNERS
#endif
#if ENABLED(CANCEL_OBJECTS)
#define HAS_MENU_CANCELOBJECT
#endif
#if EITHER(DELTA_CALIBRATION_MENU, DELTA_AUTO_CALIBRATION)
#define HAS_MENU_DELTA_CALIBRATE
#endif
#if EITHER(LED_CONTROL_MENU, CASE_LIGHT_MENU)
#define HAS_MENU_LED
#endif
#if ENABLED(ADVANCED_PAUSE_FEATURE)
#define HAS_MENU_FILAMENT
#endif
#if ENABLED(SDSUPPORT)
#define HAS_MENU_MEDIA
#endif
#if ENABLED(MIXING_EXTRUDER)
#define HAS_MENU_MIXER
#endif
#if ENABLED(POWER_LOSS_RECOVERY)
#define HAS_MENU_JOB_RECOVERY
#endif
#if HAS_POWER_MONITOR
#define HAS_MENU_POWER_MONITOR
#endif
#if HAS_CUTTER
#define HAS_MENU_CUTTER
#endif
#if HAS_TEMPERATURE
#define HAS_MENU_TEMPERATURE
#endif
#if ENABLED(MMU2_MENUS)
#define HAS_MENU_MMU2
#endif
#if ENABLED(PASSWORD_FEATURE)
#define HAS_MENU_PASSWORD
#endif
#if HAS_TRINAMIC_CONFIG
#define HAS_MENU_TMC
#endif
#if ENABLED(TOUCH_SCREEN_CALIBRATION)
#define HAS_MENU_TOUCH_SCREEN
#endif
#if ENABLED(ASSISTED_TRAMMING_WIZARD)
#define HAS_MENU_TRAMMING
#endif
#if ENABLED(AUTO_BED_LEVELING_UBL)
#define HAS_MENU_UBL
#endif
#endif

318
buildroot/share/PlatformIO/scripts/common-dependencies.py Normal file
View File

@@ -0,0 +1,318 @@
#
# common-dependencies.py
# Convenience script to check dependencies and add libs and sources for Marlin Enabled Features
#
import subprocess,os,re
PIO_VERSION_MIN = (5, 0, 3)
try:
from platformio import VERSION as PIO_VERSION
weights = (1000, 100, 1)
version_min = sum([x[0] * float(re.sub(r'[^0-9]', '.', str(x[1]))) for x in zip(weights, PIO_VERSION_MIN)])
version_cur = sum([x[0] * float(re.sub(r'[^0-9]', '.', str(x[1]))) for x in zip(weights, PIO_VERSION)])
if version_cur < version_min:
print()
print("**************************************************")
print("****** An update to PlatformIO is ******")
print("****** required to build Marlin Firmware. ******")
print("****** ******")
print("****** Minimum version: ", PIO_VERSION_MIN, " ******")
print("****** Current Version: ", PIO_VERSION, " ******")
print("****** ******")
print("****** Update PlatformIO and try again. ******")
print("**************************************************")
print()
exit(1)
except SystemExit:
exit(1)
except:
print("Can't detect PlatformIO Version")
from platformio.package.meta import PackageSpec
from platformio.project.config import ProjectConfig
Import("env")
#print(env.Dump())
try:
verbose = int(env.GetProjectOption('custom_verbose'))
except:
verbose = 0
def blab(str,level=1):
if verbose >= level:
print("[deps] %s" % str)
FEATURE_CONFIG = {}
def add_to_feat_cnf(feature, flines):
try:
feat = FEATURE_CONFIG[feature]
except:
FEATURE_CONFIG[feature] = {}
# Get a reference to the FEATURE_CONFIG under construction
feat = FEATURE_CONFIG[feature]
# Split up passed lines on commas or newlines and iterate
# Add common options to the features config under construction
# For lib_deps replace a previous instance of the same library
atoms = re.sub(r',\\s*', '\n', flines).strip().split('\n')
for line in atoms:
parts = line.split('=')
name = parts.pop(0)
if name in ['build_flags', 'extra_scripts', 'src_filter', 'lib_ignore']:
feat[name] = '='.join(parts)
blab("[%s] %s=%s" % (feature, name, feat[name]), 3)
else:
for dep in re.split(r",\s*", line):
lib_name = re.sub(r'@([~^]|[<>]=?)?[\d.]+', '', dep.strip()).split('=').pop(0)
lib_re = re.compile('(?!^' + lib_name + '\\b)')
feat['lib_deps'] = list(filter(lib_re.match, feat['lib_deps'])) + [dep]
blab("[%s] lib_deps = %s" % (feature, dep), 3)
def load_config():
blab("========== Gather [features] entries...")
items = ProjectConfig().items('features')
for key in items:
feature = key[0].upper()
if not feature in FEATURE_CONFIG:
FEATURE_CONFIG[feature] = { 'lib_deps': [] }
add_to_feat_cnf(feature, key[1])
# Add options matching custom_marlin.MY_OPTION to the pile
blab("========== Gather custom_marlin entries...")
all_opts = env.GetProjectOptions()
for n in all_opts:
key = n[0]
mat = re.match(r'custom_marlin\.(.+)', key)
if mat:
try:
val = env.GetProjectOption(key)
except:
val = None
if val:
opt = mat.group(1).upper()
blab("%s.custom_marlin.%s = '%s'" % ( env['PIOENV'], opt, val ))
add_to_feat_cnf(opt, val)
def get_all_known_libs():
known_libs = []
for feature in FEATURE_CONFIG:
feat = FEATURE_CONFIG[feature]
if not 'lib_deps' in feat:
continue
for dep in feat['lib_deps']:
known_libs.append(PackageSpec(dep).name)
return known_libs
def get_all_env_libs():
env_libs = []
lib_deps = env.GetProjectOption('lib_deps')
for dep in lib_deps:
env_libs.append(PackageSpec(dep).name)
return env_libs
def set_env_field(field, value):
proj = env.GetProjectConfig()
proj.set("env:" + env['PIOENV'], field, value)
# All unused libs should be ignored so that if a library
# exists in .pio/lib_deps it will not break compilation.
def force_ignore_unused_libs():
env_libs = get_all_env_libs()
known_libs = get_all_known_libs()
diff = (list(set(known_libs) - set(env_libs)))
lib_ignore = env.GetProjectOption('lib_ignore') + diff
blab("Ignore libraries: %s" % lib_ignore)
set_env_field('lib_ignore', lib_ignore)
def apply_features_config():
load_config()
blab("========== Apply enabled features...")
for feature in FEATURE_CONFIG:
if not env.MarlinFeatureIsEnabled(feature):
continue
feat = FEATURE_CONFIG[feature]
if 'lib_deps' in feat and len(feat['lib_deps']):
blab("========== Adding lib_deps for %s... " % feature, 2)
# feat to add
deps_to_add = {}
for dep in feat['lib_deps']:
deps_to_add[PackageSpec(dep).name] = dep
blab("==================== %s... " % dep, 2)
# Does the env already have the dependency?
deps = env.GetProjectOption('lib_deps')
for dep in deps:
name = PackageSpec(dep).name
if name in deps_to_add:
del deps_to_add[name]
# Are there any libraries that should be ignored?
lib_ignore = env.GetProjectOption('lib_ignore')
for dep in deps:
name = PackageSpec(dep).name
if name in deps_to_add:
del deps_to_add[name]
# Is there anything left?
if len(deps_to_add) > 0:
# Only add the missing dependencies
set_env_field('lib_deps', deps + list(deps_to_add.values()))
if 'build_flags' in feat:
f = feat['build_flags']
blab("========== Adding build_flags for %s: %s" % (feature, f), 2)
new_flags = env.GetProjectOption('build_flags') + [ f ]
env.Replace(BUILD_FLAGS=new_flags)
if 'extra_scripts' in feat:
blab("Running extra_scripts for %s... " % feature, 2)
env.SConscript(feat['extra_scripts'], exports="env")
if 'src_filter' in feat:
blab("========== Adding src_filter for %s... " % feature, 2)
src_filter = ' '.join(env.GetProjectOption('src_filter'))
# first we need to remove the references to the same folder
my_srcs = re.findall(r'[+-](<.*?>)', feat['src_filter'])
cur_srcs = re.findall(r'[+-](<.*?>)', src_filter)
for d in my_srcs:
if d in cur_srcs:
src_filter = re.sub(r'[+-]' + d, '', src_filter)
src_filter = feat['src_filter'] + ' ' + src_filter
set_env_field('src_filter', [src_filter])
env.Replace(SRC_FILTER=src_filter)
if 'lib_ignore' in feat:
blab("========== Adding lib_ignore for %s... " % feature, 2)
lib_ignore = env.GetProjectOption('lib_ignore') + [feat['lib_ignore']]
set_env_field('lib_ignore', lib_ignore)
#
# Find a compiler, considering the OS
#
ENV_BUILD_PATH = os.path.join(env.Dictionary('PROJECT_BUILD_DIR'), env['PIOENV'])
GCC_PATH_CACHE = os.path.join(ENV_BUILD_PATH, ".gcc_path")
def search_compiler():
try:
filepath = env.GetProjectOption('custom_gcc')
blab("Getting compiler from env")
return filepath
except:
pass
if os.path.exists(GCC_PATH_CACHE):
with open(GCC_PATH_CACHE, 'r') as f:
return f.read()
# Find the current platform compiler by searching the $PATH
# which will be in a platformio toolchain bin folder
path_regex = re.escape(env['PROJECT_PACKAGES_DIR'])
# See if the environment provides a default compiler
try:
gcc = env.GetProjectOption('custom_deps_gcc')
except:
gcc = "g++"
if env['PLATFORM'] == 'win32':
path_separator = ';'
path_regex += r'.*\\bin'
gcc += ".exe"
else:
path_separator = ':'
path_regex += r'/.+/bin'
# Search for the compiler
for pathdir in env['ENV']['PATH'].split(path_separator):
if not re.search(path_regex, pathdir, re.IGNORECASE):
continue
for filepath in os.listdir(pathdir):
if not filepath.endswith(gcc):
continue
# Use entire path to not rely on env PATH
filepath = os.path.sep.join([pathdir, filepath])
# Cache the g++ path to no search always
if os.path.exists(ENV_BUILD_PATH):
with open(GCC_PATH_CACHE, 'w+') as f:
f.write(filepath)
return filepath
filepath = env.get('CXX')
if filepath == 'CC':
filepath = gcc
blab("Couldn't find a compiler! Fallback to %s" % filepath)
return filepath
#
# Use the compiler to get a list of all enabled features
#
def load_marlin_features():
if 'MARLIN_FEATURES' in env:
return
# Process defines
build_flags = env.get('BUILD_FLAGS')
build_flags = env.ParseFlagsExtended(build_flags)
cxx = search_compiler()
cmd = ['"' + cxx + '"']
# Build flags from board.json
#if 'BOARD' in env:
# cmd += [env.BoardConfig().get("build.extra_flags")]
for s in build_flags['CPPDEFINES']:
if isinstance(s, tuple):
cmd += ['-D' + s[0] + '=' + str(s[1])]
else:
cmd += ['-D' + s]
cmd += ['-D__MARLIN_DEPS__ -w -dM -E -x c++ buildroot/share/PlatformIO/scripts/common-dependencies.h']
cmd = ' '.join(cmd)
blab(cmd, 4)
define_list = subprocess.check_output(cmd, shell=True).splitlines()
marlin_features = {}
for define in define_list:
feature = define[8:].strip().decode().split(' ')
feature, definition = feature[0], ' '.join(feature[1:])
marlin_features[feature] = definition
env['MARLIN_FEATURES'] = marlin_features
#
# Return True if a matching feature is enabled
#
def MarlinFeatureIsEnabled(env, feature):
load_marlin_features()
r = re.compile('^' + feature + '$')
found = list(filter(r.match, env['MARLIN_FEATURES']))
# Defines could still be 'false' or '0', so check
some_on = False
if len(found):
for f in found:
val = env['MARLIN_FEATURES'][f]
if val in [ '', '1', 'true' ]:
some_on = True
elif val in env['MARLIN_FEATURES']:
some_on = env.MarlinFeatureIsEnabled(val)
return some_on
#
# Add a method for other PIO scripts to query enabled features
#
env.AddMethod(MarlinFeatureIsEnabled)
#
# Add dependencies for enabled Marlin features
#
apply_features_config()
force_ignore_unused_libs()

16
buildroot/share/PlatformIO/scripts/custom_board.py Normal file
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@@ -0,0 +1,16 @@
#
# buildroot/share/PlatformIO/scripts/custom_board.py
#
# - For build.address replace VECT_TAB_ADDR to relocate the firmware
# - For build.ldscript use one of the linker scripts in buildroot/share/PlatformIO/ldscripts
#
import marlin
board = marlin.env.BoardConfig()
address = board.get("build.address", "")
if address:
marlin.relocate_firmware(address)
ldscript = board.get("build.ldscript", "")
if ldscript:
marlin.custom_ld_script(ldscript)

46
buildroot/share/PlatformIO/scripts/download_mks_assets.py Normal file
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@@ -0,0 +1,46 @@
#
# buildroot/share/PlatformIO/scripts/download_mks_assets.py
# Added by HAS_TFT_LVGL_UI to download assets from Makerbase repo
#
Import("env")
import os,requests,zipfile,tempfile,shutil
url = "https://github.com/makerbase-mks/Mks-Robin-Nano-Marlin2.0-Firmware/archive/master.zip"
zip_path = os.path.join(env.Dictionary("PROJECT_LIBDEPS_DIR"), "mks-assets.zip")
assets_path = os.path.join(env.Dictionary("PROJECT_BUILD_DIR"), env.Dictionary("PIOENV"), "assets")
def download_mks_assets():
print("Downloading MKS Assets")
r = requests.get(url, stream=True)
# the user may have a very clean workspace,
# so create the PROJECT_LIBDEPS_DIR directory if not exits
if os.path.exists(env.Dictionary("PROJECT_LIBDEPS_DIR")) == False:
os.mkdir(env.Dictionary("PROJECT_LIBDEPS_DIR"))
with open(zip_path, 'wb') as fd:
for chunk in r.iter_content(chunk_size=128):
fd.write(chunk)
def copy_mks_assets():
print("Copying MKS Assets")
output_path = tempfile.mkdtemp()
zip_obj = zipfile.ZipFile(zip_path, 'r')
zip_obj.extractall(output_path)
zip_obj.close()
if os.path.exists(assets_path) == True and os.path.isdir(assets_path) == False:
os.unlink(assets_path)
if os.path.exists(assets_path) == False:
os.mkdir(assets_path)
base_path = ''
for filename in os.listdir(output_path):
base_path = filename
for filename in os.listdir(os.path.join(output_path, base_path, 'Firmware', 'mks_font')):
shutil.copy(os.path.join(output_path, base_path, 'Firmware', 'mks_font', filename), assets_path)
for filename in os.listdir(os.path.join(output_path, base_path, 'Firmware', 'mks_pic')):
shutil.copy(os.path.join(output_path, base_path, 'Firmware', 'mks_pic', filename), assets_path)
shutil.rmtree(output_path, ignore_errors=True)
if os.path.exists(zip_path) == False:
download_mks_assets()
if os.path.exists(assets_path) == False:
copy_mks_assets()

104
buildroot/share/PlatformIO/scripts/exc.S Normal file
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@@ -0,0 +1,104 @@
/* *****************************************************************************
* The MIT License
*
* Copyright (c) 2010 Perry Hung.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
* ****************************************************************************/
# On an exception, push a fake stack thread mode stack frame and redirect
# thread execution to a thread mode error handler
# From RM008:
# The SP is decremented by eight words by the completion of the stack push.
# Figure 5-1 shows the contents of the stack after an exception pre-empts the
# current program flow.
#
# Old SP--> <previous>
# xPSR
# PC
# LR
# r12
# r3
# r2
# r1
# SP--> r0
.text
.globl __exc_nmi
.weak __exc_nmi
.globl __exc_hardfault
.weak __exc_hardfault
.globl __exc_memmanage
.weak __exc_memmanage
.globl __exc_busfault
.weak __exc_busfault
.globl __exc_usagefault
.weak __exc_usagefault
.code 16
.thumb_func
__exc_nmi:
mov r0, #1
b __default_exc
.thumb_func
__exc_hardfault:
mov r0, #2
b __default_exc
.thumb_func
__exc_memmanage:
mov r0, #3
b __default_exc
.thumb_func
__exc_busfault:
mov r0, #4
b __default_exc
.thumb_func
__exc_usagefault:
mov r0, #5
b __default_exc
.thumb_func
__default_exc:
ldr r2, NVIC_CCR @ Enable returning to thread mode even if there are
mov r1 ,#1 @ pending exceptions. See flag NONEBASETHRDENA.
str r1, [r2]
cpsid i @ Disable global interrupts
ldr r2, SYSTICK_CSR @ Disable systick handler
mov r1, #0
str r1, [r2]
ldr r1, CPSR_MASK @ Set default CPSR
push {r1}
ldr r1, TARGET_PC @ Set target pc
push {r1}
sub sp, sp, #24 @ Don't care
ldr r1, EXC_RETURN @ Return to thread mode
mov lr, r1
bx lr @ Exception exit
.align 4
CPSR_MASK: .word 0x61000000
EXC_RETURN: .word 0xFFFFFFF9
TARGET_PC: .word __error
NVIC_CCR: .word 0xE000ED14 @ NVIC configuration control register
SYSTICK_CSR: .word 0xE000E010 @ Systick control register

32
buildroot/share/PlatformIO/scripts/fix_framework_weakness.py Normal file
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@@ -0,0 +1,32 @@
#
# fix_framework_weakness.py
#
from os.path import join, isfile
import shutil
from pprint import pprint
Import("env")
if env.MarlinFeatureIsEnabled("POSTMORTEM_DEBUGGING"):
FRAMEWORK_DIR = env.PioPlatform().get_package_dir("framework-arduinoststm32-maple")
patchflag_path = join(FRAMEWORK_DIR, ".exc-patching-done")
# patch file only if we didn't do it before
if not isfile(patchflag_path):
print("Patching libmaple exception handlers")
original_file = join(FRAMEWORK_DIR, "STM32F1", "cores", "maple", "libmaple", "exc.S")
backup_file = join(FRAMEWORK_DIR, "STM32F1", "cores", "maple", "libmaple", "exc.S.bak")
src_file = join("buildroot", "share", "PlatformIO", "scripts", "exc.S")
assert isfile(original_file) and isfile(src_file)
shutil.copyfile(original_file, backup_file)
shutil.copyfile(src_file, original_file);
def _touch(path):
with open(path, "w") as fp:
fp.write("")
env.Execute(lambda *args, **kwargs: _touch(patchflag_path))
print("Done patching exception handler")
print("Libmaple modified and ready for post mortem debugging")

55
buildroot/share/PlatformIO/scripts/fysetc_STM32S6.py
View File

@@ -1,55 +0,0 @@
from os.path import join
Import("env")
import os,shutil
from SCons.Script import DefaultEnvironment
from platformio import util
env = DefaultEnvironment()
platform = env.PioPlatform()
board = env.BoardConfig()
FRAMEWORK_DIR = platform.get_package_dir("framework-arduinoststm32")
#FRAMEWORK_DIR = platform.get_package_dir("framework-arduinoststm32@3.10500.190327")
CMSIS_DIR = os.path.join(FRAMEWORK_DIR, "CMSIS", "CMSIS")
assert os.path.isdir(FRAMEWORK_DIR)
assert os.path.isdir(CMSIS_DIR)
assert os.path.isdir("buildroot/share/PlatformIO/variants")
mcu_type = board.get("build.mcu")[:-2]
variant = board.get("build.variant")
series = mcu_type[:7].upper() + "xx"
variant_dir = os.path.join(FRAMEWORK_DIR, "variants", variant)
source_dir = os.path.join("buildroot/share/PlatformIO/variants", variant)
assert os.path.isdir(source_dir)
if not os.path.isdir(variant_dir):
os.mkdir(variant_dir)
for file_name in os.listdir(source_dir):
full_file_name = os.path.join(source_dir, file_name)
if os.path.isfile(full_file_name):
shutil.copy(full_file_name, variant_dir)
# Relocate firmware from 0x08000000 to 0x08002000
#env['CPPDEFINES'].remove(("VECT_TAB_ADDR", 134217728))
#env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08010000"))
#env.Replace(LDSCRIPT_PATH="buildroot/share/PlatformIO/ldscripts/fysetc_aio_ii.ld")
# Custom HEX from ELF
env.AddPostAction(
"$BUILD_DIR/${PROGNAME}.elf",
env.VerboseAction(" ".join([
"$OBJCOPY",
"-O",
"ihex",
"$BUILD_DIR/${PROGNAME}.elf",
"$BUILD_DIR/${PROGNAME}.hex"
]), "Building $TARGET"))
# In-line command with arguments
env.Replace(
UPLOADER=platform.get_package_dir("tool-stm32duino") + '/stm32flash/stm32flash',
UPLOADCMD='"${UPLOADER}" -v -i rts,-dtr,dtr,-rts -R -b 115200 -g 0x8000000 -w "${BUILD_DIR}/${PROGNAME}.hex" ${UPLOAD_PORT}'
)

57
buildroot/share/PlatformIO/scripts/generic_create_variant.py Executable file → Normal file
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@@ -1,27 +1,54 @@
import os,shutil
#
# generic_create_variant.py
#
# Copy one of the variants from buildroot/platformio/variants into
# the appropriate framework variants folder, so that its contents
# will be picked up by PlatformIO just like any other variant.
#
import os,shutil,marlin
from SCons.Script import DefaultEnvironment
from platformio import util
env = DefaultEnvironment()
#
# Get the platform name from the 'platform_packages' option,
# or look it up by the platform.class.name.
#
platform = env.PioPlatform()
from platformio.package.meta import PackageSpec
platform_packages = env.GetProjectOption('platform_packages')
if len(platform_packages) == 0:
framewords = {
"Ststm32Platform": "framework-arduinoststm32",
"AtmelavrPlatform": "framework-arduino-avr"
}
platform_name = framewords[platform.__class__.__name__]
else:
platform_name = PackageSpec(platform_packages[0]).name
if platform_name in [ "usb-host-msc", "usb-host-msc-cdc-msc", "usb-host-msc-cdc-msc-2", "usb-host-msc-cdc-msc-3", "tool-stm32duino" ]:
platform_name = "framework-arduinoststm32"
FRAMEWORK_DIR = platform.get_package_dir(platform_name)
assert os.path.isdir(FRAMEWORK_DIR)
board = env.BoardConfig()
FRAMEWORK_DIR = platform.get_package_dir("framework-arduinoststm32")
assert os.path.isdir(FRAMEWORK_DIR)
assert os.path.isdir("buildroot/share/PlatformIO/variants")
mcu_type = board.get("build.mcu")[:-2]
#mcu_type = board.get("build.mcu")[:-2]
variant = board.get("build.variant")
series = mcu_type[:7].upper() + "xx"
#series = mcu_type[:7].upper() + "xx"
# Prepare a new empty folder at the destination
variant_dir = os.path.join(FRAMEWORK_DIR, "variants", variant)
source_dir = os.path.join("buildroot/share/PlatformIO/variants", variant)
assert os.path.isdir(source_dir)
if os.path.isdir(variant_dir):
shutil.rmtree(variant_dir)
if not os.path.isdir(variant_dir):
os.mkdir(variant_dir)
for file_name in os.listdir(source_dir):
full_file_name = os.path.join(source_dir, file_name)
if os.path.isfile(full_file_name):
shutil.copy(full_file_name, variant_dir)
# Source dir is a local variant sub-folder
source_dir = os.path.join("buildroot/share/PlatformIO/variants", variant)
assert os.path.isdir(source_dir)
marlin.copytree(source_dir, variant_dir)

51
buildroot/share/PlatformIO/scripts/jgaurora_a5s_a1_with_bootloader.py Executable file → Normal file
View File

@@ -1,30 +1,21 @@
import os
Import("env")
#
# buildroot/share/PlatformIO/scripts/jgaurora_a5s_a1_with_bootloader.py
# Customizations for env:jgaurora_a5s_a1
#
import os,marlin
# Relocate firmware from 0x08000000 to 0x0800A000
env['CPPDEFINES'].remove(("VECT_TAB_ADDR", "0x8000000"))
#alternatively, for STSTM <=5.1.0 use line below
#env['CPPDEFINES'].remove(("VECT_TAB_ADDR", 134217728))
env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x0800A000"))
custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/jgaurora_a5s_a1.ld")
for i, flag in enumerate(env["LINKFLAGS"]):
if "-Wl,-T" in flag:
env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
elif flag == "-T":
env["LINKFLAGS"][i + 1] = custom_ld_script
#append ${PROGNAME}.bin firmware after bootloader and save it as 'jgaurora_firmware.bin'
def addboot(source,target,env):
# Append ${PROGNAME}.bin firmware after bootloader and save it as 'jgaurora_firmware.bin'
def addboot(source, target, env):
firmware = open(target[0].path, "rb")
lengthfirmware = os.path.getsize(target[0].path)
bootloader_dir = "buildroot/share/PlatformIO/scripts/jgaurora_bootloader.bin"
bootloader = open(bootloader_dir, "rb")
lengthbootloader = os.path.getsize(bootloader_dir)
firmware_with_boothloader_dir = target[0].dir.path +'/firmware_with_bootloader.bin'
if os.path.exists(firmware_with_boothloader_dir):
os.remove(firmware_with_boothloader_dir)
firmwareimage = open(firmware_with_boothloader_dir, "wb")
bootloader_bin = "buildroot/share/PlatformIO/scripts/" + "jgaurora_bootloader.bin"
bootloader = open(bootloader_bin, "rb")
lengthbootloader = os.path.getsize(bootloader_bin)
firmware_with_boothloader_bin = target[0].dir.path + '/firmware_with_bootloader.bin'
if os.path.exists(firmware_with_boothloader_bin):
os.remove(firmware_with_boothloader_bin)
firmwareimage = open(firmware_with_boothloader_bin, "wb")
position = 0
while position < lengthbootloader:
byte = bootloader.read(1)
@@ -38,11 +29,11 @@ def addboot(source,target,env):
bootloader.close()
firmware.close()
firmwareimage.close()
firmware_without_bootloader_dir = target[0].dir.path+'/firmware_for_sd_upload.bin'
if os.path.exists(firmware_without_bootloader_dir):
os.remove(firmware_without_bootloader_dir)
os.rename(target[0].path, firmware_without_bootloader_dir)
firmware_without_bootloader_bin = target[0].dir.path + '/firmware_for_sd_upload.bin'
if os.path.exists(firmware_without_bootloader_bin):
os.remove(firmware_without_bootloader_bin)
os.rename(target[0].path, firmware_without_bootloader_bin)
#os.rename(target[0].dir.path+'/firmware_with_bootloader.bin', target[0].dir.path+'/firmware.bin')
env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", addboot);
marlin.add_post_action(addboot);

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buildroot/share/PlatformIO/scripts/jgaurora_bootloader.bin Normal file
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48
buildroot/share/PlatformIO/scripts/lerdge.py Normal file
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@@ -0,0 +1,48 @@
#
# buildroot/share/PlatformIO/scripts/lerdge.py
# Customizations for Lerdge build environments:
# env:LERDGEX env:LERDGEX_usb_flash_drive
# env:LERDGES env:LERDGES_usb_flash_drive
# env:LERDGEK env:LERDGEK_usb_flash_drive
#
import os,marlin
Import("env")
from SCons.Script import DefaultEnvironment
board = DefaultEnvironment().BoardConfig()
def encryptByte(byte):
byte = 0xFF & ((byte << 6) | (byte >> 2))
i = 0x58 + byte
j = 0x05 + byte + (i >> 8)
byte = (0xF8 & i) | (0x07 & j)
return byte
def encrypt_file(input, output_file, file_length):
input_file = bytearray(input.read())
for i in range(len(input_file)):
result = encryptByte(input_file[i])
input_file[i] = result
output_file.write(input_file)
return
# Encrypt ${PROGNAME}.bin and save it with the name given in build.encrypt
def encrypt(source, target, env):
fwname = board.get("build.encrypt")
print("Encrypting %s to %s" % (target[0].path, fwname))
firmware = open(target[0].path, "rb")
renamed = open(target[0].dir.path + "/" + fwname, "wb")
length = os.path.getsize(target[0].path)
encrypt_file(firmware, renamed, length)
firmware.close()
renamed.close()
if 'encrypt' in board.get("build").keys():
if board.get("build.encrypt") != "":
marlin.add_post_action(encrypt)
else:
print("LERDGE builds require output file via board_build.encrypt = 'filename' parameter")
exit(1)

69
buildroot/share/PlatformIO/scripts/marlin.py Normal file
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#
# buildroot/share/PlatformIO/scripts/marlin.py
# Helper module with some commonly-used functions
#
import os,shutil
from SCons.Script import DefaultEnvironment
env = DefaultEnvironment()
from os.path import join
def copytree(src, dst, symlinks=False, ignore=None):
for item in os.listdir(src):
s = join(src, item)
d = join(dst, item)
if os.path.isdir(s):
shutil.copytree(s, d, symlinks, ignore)
else:
shutil.copy2(s, d)
def replace_define(field, value):
for define in env['CPPDEFINES']:
if define[0] == field:
env['CPPDEFINES'].remove(define)
env['CPPDEFINES'].append((field, value))
# Relocate the firmware to a new address, such as "0x08005000"
def relocate_firmware(address):
replace_define("VECT_TAB_ADDR", address)
# Relocate the vector table with a new offset
def relocate_vtab(address):
replace_define("VECT_TAB_OFFSET", address)
# Replace the existing -Wl,-T with the given ldscript path
def custom_ld_script(ldname):
apath = os.path.abspath("buildroot/share/PlatformIO/ldscripts/" + ldname)
for i, flag in enumerate(env["LINKFLAGS"]):
if "-Wl,-T" in flag:
env["LINKFLAGS"][i] = "-Wl,-T" + apath
elif flag == "-T":
env["LINKFLAGS"][i + 1] = apath
# Encrypt ${PROGNAME}.bin and save it with a new name
# Called by specific encrypt() functions, mostly for MKS boards
def encrypt_mks(source, target, env, new_name):
import sys
key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E]
firmware = open(target[0].path, "rb")
renamed = open(target[0].dir.path + "/" + new_name, "wb")
length = os.path.getsize(target[0].path)
position = 0
try:
while position < length:
byte = firmware.read(1)
if position >= 320 and position < 31040:
byte = chr(ord(byte) ^ key[position & 31])
if sys.version_info[0] > 2:
byte = bytes(byte, 'latin1')
renamed.write(byte)
position += 1
finally:
firmware.close()
renamed.close()
def add_post_action(action):
env.AddPostAction(join("$BUILD_DIR", "${PROGNAME}.bin"), action);

44
buildroot/share/PlatformIO/scripts/mks_robin.py Executable file → Normal file
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@@ -1,39 +1,5 @@
import os
Import("env")
# Relocate firmware from 0x08000000 to 0x08007000
for define in env['CPPDEFINES']:
if define[0] == "VECT_TAB_ADDR":
env['CPPDEFINES'].remove(define)
env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08007000"))
custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/mks_robin.ld")
for i, flag in enumerate(env["LINKFLAGS"]):
if "-Wl,-T" in flag:
env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
elif flag == "-T":
env["LINKFLAGS"][i + 1] = custom_ld_script
# Encrypt ${PROGNAME}.bin and save it as 'Robin.bin'
def encrypt(source, target, env):
import sys
key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E]
firmware = open(target[0].path, "rb")
robin = open(target[0].dir.path +'/Robin.bin', "wb")
length = os.path.getsize(target[0].path)
position = 0
try:
while position < length:
byte = firmware.read(1)
if position >= 320 and position < 31040:
byte = chr(ord(byte) ^ key[position & 31])
if sys.version_info[0] > 2:
byte = bytes(byte, 'latin1')
robin.write(byte)
position += 1
finally:
firmware.close()
robin.close()
env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);
#
# buildroot/share/PlatformIO/scripts/mks_robin.py
#
import robin
robin.prepare("0x08007000", "mks_robin.ld", "Robin.bin")

5
buildroot/share/PlatformIO/scripts/mks_robin_e3.py Normal file
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@@ -0,0 +1,5 @@
#
# buildroot/share/PlatformIO/scripts/mks_robin_e3.py
#
import robin
robin.prepare("0x08005000", "mks_robin_e3.ld", "Robin_e3.bin")

5
buildroot/share/PlatformIO/scripts/mks_robin_e3p.py Normal file
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@@ -0,0 +1,5 @@
#
# buildroot/share/PlatformIO/scripts/mks_robin_e3p.py
#
import robin
robin.prepare("0x08007000", "mks_robin_e3p.ld", "Robin_e3p.bin")

45
buildroot/share/PlatformIO/scripts/mks_robin_lite.py Executable file → Normal file
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@@ -1,40 +1,5 @@
import os
Import("env")
# Relocate firmware from 0x08000000 to 0x08005000
for define in env['CPPDEFINES']:
if define[0] == "VECT_TAB_ADDR":
env['CPPDEFINES'].remove(define)
env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08005000"))
custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/mks_robin_lite.ld")
for i, flag in enumerate(env["LINKFLAGS"]):
if "-Wl,-T" in flag:
env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
elif flag == "-T":
env["LINKFLAGS"][i + 1] = custom_ld_script
# Encrypt ${PROGNAME}.bin and save it as 'mksLite.bin'
def encrypt(source, target, env):
import sys
key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E]
firmware = open(target[0].path, "rb")
robin = open(target[0].dir.path +'/mksLite.bin', "wb")
length = os.path.getsize(target[0].path)
position = 0
try:
while position < length:
byte = firmware.read(1)
if position >= 320 and position < 31040:
byte = chr(ord(byte) ^ key[position & 31])
if sys.version_info[0] > 2:
byte = bytes(byte, 'latin1')
robin.write(byte)
position += 1
finally:
firmware.close()
robin.close()
env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);
#
# buildroot/share/PlatformIO/scripts/mks_robin_lite.py
#
import robin
robin.prepare("0x08005000", "mks_robin_lite.ld", "mksLite.bin")

45
buildroot/share/PlatformIO/scripts/mks_robin_lite3.py Executable file → Normal file
View File

@@ -1,40 +1,5 @@
import os
Import("env")
# Relocate firmware from 0x08000000 to 0x08005000
for define in env['CPPDEFINES']:
if define[0] == "VECT_TAB_ADDR":
env['CPPDEFINES'].remove(define)
env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08005000"))
custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/mks_robin_lite.ld")
for i, flag in enumerate(env["LINKFLAGS"]):
if "-Wl,-T" in flag:
env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
elif flag == "-T":
env["LINKFLAGS"][i + 1] = custom_ld_script
# Encrypt ${PROGNAME}.bin and save it as 'mksLite.bin'
def encrypt(source, target, env):
import sys
key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E]
firmware = open(target[0].path, "rb")
robin = open(target[0].dir.path +'/mksLite3.bin', "wb")
length = os.path.getsize(target[0].path)
position = 0
try:
while position < length:
byte = firmware.read(1)
if position >= 320 and position < 31040:
byte = chr(ord(byte) ^ key[position & 31])
if sys.version_info[0] > 2:
byte = bytes(byte, 'latin1')
robin.write(byte)
position += 1
finally:
firmware.close()
robin.close()
env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);
#
# buildroot/share/PlatformIO/scripts/mks_robin_lite3.py
#
import robin
robin.prepare("0x08005000", "mks_robin_lite.ld", "mksLite3.bin")

45
buildroot/share/PlatformIO/scripts/mks_robin_mini.py Executable file → Normal file
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@@ -1,40 +1,5 @@
import os
Import("env")
# Relocate firmware from 0x08000000 to 0x08007000
for define in env['CPPDEFINES']:
if define[0] == "VECT_TAB_ADDR":
env['CPPDEFINES'].remove(define)
env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08007000"))
custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/mks_robin_mini.ld")
for i, flag in enumerate(env["LINKFLAGS"]):
if "-Wl,-T" in flag:
env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
elif flag == "-T":
env["LINKFLAGS"][i + 1] = custom_ld_script
# Encrypt ${PROGNAME}.bin and save it as 'Robin_mini.bin'
def encrypt(source, target, env):
import sys
key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E]
firmware = open(target[0].path, "rb")
robin = open(target[0].dir.path +'/Robin_mini.bin', "wb")
length = os.path.getsize(target[0].path)
position = 0
try:
while position < length:
byte = firmware.read(1)
if position >= 320 and position < 31040:
byte = chr(ord(byte) ^ key[position & 31])
if sys.version_info[0] > 2:
byte = bytes(byte, 'latin1')
robin.write(byte)
position += 1
finally:
firmware.close()
robin.close()
env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);
#
# buildroot/share/PlatformIO/scripts/mks_robin_mini.py
#
import robin
robin.prepare("0x08007000", "mks_robin_mini.ld", "Robin_mini.bin")

45
buildroot/share/PlatformIO/scripts/mks_robin_nano.py Executable file → Normal file
View File

@@ -1,40 +1,5 @@
import os
Import("env")
# Relocate firmware from 0x08000000 to 0x08007000
for define in env['CPPDEFINES']:
if define[0] == "VECT_TAB_ADDR":
env['CPPDEFINES'].remove(define)
env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08007000"))
custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/mks_robin_nano.ld")
for i, flag in enumerate(env["LINKFLAGS"]):
if "-Wl,-T" in flag:
env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
elif flag == "-T":
env["LINKFLAGS"][i + 1] = custom_ld_script
# Encrypt ${PROGNAME}.bin and save it as 'Robin_nano.bin'
def encrypt(source, target, env):
import sys
key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E]
firmware = open(target[0].path, "rb")
robin = open(target[0].dir.path +'/Robin_nano.bin', "wb")
length = os.path.getsize(target[0].path)
position = 0
try:
while position < length:
byte = firmware.read(1)
if position >= 320 and position < 31040:
byte = chr(ord(byte) ^ key[position & 31])
if sys.version_info[0] > 2:
byte = bytes(byte, 'latin1')
robin.write(byte)
position += 1
finally:
firmware.close()
robin.close()
env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);
#
# buildroot/share/PlatformIO/scripts/mks_robin_nano.py
#
import robin
robin.prepare("0x08007000", "mks_robin_nano.ld", "Robin_nano.bin")

5
buildroot/share/PlatformIO/scripts/mks_robin_nano35.py Normal file
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@@ -0,0 +1,5 @@
#
# buildroot/share/PlatformIO/scripts/mks_robin_nano35.py
#
import robin
robin.prepare("0x08007000", "mks_robin_nano.ld", "Robin_nano35.bin")

44
buildroot/share/PlatformIO/scripts/mks_robin_pro.py Executable file → Normal file
View File

@@ -1,39 +1,5 @@
import os
Import("env")
# Relocate firmware from 0x08000000 to 0x08007000
for define in env['CPPDEFINES']:
if define[0] == "VECT_TAB_ADDR":
env['CPPDEFINES'].remove(define)
env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08007000"))
custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/mks_robin_pro.ld")
for i, flag in enumerate(env["LINKFLAGS"]):
if "-Wl,-T" in flag:
env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
elif flag == "-T":
env["LINKFLAGS"][i + 1] = custom_ld_script
# Encrypt ${PROGNAME}.bin and save it as 'Robin.bin'
def encrypt(source, target, env):
import sys
key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E]
firmware = open(target[0].path, "rb")
robin = open(target[0].dir.path +'/Robin_pro.bin', "wb")
length = os.path.getsize(target[0].path)
position = 0
try:
while position < length:
byte = firmware.read(1)
if position >= 320 and position < 31040:
byte = chr(ord(byte) ^ key[position & 31])
if sys.version_info[0] > 2:
byte = bytes(byte, 'latin1')
robin.write(byte)
position += 1
finally:
firmware.close()
robin.close()
env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);
#
# buildroot/share/PlatformIO/scripts/mks_robin_pro.py
#
import robin
robin.prepare("0x08007000", "mks_robin_pro.ld", "Robin_pro.bin")

61
buildroot/share/PlatformIO/scripts/offset_and_rename.py Normal file
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@@ -0,0 +1,61 @@
#
# offset_and_rename.py
#
# - If 'build.offset' is provided, either by JSON or by the environment...
# - Set linker flag LD_FLASH_OFFSET and relocate the VTAB based on 'build.offset'.
# - Set linker flag LD_MAX_DATA_SIZE based on 'build.maximum_ram_size'.
# - Define STM32_FLASH_SIZE from 'upload.maximum_size' for use by Flash-based EEPROM emulation.
#
# - For 'board_build.rename' add a post-action to rename the firmware file.
#
import os,sys,marlin
Import("env")
from SCons.Script import DefaultEnvironment
board = DefaultEnvironment().BoardConfig()
board_keys = board.get("build").keys()
#
# For build.offset define LD_FLASH_OFFSET, used by ldscript.ld
#
if 'offset' in board_keys:
LD_FLASH_OFFSET = board.get("build.offset")
marlin.relocate_vtab(LD_FLASH_OFFSET)
# Flash size
maximum_flash_size = int(board.get("upload.maximum_size") / 1024)
marlin.replace_define('STM32_FLASH_SIZE', maximum_flash_size)
# Get upload.maximum_ram_size (defined by /buildroot/share/PlatformIO/boards/VARIOUS.json)
maximum_ram_size = board.get("upload.maximum_ram_size")
for i, flag in enumerate(env["LINKFLAGS"]):
if "-Wl,--defsym=LD_FLASH_OFFSET" in flag:
env["LINKFLAGS"][i] = "-Wl,--defsym=LD_FLASH_OFFSET=" + LD_FLASH_OFFSET
if "-Wl,--defsym=LD_MAX_DATA_SIZE" in flag:
env["LINKFLAGS"][i] = "-Wl,--defsym=LD_MAX_DATA_SIZE=" + str(maximum_ram_size - 40)
#
# For build.encrypt rename and encode the firmware file.
#
if 'encrypt' in board_keys:
# Encrypt ${PROGNAME}.bin and save it with the name given in build.encrypt
def encrypt(source, target, env):
marlin.encrypt_mks(source, target, env, board.get("build.encrypt"))
if board.get("build.encrypt") != "":
marlin.add_post_action(encrypt)
#
# For build.rename simply rename the firmware file.
#
if 'rename' in board_keys:
def rename_target(source, target, env):
firmware = os.path.join(target[0].dir.path, board.get("build.rename"))
import shutil
shutil.copy(target[0].path, firmware)
marlin.add_post_action(rename_target)

18
buildroot/share/PlatformIO/scripts/openblt.py Normal file
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@@ -0,0 +1,18 @@
#
# Convert the ELF to an SREC file suitable for some bootloaders
#
import os,sys
from os.path import join
Import("env")
board = env.BoardConfig()
board_keys = board.get("build").keys()
if 'encrypt' in board_keys:
env.AddPostAction(
join("$BUILD_DIR", "${PROGNAME}.bin"),
env.VerboseAction(" ".join([
"$OBJCOPY", "-O", "srec",
"\"$BUILD_DIR/${PROGNAME}.elf\"", "\"" + join("$BUILD_DIR", board.get("build.encrypt")) + "\""
]), "Building $TARGET")
)

100
buildroot/share/PlatformIO/scripts/preflight-checks.py Normal file
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@@ -0,0 +1,100 @@
#
# preflight-checks.py
# Check for common issues prior to compiling
#
import os,re,sys
Import("env")
def get_envs_for_board(board):
with open(os.path.join("Marlin", "src", "pins", "pins.h"), "r") as file:
if sys.platform == 'win32':
envregex = r"(?:env|win):"
elif sys.platform == 'darwin':
envregex = r"(?:env|mac|uni):"
elif sys.platform == 'linux':
envregex = r"(?:env|lin|uni):"
else:
envregex = r"(?:env):"
r = re.compile(r"if\s+MB\((.+)\)")
if board.startswith("BOARD_"):
board = board[6:]
for line in file:
mbs = r.findall(line)
if mbs and board in re.split(r",\s*", mbs[0]):
line = file.readline()
found_envs = re.match(r"\s*#include .+" + envregex, line)
if found_envs:
envlist = re.findall(envregex + r"(\w+)", line)
return [ "env:"+s for s in envlist ]
return []
def check_envs(build_env, board_envs, config):
if build_env in board_envs:
return True
ext = config.get(build_env, 'extends', default=None)
if ext:
if isinstance(ext, str):
return check_envs(ext, board_envs, config)
elif isinstance(ext, list):
for ext_env in ext:
if check_envs(ext_env, board_envs, config):
return True
return False
def sanity_check_target():
# Sanity checks:
if 'PIOENV' not in env:
raise SystemExit("Error: PIOENV is not defined. This script is intended to be used with PlatformIO")
if 'MARLIN_FEATURES' not in env:
raise SystemExit("Error: this script should be used after common Marlin scripts")
if 'MOTHERBOARD' not in env['MARLIN_FEATURES']:
raise SystemExit("Error: MOTHERBOARD is not defined in Configuration.h")
build_env = env['PIOENV']
motherboard = env['MARLIN_FEATURES']['MOTHERBOARD']
board_envs = get_envs_for_board(motherboard)
config = env.GetProjectConfig()
result = check_envs("env:"+build_env, board_envs, config)
if not result:
err = "Error: Build environment '%s' is incompatible with %s. Use one of these: %s" % \
( build_env, motherboard, ", ".join([ e[4:] for e in board_envs if e.startswith("env:") ]) )
raise SystemExit(err)
#
# Check for Config files in two common incorrect places
#
for p in [ env['PROJECT_DIR'], os.path.join(env['PROJECT_DIR'], "config") ]:
for f in [ "Configuration.h", "Configuration_adv.h" ]:
if os.path.isfile(os.path.join(p, f)):
err = "ERROR: Config files found in directory %s. Please move them into the Marlin subfolder." % p
raise SystemExit(err)
#
# Give warnings on every build
#
warnfile = os.path.join(env['PROJECT_BUILD_DIR'], build_env, "src", "src", "inc", "Warnings.cpp.o")
if os.path.exists(warnfile):
os.remove(warnfile)
#
# Check for old files indicating an entangled Marlin (mixing old and new code)
#
mixedin = []
p = os.path.join(env['PROJECT_DIR'], "Marlin", "src", "lcd", "dogm")
for f in [ "ultralcd_DOGM.cpp", "ultralcd_DOGM.h" ]:
if os.path.isfile(os.path.join(p, f)):
mixedin += [ f ]
if mixedin:
err = "ERROR: Old files fell into your Marlin folder. Remove %s and try again" % ", ".join(mixedin)
raise SystemExit(err)
# Detect that 'vscode init' is running
from SCons.Script import COMMAND_LINE_TARGETS
if "idedata" not in COMMAND_LINE_TARGETS:
sanity_check_target()

9
buildroot/share/PlatformIO/scripts/random-bin.py Normal file
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@@ -0,0 +1,9 @@
#
# random-bin.py
# Set a unique firmware name based on current date and time
#
Import("env")
from datetime import datetime
env['PROGNAME'] = datetime.now().strftime("firmware-%Y%m%d-%H%M%S")

12
buildroot/share/PlatformIO/scripts/robin.py Normal file
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@@ -0,0 +1,12 @@
#
# buildroot/share/PlatformIO/scripts/robin.py
#
import marlin
# Apply customizations for a MKS Robin
def prepare(address, ldname, fwname):
def encrypt(source, target, env):
marlin.encrypt_mks(source, target, env, fwname)
marlin.relocate_firmware(address)
marlin.custom_ld_script(ldname)
marlin.add_post_action(encrypt);

52
buildroot/share/PlatformIO/scripts/simulator.py Normal file
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#
# PlatformIO pre: script for simulator builds
#
# Get the environment thus far for the build
Import("env")
#print(env.Dump())
#
# Give the binary a distinctive name
#
env['PROGNAME'] = "MarlinSimulator"
#
# If Xcode is installed add the path to its Frameworks folder,
# or if Mesa is installed try to use its GL/gl.h.
#
import sys
if sys.platform == 'darwin':
#
# Silence half of the ranlib warnings. (No equivalent for 'ARFLAGS')
#
env['RANLIBFLAGS'] += [ "-no_warning_for_no_symbols" ]
# Default paths for Xcode and a lucky GL/gl.h dropped by Mesa
xcode_path = "/Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX.sdk/System/Library/Frameworks"
mesa_path = "/opt/local/include/GL/gl.h"
import os.path
if os.path.exists(xcode_path):
env['BUILD_FLAGS'] += [ "-F" + xcode_path ]
print("Using OpenGL framework headers from Xcode.app")
elif os.path.exists(mesa_path):
env['BUILD_FLAGS'] += [ '-D__MESA__' ]
print("Using OpenGL header from", mesa_path)
else:
print("\n\nNo OpenGL headers found. Install Xcode for matching headers, or use 'sudo port install mesa' to get a GL/gl.h.\n\n")
# Break out of the PIO build immediately
sys.exit(1)
env.AddCustomTarget("upload", "$BUILD_DIR/${PROGNAME}", "$BUILD_DIR/${PROGNAME}")

59
buildroot/share/PlatformIO/scripts/stm32_serialbuffer.py Normal file
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#
# stm32_serialbuffer.py
#
Import("env")
# Marlin uses the `RX_BUFFER_SIZE` \ `TX_BUFFER_SIZE` options to
# configure buffer sizes for receiving \ transmitting serial data.
# Stm32duino uses another set of defines for the same purpose, so this
# script gets the values from the configuration and uses them to define
# `SERIAL_RX_BUFFER_SIZE` and `SERIAL_TX_BUFFER_SIZE` as global build
# flags so they are available for use by the platform.
#
# The script will set the value as the default one (64 bytes)
# or the user-configured one, whichever is higher.
#
# Marlin's default buffer sizes are 128 for RX and 32 for TX.
# The highest value is taken (128/64).
#
# If MF_*_BUFFER_SIZE, SERIAL_*_BUFFER_SIZE, USART_*_BUF_SIZE, are
# defined, the first of these values will be used as the minimum.
build_flags = env.ParseFlags(env.get('BUILD_FLAGS'))["CPPDEFINES"]
mf = env["MARLIN_FEATURES"]
# Get a build flag's value or None
def getBuildFlagValue(name):
for flag in build_flags:
if isinstance(flag, list) and flag[0] == name:
return flag[1]
return None
# Get an overriding buffer size for RX or TX from the build flags
def getInternalSize(side):
return getBuildFlagValue(f"MF_{side}_BUFFER_SIZE") or \
getBuildFlagValue(f"SERIAL_{side}_BUFFER_SIZE") or \
getBuildFlagValue(f"USART_{side}_BUF_SIZE")
# Get the largest defined buffer size for RX or TX
def getBufferSize(side, default):
# Get a build flag value or fall back to the given default
internal = int(getInternalSize(side) or default)
flag = side + "_BUFFER_SIZE"
# Return the largest value
return max(int(mf[flag]), internal) if flag in mf else internal
# Add a build flag if it's not already defined
def tryAddFlag(name, value):
if getBuildFlagValue(name) is None:
env.Append(BUILD_FLAGS=[f"-D{name}={value}"])
# Get the largest defined buffer sizes for RX or TX, using defaults for undefined
rxBuf = getBufferSize("RX", 128)
txBuf = getBufferSize("TX", 64)
# Provide serial buffer sizes to the stm32duino platform
tryAddFlag("SERIAL_RX_BUFFER_SIZE", rxBuf)
tryAddFlag("SERIAL_TX_BUFFER_SIZE", txBuf)
tryAddFlag("USART_RX_BUF_SIZE", rxBuf)
tryAddFlag("USART_TX_BUF_SIZE", txBuf)

2
buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/.gitignore vendored Normal file
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# Exception for libsam
!libsam_sam3x8e_gcc_rel.a

42
buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/build_gcc/Makefile Normal file
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#
# Copyright (c) 2011 Arduino. All right reserved.
#
# This library is free software; you can redistribute it and/or
# modify it under the terms of the GNU Lesser General Public
# License as published by the Free Software Foundation; either
# version 2.1 of the License, or (at your option) any later version.
#
# This library is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
# See the GNU Lesser General Public License for more details.
#
# You should have received a copy of the GNU Lesser General Public
# License along with this library; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
SUBMAKE_OPTIONS=--no-builtin-rules --no-builtin-variables --no-print-directory
#-------------------------------------------------------------------------------
# Rules
#-------------------------------------------------------------------------------
all: arduino_due_x
.PHONY: arduino_due_x
arduino_due_x:
@echo ------------------------------------------------------------------------------------
@echo --- Making variant arduino_due_x
@$(MAKE) DEBUG=1 $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk
# @$(MAKE) $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk
@echo ------------------------------------------------------------------------------------
.PHONY: clean
clean:
@echo ------------------------------------------------------------------------------------
@echo --- Cleaning variant arduino_due_x
@$(MAKE) DEBUG=1 $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk $@
# @$(MAKE) $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk $@
@echo ------------------------------------------------------------------------------------

25
buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/build_gcc/debug.mk Normal file
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#
# Copyright (c) 2011 Arduino. All right reserved.
#
# This library is free software; you can redistribute it and/or
# modify it under the terms of the GNU Lesser General Public
# License as published by the Free Software Foundation; either
# version 2.1 of the License, or (at your option) any later version.
#
# This library is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
# See the GNU Lesser General Public License for more details.
#
# You should have received a copy of the GNU Lesser General Public
# License along with this library; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
# Optimization level
# -O1 Optimize
# -O2 Optimize even more
# -O3 Optimize yet more
# -O0 Reduce compilation time and make debugging produce the expected results
# -Os Optimize for size
OPTIMIZATION = -g -O0 -DDEBUG

82
buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/build_gcc/gcc.mk Normal file
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#
# Copyright (c) 2011 Arduino. All right reserved.
#
# This library is free software; you can redistribute it and/or
# modify it under the terms of the GNU Lesser General Public
# License as published by the Free Software Foundation; either
# version 2.1 of the License, or (at your option) any later version.
#
# This library is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
# See the GNU Lesser General Public License for more details.
#
# You should have received a copy of the GNU Lesser General Public
# License along with this library; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
# Tool suffix when cross-compiling
CROSS_COMPILE = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-
# Compilation tools
AR = $(CROSS_COMPILE)ar
CC = $(CROSS_COMPILE)gcc
CXX = $(CROSS_COMPILE)g++
AS = $(CROSS_COMPILE)as
NM = $(CROSS_COMPILE)nm
ifeq ($(OS),Windows_NT)
RM=cs-rm -Rf
else
RM=rm -Rf
endif
SEP=\\
# ---------------------------------------------------------------------------------------
# C Flags
CFLAGS += -Wall -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int
CFLAGS += -Werror-implicit-function-declaration -Wmain -Wparentheses
CFLAGS += -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused
CFLAGS += -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef
CFLAGS += -Wshadow -Wpointer-arith -Wbad-function-cast -Wwrite-strings
CFLAGS += -Wsign-compare -Waggregate-return -Wstrict-prototypes
CFLAGS += -Wmissing-prototypes -Wmissing-declarations
CFLAGS += -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations
CFLAGS += -Wpacked -Wredundant-decls -Wnested-externs -Winline -Wlong-long
CFLAGS += -Wunreachable-code
CFLAGS += -Wcast-align
#CFLAGS += -Wmissing-noreturn
#CFLAGS += -Wconversion
CFLAGS += --param max-inline-insns-single=500 -mcpu=cortex-m3 -mthumb -mlong-calls -ffunction-sections -fdata-sections -nostdlib -std=c99
CFLAGS += $(OPTIMIZATION) $(INCLUDES) -D$(CHIP) -D$(VARIANT)
# To reduce application size use only integer printf function.
CFLAGS += -Dprintf=iprintf
# ---------------------------------------------------------------------------------------
# CPP Flags
CPPFLAGS += -Wall -Wchar-subscripts -Wcomment -Wformat=2
CPPFLAGS += -Wmain -Wparentheses -Wcast-align -Wunreachable-code
CPPFLAGS += -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused
CPPFLAGS += -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef
CPPFLAGS += -Wshadow -Wpointer-arith -Wwrite-strings
CPPFLAGS += -Wsign-compare -Waggregate-return -Wmissing-declarations
CPPFLAGS += -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations
CPPFLAGS += -Wpacked -Wredundant-decls -Winline -Wlong-long
#CPPFLAGS += -Wmissing-noreturn
#CPPFLAGS += -Wconversion
CPPFLAGS += --param max-inline-insns-single=500 -mcpu=cortex-m3 -mthumb -mlong-calls -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -std=c++98
CPPFLAGS += $(OPTIMIZATION) $(INCLUDES) -D$(CHIP)
# To reduce application size use only integer printf function.
CPPFLAGS += -Dprintf=iprintf
# ---------------------------------------------------------------------------------------
# ASM Flags
ASFLAGS = -mcpu=cortex-m3 -mthumb -Wall -g $(OPTIMIZATION) $(INCLUDES)

184
buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/build_gcc/libvariant_arduino_due_x.mk Normal file
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#
# Copyright (c) 2012 Arduino. All right reserved.
#
# This library is free software; you can redistribute it and/or
# modify it under the terms of the GNU Lesser General Public
# License as published by the Free Software Foundation; either
# version 2.1 of the License, or (at your option) any later version.
#
# This library is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
# See the GNU Lesser General Public License for more details.
#
# You should have received a copy of the GNU Lesser General Public
# License along with this library; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
# Makefile for compiling libArduino
.SUFFIXES: .o .a .c .s
CHIP=__SAM3X8E__
VARIANT=arduino_due_x
LIBNAME=libvariant_$(VARIANT)
TOOLCHAIN=gcc
#-------------------------------------------------------------------------------
# Path
#-------------------------------------------------------------------------------
# Output directories
OUTPUT_BIN = ../../../cores/arduino
# Libraries
PROJECT_BASE_PATH = ..
SYSTEM_PATH = ../../../system
CMSIS_ROOT_PATH = $(SYSTEM_PATH)/CMSIS
CMSIS_ARM_PATH=$(CMSIS_ROOT_PATH)/CMSIS/Include
CMSIS_ATMEL_PATH=$(CMSIS_ROOT_PATH)/Device/ATMEL
#CMSIS_CHIP_PATH=$(CMSIS_ROOT_PATH)/Device/ATMEL/$(CHIP_SERIE)
ARDUINO_PATH = ../../../cores/arduino
VARIANT_BASE_PATH = ../../../variants
VARIANT_PATH = ../../../variants/$(VARIANT)
#-------------------------------------------------------------------------------
# Files
#-------------------------------------------------------------------------------
#vpath %.h $(PROJECT_BASE_PATH) $(SYSTEM_PATH) $(VARIANT_PATH)
vpath %.cpp $(PROJECT_BASE_PATH)
VPATH+=$(PROJECT_BASE_PATH)
INCLUDES =
#INCLUDES += -I$(PROJECT_BASE_PATH)
INCLUDES += -I$(ARDUINO_PATH)
INCLUDES += -I$(ARDUINO_PATH)/USB
INCLUDES += -I$(SYSTEM_PATH)
INCLUDES += -I$(SYSTEM_PATH)/libsam
INCLUDES += -I$(SYSTEM_PATH)/USBHost
INCLUDES += -I$(VARIANT_BASE_PATH)
INCLUDES += -I$(VARIANT_PATH)
INCLUDES += -I$(CMSIS_ARM_PATH)
INCLUDES += -I$(CMSIS_ATMEL_PATH)
#-------------------------------------------------------------------------------
ifdef DEBUG
include debug.mk
else
include release.mk
endif
#-------------------------------------------------------------------------------
# Tools
#-------------------------------------------------------------------------------
include $(TOOLCHAIN).mk
#-------------------------------------------------------------------------------
ifdef DEBUG
OUTPUT_OBJ=debug
OUTPUT_LIB_POSTFIX=dbg
else
OUTPUT_OBJ=release
OUTPUT_LIB_POSTFIX=rel
endif
OUTPUT_LIB=$(LIBNAME)_$(TOOLCHAIN)_$(OUTPUT_LIB_POSTFIX).a
OUTPUT_PATH=$(OUTPUT_OBJ)_$(VARIANT)
#-------------------------------------------------------------------------------
# C source files and objects
#-------------------------------------------------------------------------------
C_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.c)
C_OBJ_TEMP = $(patsubst %.c, %.o, $(notdir $(C_SRC)))
# during development, remove some files
C_OBJ_FILTER=
C_OBJ=$(filter-out $(C_OBJ_FILTER), $(C_OBJ_TEMP))
#-------------------------------------------------------------------------------
# CPP source files and objects
#-------------------------------------------------------------------------------
CPP_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.cpp)
CPP_OBJ_TEMP = $(patsubst %.cpp, %.o, $(notdir $(CPP_SRC)))
# during development, remove some files
CPP_OBJ_FILTER=
CPP_OBJ=$(filter-out $(CPP_OBJ_FILTER), $(CPP_OBJ_TEMP))
#-------------------------------------------------------------------------------
# Assembler source files and objects
#-------------------------------------------------------------------------------
A_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.s)
A_OBJ_TEMP=$(patsubst %.s, %.o, $(notdir $(A_SRC)))
# during development, remove some files
A_OBJ_FILTER=
A_OBJ=$(filter-out $(A_OBJ_FILTER), $(A_OBJ_TEMP))
#-------------------------------------------------------------------------------
# Rules
#-------------------------------------------------------------------------------
all: $(VARIANT)
$(VARIANT): create_output $(OUTPUT_LIB)
.PHONY: create_output
create_output:
@echo ------------------------------------------------------------------------------------
@echo -------------------------
@echo --- Preparing variant $(VARIANT) files in $(OUTPUT_PATH) $(OUTPUT_BIN)
@echo -------------------------
# @echo *$(INCLUDES)
# @echo -------------------------
# @echo *$(C_SRC)
# @echo -------------------------
# @echo *$(C_OBJ)
# @echo -------------------------
# @echo *$(addprefix $(OUTPUT_PATH)/, $(C_OBJ))
# @echo -------------------------
# @echo *$(CPP_SRC)
# @echo -------------------------
# @echo *$(CPP_OBJ)
# @echo -------------------------
# @echo *$(addprefix $(OUTPUT_PATH)/, $(CPP_OBJ))
# @echo -------------------------
# @echo *$(A_SRC)
# @echo -------------------------
-@mkdir $(OUTPUT_PATH) 1>NUL 2>&1
@echo ------------------------------------------------------------------------------------
$(addprefix $(OUTPUT_PATH)/,$(C_OBJ)): $(OUTPUT_PATH)/%.o: %.c
# @"$(CC)" -v -c $(CFLAGS) $< -o $@
@"$(CC)" -c $(CFLAGS) $< -o $@
$(addprefix $(OUTPUT_PATH)/,$(CPP_OBJ)): $(OUTPUT_PATH)/%.o: %.cpp
# @"$(CC)" -c $(CPPFLAGS) $< -o $@
@"$(CC)" -xc++ -c $(CPPFLAGS) $< -o $@
$(addprefix $(OUTPUT_PATH)/,$(A_OBJ)): $(OUTPUT_PATH)/%.o: %.s
@"$(AS)" -c $(ASFLAGS) $< -o $@
$(OUTPUT_LIB): $(addprefix $(OUTPUT_PATH)/, $(C_OBJ)) $(addprefix $(OUTPUT_PATH)/, $(CPP_OBJ)) $(addprefix $(OUTPUT_PATH)/, $(A_OBJ))
@"$(AR)" -v -r "$(OUTPUT_BIN)/$@" $^
@"$(NM)" "$(OUTPUT_BIN)/$@" > "$(OUTPUT_BIN)/$@.txt"
.PHONY: clean
clean:
@echo ------------------------------------------------------------------------------------
@echo --- Cleaning $(VARIANT) files [$(OUTPUT_PATH)$(SEP)*.o]
-@$(RM) $(OUTPUT_PATH) 1>NUL 2>&1
-@$(RM) $(OUTPUT_BIN)/$(OUTPUT_LIB) 1>NUL 2>&1
@echo ------------------------------------------------------------------------------------

25
buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/build_gcc/release.mk Normal file
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@@ -0,0 +1,25 @@
#
# Copyright (c) 2011 Arduino. All right reserved.
#
# This library is free software; you can redistribute it and/or
# modify it under the terms of the GNU Lesser General Public
# License as published by the Free Software Foundation; either
# version 2.1 of the License, or (at your option) any later version.
#
# This library is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
# See the GNU Lesser General Public License for more details.
#
# You should have received a copy of the GNU Lesser General Public
# License along with this library; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
# Optimization level
# -O1 Optimize
# -O2 Optimize even more
# -O3 Optimize yet more
# -O0 Reduce compilation time and make debugging produce the expected results
# -Os Optimize for size
OPTIMIZATION = -Os

37
buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/debug_scripts/gcc/arduino_due_x_flash.gdb Normal file
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@@ -0,0 +1,37 @@
#*******************************************************
#
# Connect to J-Link and debug application in flash on SAM3X.
#
# Define 'reset' command
define reset
# Connect to the J-Link gdb server
target remote localhost:2331
# Reset the chip to get to a known state
monitor reset
# Select flash device
monitor flash device = AT91SAM3X8E
# Enable flash download and flash breakpoints
monitor flash download = 1
# Load the program
load
# Reset peripheral (RSTC_CR)
set *0x400e1a00 = 0xA5000004
# Initialize PC and stack pointer
mon reg sp=(0x80000)
#set *0x80004 = *0x80004 & 0xFFFFFFFE
mon reg pc=(0x80004)
info reg
break main
# End of 'reset' command
end

37
buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/debug_scripts/gcc/arduino_due_x_sram.gdb Normal file
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@@ -0,0 +1,37 @@
#*******************************************************
#
# Connect to J-Link and debug application in sram on SAM3X.
#
# Define 'reset' command
define reset
# Connect to the J-Link gdb server
target remote localhost:2331
# Reset the chip to get to a known state
monitor reset
# Select flash device
monitor flash device = AT91SAM3X8E
# Enable flash download and flash breakpoints
monitor flash download = 1
# Load the program
load
# Reset peripheral (RSTC_CR)
set *0x400e1a00 = 0xA5000004
# Initialize PC and stack pointer
mon reg sp=(0x20000000)
#set *0x20000004 = *0x20000004 & 0xFFFFFFFE
mon reg pc=(0x20000004)
info reg
break main
# End of 'reset' command
end

44
buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/debug_scripts/iar/arduino_due_flash.mac Normal file
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@@ -0,0 +1,44 @@
// ---------------------------------------------------------
// ATMEL Microcontroller Software Support - ROUSSET -
// ---------------------------------------------------------
// The software is delivered "AS IS" without warranty or
// condition of any kind, either express, implied or
// statutory. This includes without limitation any warranty
// or condition with respect to merchantability or fitness
// for any particular purpose, or against the infringements of
// intellectual property rights of others.
// ---------------------------------------------------------
// File: at91sam3u-ek-flash.mac
// User setup file for CSPY debugger.
// ---------------------------------------------------------
__var __mac_i;
__var __mac_pt;
/*********************************************************************
*
* execUserReset()
*/
execUserReset()
{
__message "------------------------------ execUserReset ---------------------------------";
__message "-------------------------------Set PC Reset ----------------------------------";
__hwReset(0);
// perpheral reset RSTC_CR
__writeMemory32(0xA5000004,0x400e1200,"Memory");
}
/*********************************************************************
*
* execUserPreload()
*/
execUserPreload()
{
__message "------------------------------ execUserPreload ---------------------------------";
__hwReset(0); //* Hardware Reset: CPU is automatically halted after the reset
// perpheral reset RSTC_CR
__writeMemory32(0xA5000004,0x400e1200,"Memory");
}

44
buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/debug_scripts/iar/arduino_due_sram.mac Normal file
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@@ -0,0 +1,44 @@
// ---------------------------------------------------------
// ATMEL Microcontroller Software Support - ROUSSET -
// ---------------------------------------------------------
// The software is delivered "AS IS" without warranty or
// condition of any kind, either express, implied or
// statutory. This includes without limitation any warranty
// or condition with respect to merchantability or fitness
// for any particular purpose, or against the infringements of
// intellectual property rights of others.
// ---------------------------------------------------------
// File: at91sam3u-ek-sram.mac
// User setup file for CSPY debugger.
// ---------------------------------------------------------
__var __mac_i;
__var __mac_pt;
/*********************************************************************
*
* execUserReset()
*/
execUserReset()
{
__message "------------------------------ execUserReset ---------------------------------";
__message "-------------------------------Set PC Reset ----------------------------------";
//__hwReset(50);
// perpheral reset RSTC_CR
__writeMemory32(0xA5000004,0x400e1200,"Memory");
}
/*********************************************************************
*
* execUserPreload()
*/
execUserPreload()
{
__message "------------------------------ execUserPreload ---------------------------------";
__hwReset(0); //* Hardware Reset: CPU is automatically halted after the reset
// perpheral reset RSTC_CR
__writeMemory32(0xA5000004,0x400e1200,"Memory");
}

BIN
buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/libsam_sam3x8e_gcc_rel.a Normal file
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Binary file not shown.

576
buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/libsam_sam3x8e_gcc_rel.a.txt Normal file
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@@ -0,0 +1,576 @@
adc10_sam3u.o:
adc12_sam3u.o:
adc_sam3snxa.o:
pio.o:
00000000 T PIO_Clear
00000000 T PIO_Configure
00000000 T PIO_DisableInterrupt
00000000 T PIO_Get
00000000 T PIO_GetOutputDataStatus
00000000 T PIO_PullUp
00000000 T PIO_Set
00000000 T PIO_SetDebounceFilter
00000000 T PIO_SetInput
00000000 T PIO_SetOutput
00000000 T PIO_SetPeripheral
pmc.o:
00000000 T pmc_clr_fast_startup_input
00000000 T pmc_disable_all_pck
00000000 T pmc_disable_all_periph_clk
00000000 T pmc_disable_interrupt
00000000 T pmc_disable_pck
00000000 T pmc_disable_periph_clk
00000000 T pmc_disable_pllack
00000000 T pmc_disable_udpck
00000000 T pmc_disable_upll_clock
00000000 T pmc_enable_all_pck
00000000 T pmc_enable_all_periph_clk
00000000 T pmc_enable_backupmode
00000000 T pmc_enable_interrupt
00000000 T pmc_enable_pck
00000000 T pmc_enable_periph_clk
00000000 T pmc_enable_pllack
00000000 T pmc_enable_sleepmode
00000000 T pmc_enable_udpck
00000000 T pmc_enable_upll_clock
00000000 T pmc_enable_waitmode
00000000 T pmc_get_interrupt_mask
00000000 T pmc_get_status
00000000 T pmc_get_writeprotect_status
00000000 T pmc_is_locked_pllack
00000000 T pmc_is_locked_upll
00000000 T pmc_is_pck_enabled
00000000 T pmc_is_periph_clk_enabled
00000000 T pmc_mck_set_prescaler
00000000 T pmc_mck_set_source
00000000 T pmc_osc_disable_fastrc
00000000 T pmc_osc_disable_xtal
00000000 T pmc_osc_enable_fastrc
00000000 T pmc_osc_is_ready_32kxtal
00000000 T pmc_osc_is_ready_mainck
00000000 T pmc_pck_set_prescaler
00000000 T pmc_pck_set_source
00000000 T pmc_set_fast_startup_input
00000000 T pmc_set_writeprotect
00000000 T pmc_switch_mainck_to_fastrc
00000000 T pmc_switch_mainck_to_xtal
00000000 T pmc_switch_mck_to_mainck
00000000 T pmc_switch_mck_to_pllack
00000000 T pmc_switch_mck_to_sclk
00000000 T pmc_switch_mck_to_upllck
00000000 T pmc_switch_pck_to_mainck
00000000 T pmc_switch_pck_to_pllack
00000000 T pmc_switch_pck_to_sclk
00000000 T pmc_switch_pck_to_upllck
00000000 T pmc_switch_sclk_to_32kxtal
00000000 T pmc_switch_udpck_to_pllack
00000000 T pmc_switch_udpck_to_upllck
pwmc.o:
00000000 t FindClockConfiguration
00000000 T PWMC_ConfigureChannel
00000000 T PWMC_ConfigureChannelExt
00000000 T PWMC_ConfigureClocks
00000000 T PWMC_ConfigureComparisonUnit
00000000 T PWMC_ConfigureEventLineMode
00000000 T PWMC_ConfigureSyncChannel
00000000 T PWMC_DisableChannel
00000000 T PWMC_DisableChannelIt
00000000 T PWMC_DisableIt
00000000 T PWMC_DisableOverrideOutput
00000000 T PWMC_EnableChannel
00000000 T PWMC_EnableChannelIt
00000000 T PWMC_EnableFaultProtection
00000000 T PWMC_EnableIt
00000000 T PWMC_EnableOverrideOutput
00000000 T PWMC_FaultClear
00000000 T PWMC_SetDeadTime
00000000 T PWMC_SetDutyCycle
00000000 T PWMC_SetFaultMode
00000000 T PWMC_SetFaultProtectionValue
00000000 T PWMC_SetOverrideValue
00000000 T PWMC_SetPeriod
00000000 T PWMC_SetSyncChannelUpdatePeriod
00000000 T PWMC_SetSyncChannelUpdateUnlock
00000000 T PWMC_WriteBuffer
U __assert_func
00000000 r __func__.6793
00000000 r __func__.6804
00000000 r __func__.6819
00000000 r __func__.6830
00000000 r __func__.6841
00000000 r __func__.6848
00000000 r __func__.6932
00000000 r __func__.6938
rtc.o:
00000000 T RTC_ClearSCCR
00000000 T RTC_DisableIt
00000000 T RTC_EnableIt
00000000 T RTC_GetDate
00000000 T RTC_GetHourMode
00000000 T RTC_GetSR
00000000 T RTC_GetTime
00000000 T RTC_SetDate
00000000 T RTC_SetDateAlarm
00000000 T RTC_SetHourMode
00000000 T RTC_SetTime
00000000 T RTC_SetTimeAlarm
U __assert_func
00000000 r __func__.6790
00000000 r __func__.6799
00000000 r __func__.6804
rtt.o:
00000000 T RTT_EnableIT
00000000 T RTT_GetStatus
00000000 T RTT_GetTime
00000000 T RTT_SetAlarm
00000000 T RTT_SetPrescaler
U __assert_func
00000000 r __func__.6797
00000000 r __func__.6805
spi.o:
00000000 T SPI_Configure
00000000 T SPI_ConfigureNPCS
00000000 T SPI_Disable
00000000 T SPI_DisableIt
00000000 T SPI_Enable
00000000 T SPI_EnableIt
00000000 T SPI_GetStatus
00000000 T SPI_IsFinished
00000000 T SPI_Read
00000000 T SPI_Write
U pmc_enable_periph_clk
tc.o:
00000000 T TC_Configure
00000000 T TC_FindMckDivisor
00000000 T TC_GetStatus
00000000 T TC_ReadCV
00000000 T TC_SetRA
00000000 T TC_SetRB
00000000 T TC_SetRC
00000000 T TC_Start
00000000 T TC_Stop
U __assert_func
00000000 r __func__.6792
00000000 r __func__.6798
00000000 r __func__.6804
timetick.o:
00000000 T GetTickCount
00000000 T Sleep
00000000 T TimeTick_Configure
00000000 T TimeTick_Increment
00000000 T Wait
00000000 b _dwTickCount
twi.o:
00000000 T TWI_ByteReceived
00000000 T TWI_ByteSent
00000000 T TWI_ConfigureMaster
00000000 T TWI_ConfigureSlave
00000000 T TWI_Disable
00000000 T TWI_DisableIt
00000000 T TWI_EnableIt
00000000 T TWI_GetMaskedStatus
00000000 T TWI_GetStatus
00000000 T TWI_ReadByte
00000000 T TWI_SendSTOPCondition
00000000 T TWI_SetClock
00000000 T TWI_StartRead
00000000 T TWI_StartWrite
00000000 T TWI_Stop
00000000 T TWI_TransferComplete
00000000 T TWI_WriteByte
U __assert_func
00000000 r __func__.7151
00000000 r __func__.7157
00000000 r __func__.7172
00000000 r __func__.7176
00000000 r __func__.7184
00000000 r __func__.7191
00000000 r __func__.7195
00000000 r __func__.7200
00000000 r __func__.7208
00000000 r __func__.7222
00000000 r __func__.7227
00000000 r __func__.7231
00000000 r __func__.7236
00000000 r __func__.7240
usart.o:
00000000 T USART_Configure
00000000 T USART_DisableIt
00000000 T USART_EnableIt
00000000 T USART_GetChar
00000000 T USART_GetStatus
00000000 T USART_IsDataAvailable
00000000 T USART_IsRxReady
00000000 T USART_PutChar
00000000 T USART_Read
00000000 T USART_ReadBuffer
00000000 T USART_SetIrdaFilter
00000000 T USART_SetReceiverEnabled
00000000 T USART_SetTransmitterEnabled
00000000 T USART_Write
00000000 T USART_WriteBuffer
U __assert_func
00000000 r __func__.7068
wdt.o:
00000000 T WDT_Disable
00000000 T WDT_Enable
00000000 T WDT_GetPeriod
00000000 T WDT_GetStatus
00000000 T WDT_Restart
system_sam3xa.o:
00000000 D SystemCoreClock
00000000 T SystemCoreClockUpdate
00000000 T SystemInit
00000000 T system_init_flash
startup_sam3xa.o:
U ADC_Handler
U BusFault_Handler
U CAN0_Handler
U CAN1_Handler
U DACC_Handler
U DMAC_Handler
U DebugMon_Handler
U EFC0_Handler
U EFC1_Handler
U EMAC_Handler
U HSMCI_Handler
U HardFault_Handler
U MemManage_Handler
U NMI_Handler
U PIOA_Handler
U PIOB_Handler
U PIOC_Handler
U PIOD_Handler
U PMC_Handler
U PWM_Handler
U PendSV_Handler
U RSTC_Handler
U RTC_Handler
U RTT_Handler
00000000 T Reset_Handler
U SMC_Handler
U SPI0_Handler
U SSC_Handler
U SUPC_Handler
U SVC_Handler
U SysTick_Handler
U TC0_Handler
U TC1_Handler
U TC2_Handler
U TC3_Handler
U TC4_Handler
U TC5_Handler
U TC6_Handler
U TC7_Handler
U TC8_Handler
U TRNG_Handler
U TWI0_Handler
U TWI1_Handler
U UART_Handler
U UOTGHS_Handler
U USART0_Handler
U USART1_Handler
U USART2_Handler
U USART3_Handler
U UsageFault_Handler
U WDT_Handler
U _erelocate
U _estack
U _etext
U _ezero
U _sfixed
U _srelocate
U _szero
00000000 R exception_table
U main
adc.o:
00000000 T adc_configure_power_save
00000000 T adc_configure_sequence
00000000 T adc_configure_timing
00000000 T adc_configure_trigger
00000000 T adc_disable_all_channel
00000000 T adc_disable_anch
00000000 T adc_disable_channel
00000000 T adc_disable_channel_differential_input
00000000 T adc_disable_channel_input_offset
00000000 T adc_disable_interrupt
00000000 T adc_disable_tag
00000000 T adc_disable_ts
00000000 T adc_enable_all_channel
00000000 T adc_enable_anch
00000000 T adc_enable_channel
00000000 T adc_enable_channel_differential_input
00000000 T adc_enable_channel_input_offset
00000000 T adc_enable_interrupt
00000000 T adc_enable_tag
00000000 T adc_enable_ts
00000000 T adc_get_actual_adc_clock
00000000 T adc_get_channel_status
00000000 T adc_get_channel_value
00000000 T adc_get_comparison_mode
00000000 T adc_get_interrupt_mask
00000000 T adc_get_latest_value
00000000 T adc_get_overrun_status
00000000 T adc_get_pdc_base
00000000 T adc_get_status
00000000 T adc_get_tag
00000000 T adc_get_writeprotect_status
00000000 T adc_init
00000000 T adc_set_bias_current
00000000 T adc_set_channel_input_gain
00000000 T adc_set_comparison_channel
00000000 T adc_set_comparison_mode
00000000 T adc_set_comparison_window
00000000 T adc_set_resolution
00000000 T adc_set_writeprotect
00000000 T adc_start
00000000 T adc_start_sequencer
00000000 T adc_stop
00000000 T adc_stop_sequencer
udp.o:
udphs.o:
uotghs.o:
00000000 T UOTGHS_Handler
00000000 B gpf_isr
interrupt_sam_nvic.o:
00000000 D g_interrupt_enabled
uotghs_device.o:
00000000 T UDD_Attach
00000000 T UDD_ClearIN
00000000 T UDD_ClearOUT
00000000 T UDD_ClearSetupInt
00000000 T UDD_Detach
00000000 T UDD_FifoByteCount
00000000 T UDD_GetFrameNumber
00000000 T UDD_Init
00000000 T UDD_InitEP
00000000 T UDD_InitEndpoints
00000000 T UDD_ReadWriteAllowed
00000000 T UDD_ReceivedSetupInt
00000000 T UDD_Recv
00000000 T UDD_Recv8
00000000 T UDD_ReleaseRX
00000000 T UDD_ReleaseTX
00000000 T UDD_Send
00000000 T UDD_Send8
00000000 T UDD_SetAddress
00000000 T UDD_SetStack
00000000 T UDD_Stall
00000000 T UDD_WaitForINOrOUT
00000000 T UDD_WaitIN
00000000 T UDD_WaitOUT
U g_interrupt_enabled
U gpf_isr
U pmc_enable_periph_clk
U pmc_enable_udpck
U pmc_enable_upll_clock
U pmc_switch_udpck_to_upllck
00000000 b ul_recv_fifo_ptr
00000000 b ul_send_fifo_ptr
uotghs_host.o:
00000000 T UHD_BusReset
00000000 T UHD_GetVBUSState
00000000 t UHD_ISR
00000000 T UHD_Init
00000000 T UHD_Pipe0_Alloc
00000000 T UHD_Pipe_Alloc
00000000 T UHD_Pipe_Free
00000000 T UHD_Pipe_Is_Transfer_Complete
00000000 T UHD_Pipe_Read
00000000 T UHD_Pipe_Send
00000000 T UHD_Pipe_Write
00000000 T UHD_SetStack
U g_interrupt_enabled
U gpf_isr
U pmc_enable_periph_clk
U pmc_enable_udpck
U pmc_enable_upll_clock
U pmc_switch_udpck_to_upllck
00000000 b uhd_state
dacc.o:
00000000 T dacc_disable_channel
00000000 T dacc_disable_interrupt
00000000 T dacc_disable_trigger
00000000 T dacc_enable_channel
00000000 T dacc_enable_flexible_selection
00000000 T dacc_enable_interrupt
00000000 T dacc_get_analog_control
00000000 T dacc_get_channel_status
00000000 T dacc_get_interrupt_mask
00000000 T dacc_get_interrupt_status
00000000 T dacc_get_pdc_base
00000000 T dacc_get_writeprotect_status
00000000 T dacc_reset
00000000 T dacc_set_analog_control
00000000 T dacc_set_channel_selection
00000000 T dacc_set_power_save
00000000 T dacc_set_timing
00000000 T dacc_set_transfer_mode
00000000 T dacc_set_trigger
00000000 T dacc_set_writeprotect
00000000 T dacc_write_conversion_data
can.o:
00000000 R can_bit_time
00000000 T can_disable
00000000 T can_disable_autobaud_listen_mode
00000000 T can_disable_interrupt
00000000 T can_disable_low_power_mode
00000000 T can_disable_overload_frame
00000000 T can_disable_time_triggered_mode
00000000 T can_disable_timer_freeze
00000000 T can_disable_tx_repeat
00000000 T can_enable
00000000 T can_enable_autobaud_listen_mode
00000000 T can_enable_interrupt
00000000 T can_enable_low_power_mode
00000000 T can_enable_overload_frame
00000000 T can_enable_time_triggered_mode
00000000 T can_enable_timer_freeze
00000000 T can_enable_tx_repeat
00000000 T can_get_internal_timer_value
00000000 T can_get_interrupt_mask
00000000 T can_get_rx_error_cnt
00000000 T can_get_status
00000000 T can_get_timestamp_value
00000000 T can_get_tx_error_cnt
00000000 T can_global_send_abort_cmd
00000000 T can_global_send_transfer_cmd
00000000 T can_init
00000000 T can_mailbox_get_status
00000000 T can_mailbox_init
00000000 T can_mailbox_read
00000000 T can_mailbox_send_abort_cmd
00000000 T can_mailbox_send_transfer_cmd
00000000 T can_mailbox_set_timemark
00000000 T can_mailbox_tx_remote_frame
00000000 T can_mailbox_write
00000000 T can_reset_all_mailbox
00000000 T can_reset_internal_timer
00000000 T can_reset_mailbox_data
00000000 T can_set_rx_sync_stage
00000000 T can_set_timestamp_capture_point
U memset
efc.o:
00000000 T efc_disable_frdy_interrupt
00000000 T efc_enable_frdy_interrupt
00000000 T efc_get_flash_access_mode
00000000 T efc_get_result
00000000 T efc_get_status
00000000 T efc_get_wait_state
00000000 T efc_init
00000000 T efc_perform_command
0000006c T efc_perform_fcr
00000000 T efc_perform_read_sequence
00000000 T efc_set_flash_access_mode
00000000 T efc_set_wait_state
00000068 T efc_write_fmr
00000000 b iap_perform_command.7049
gpbr.o:
00000000 T gpbr_read
00000000 T gpbr_write
ssc.o:
U memset
00000000 T ssc_disable_interrupt
00000000 T ssc_disable_rx
00000000 T ssc_disable_tx
00000000 T ssc_disable_tx_frame_sync_data
00000000 T ssc_enable_interrupt
00000000 T ssc_enable_rx
00000000 T ssc_enable_tx
00000000 T ssc_enable_tx_frame_sync_data
00000000 T ssc_get_interrupt_mask
00000000 T ssc_get_rx_access
00000000 T ssc_get_rx_compare
00000000 T ssc_get_status
00000000 T ssc_get_tx_access
00000000 T ssc_get_writeprotect_status
00000000 T ssc_i2s_set_receiver
00000000 T ssc_i2s_set_transmitter
00000000 T ssc_is_rx_enabled
00000000 T ssc_is_rx_ready
00000000 T ssc_is_tx_empty
00000000 T ssc_is_tx_enabled
00000000 T ssc_is_tx_ready
00000000 T ssc_read
00000000 T ssc_read_sync_data
00000000 T ssc_reset
00000000 T ssc_set_clock_divider
00000000 T ssc_set_loop_mode
00000000 T ssc_set_normal_mode
00000000 T ssc_set_receiver
00000000 T ssc_set_rx_compare
00000000 T ssc_set_rx_stop_selection
00000000 T ssc_set_td_default_level
00000000 T ssc_set_transmitter
00000000 T ssc_set_writeprotect
00000000 T ssc_write
00000000 T ssc_write_sync_data
trng.o:
00000000 T trng_disable
00000000 T trng_disable_interrupt
00000000 T trng_enable
00000000 T trng_enable_interrupt
00000000 T trng_get_interrupt_mask
00000000 T trng_get_interrupt_status
00000000 T trng_read_output_data
rstc.o:
00000000 T rstc_disable_user_reset
00000000 T rstc_disable_user_reset_interrupt
00000000 T rstc_enable_user_reset
00000000 T rstc_enable_user_reset_interrupt
00000000 T rstc_get_reset_cause
00000000 T rstc_get_status
00000000 T rstc_reset_extern
00000000 T rstc_set_external_reset
00000000 T rstc_start_software_reset
emac.o:
00000000 t circ_inc
00000000 T emac_dev_get_tx_load
00000000 T emac_dev_init
00000000 T emac_dev_read
00000000 T emac_dev_reset
00000000 T emac_dev_set_rx_callback
00000000 T emac_dev_set_tx_wakeup_callback
00000000 T emac_dev_write
00000000 T emac_handler
00000000 T emac_phy_read
00000000 T emac_phy_write
00000000 t emac_reset_rx_mem
00000000 t emac_reset_tx_mem
00000000 b gs_rx_desc
00000000 b gs_tx_callback
00000000 b gs_tx_desc
00000000 b gs_uc_rx_buffer
00000000 b gs_uc_tx_buffer
U memcpy

146
buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/linker_scripts/gcc/flash.ld Normal file
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@@ -0,0 +1,146 @@
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SEARCH_DIR(.)
/* Memory Spaces Definitions */
MEMORY
{
rom (rx) : ORIGIN = 0x00080000, LENGTH = 0x00080000 /* Flash, 512K */
sram0 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 /* sram0, 64K */
sram1 (rwx) : ORIGIN = 0x20080000, LENGTH = 0x00008000 /* sram1, 32K */
ram (rwx) : ORIGIN = 0x20070000, LENGTH = 0x00018000 /* sram, 96K */
}
/* Section Definitions */
SECTIONS
{
.text :
{
. = ALIGN(4);
_sfixed = .;
KEEP(*(.vectors .vectors.*))
*(.text .text.* .gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7)
*(.rodata .rodata* .gnu.linkonce.r.*)
*(.ARM.extab* .gnu.linkonce.armextab.*)
/* Support C constructors, and C destructors in both user code
and the C library. This also provides support for C++ code. */
. = ALIGN(4);
KEEP(*(.init))
. = ALIGN(4);
__preinit_array_start = .;
KEEP (*(.preinit_array))
__preinit_array_end = .;
. = ALIGN(4);
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
. = ALIGN(0x4);
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
. = ALIGN(4);
KEEP(*(.fini))
. = ALIGN(4);
__fini_array_start = .;
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
__fini_array_end = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
. = ALIGN(4);
_efixed = .; /* End of text section */
} > rom
/* .ARM.exidx is sorted, so has to go in its own output section. */
PROVIDE_HIDDEN (__exidx_start = .);
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > rom
PROVIDE_HIDDEN (__exidx_end = .);
. = ALIGN(4);
_etext = .;
.relocate : AT (_etext)
{
. = ALIGN(4);
_srelocate = .;
*(.ramfunc .ramfunc.*);
*(.data .data.*);
. = ALIGN(4);
_erelocate = .;
} > ram
/* .bss section which is used for uninitialized data */
.bss ALIGN(4) (NOLOAD) :
{
. = ALIGN(4);
_sbss = . ;
_szero = .;
*(.bss .bss.*)
*(COMMON)
. = ALIGN(4);
_ebss = . ;
_ezero = .;
} > ram
. = ALIGN(4);
_end = . ;
/* .stack_dummy section doesn't contains any symbols. It is only
used for linker to calculate size of stack sections, and assign
values to stack symbols later */
.stack_dummy :
{
*(.stack*)
} > ram
/* Set stack top to end of ram, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(ram) + LENGTH(ram);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(_sstack = __StackLimit);
PROVIDE(_estack = __StackTop);
}

145
buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/linker_scripts/gcc/sram.ld Normal file
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@@ -0,0 +1,145 @@
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SEARCH_DIR(.)
/* Memory Spaces Definitions */
MEMORY
{
rom (rx) : ORIGIN = 0x00080000, LENGTH = 0x00080000 /* Flash, 512K */
sram0 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 /* sram0, 64K */
sram1 (rwx) : ORIGIN = 0x20080000, LENGTH = 0x00008000 /* sram1, 32K */
ram (rwx) : ORIGIN = 0x20070000, LENGTH = 0x00018000 /* sram, 96K */
}
/* The stack size used by the application. NOTE: you need to adjust */
STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : 0x2000 ;
/* Section Definitions */
SECTIONS
{
.text :
{
. = ALIGN(4);
_sfixed = .;
KEEP(*(.vectors .vectors.*))
*(.text .text.* .gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7)
*(.rodata .rodata* .gnu.linkonce.r.*)
*(.ARM.extab* .gnu.linkonce.armextab.*)
/* Support C constructors, and C destructors in both user code
and the C library. This also provides support for C++ code. */
. = ALIGN(4);
KEEP(*(.init))
. = ALIGN(4);
__preinit_array_start = .;
KEEP (*(.preinit_array))
__preinit_array_end = .;
. = ALIGN(4);
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
. = ALIGN(0x4);
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
. = ALIGN(4);
KEEP(*(.fini))
. = ALIGN(4);
__fini_array_start = .;
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
__fini_array_end = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
. = ALIGN(4);
_efixed = .; /* End of text section */
} > ram
. = ALIGN(4);
_etext = .;
.relocate : AT (_etext)
{
. = ALIGN(4);
_srelocate = .;
*(.ramfunc .ramfunc.*);
*(.data .data.*);
. = ALIGN(4);
_erelocate = .;
} > ram
/* .bss section which is used for uninitialized data */
.bss (NOLOAD) :
{
. = ALIGN(4);
_sbss = . ;
_szero = .;
*(.bss .bss.*)
*(COMMON)
. = ALIGN(4);
_ebss = . ;
_ezero = .;
} > ram
/* stack section */
.stack (NOLOAD):
{
. = ALIGN(8);
_sstack = .;
. = . + STACK_SIZE;
. = ALIGN(8);
_estack = .;
} > ram
/* .ARM.exidx is sorted, so has to go in its own output section. */
PROVIDE_HIDDEN (__exidx_start = .);
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > ram
PROVIDE_HIDDEN (__exidx_end = .);
. = ALIGN(4);
_end = . ;
}

49
buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/linker_scripts/iar/flash.icf Normal file
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@@ -0,0 +1,49 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
/*-Vector table start*/
define symbol __ICFEDIT_vector_start__ = 0x00080000; /*Add for CMSIS*/
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF;
define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000;
define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF;
define symbol __ICFEDIT_region_ROM0_start__ = 0x00080000;
define symbol __ICFEDIT_region_ROM0_end__ = 0x0009FFFF;
define symbol __ICFEDIT_region_ROM1_start__ = 0x00100000;
define symbol __ICFEDIT_region_ROM1_end__ = 0x0011FFFF;
/*-Sizes-*/
/*define symbol __ICFEDIT_size_cstack__ = 0x1000;*//*for nandflash*/
define symbol __ICFEDIT_size_cstack__ = 0x2000;
define symbol __ICFEDIT_size_heap__ = 0x200;
/*-Specials-*/
/*define symbol __ICFEDIT_region_RAM_VECT_start__ = __ICFEDIT_region_RAM0_start__;*/ /*Referenced for CMSIS*/
/*define symbol __ICFEDIT_size_vectors__ = 0x100;*/ /*Referenced for CMSIS*/
/*-Exports-*/
/*export symbol __ICFEDIT_region_RAM_VECT_start__;*/
export symbol __ICFEDIT_vector_start__; /*Add for CMSIS*/
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
/*define region RAM_VECT_region = mem:[from __ICFEDIT_region_RAM_VECT_start__ size __ICFEDIT_size_vectors__];*/ /*Referenced for CMSIS*/
/*define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__];*/ /*Referenced for CMSIS*/
define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__];
define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];
/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] |
mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/ /*Referenced for CMSIS*/
define region ROM0_region = mem:[from __ICFEDIT_region_ROM0_start__ to __ICFEDIT_region_ROM0_end__];
define region ROM1_region = mem:[from __ICFEDIT_region_ROM1_start__ to __ICFEDIT_region_ROM1_end__];
/*define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { };*/
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
/*place at start of ROM0_region { readonly section .vectors };*/ /*Referenced for CMSIS*/
place at address mem:__ICFEDIT_vector_start__ { readonly section .intvec }; /*Add for CMSIS*/
place in ROM0_region { readonly };
place in RAM0_region { readwrite, block HEAP };
place in RAM1_region { block CSTACK }; /* for nandflash*/
/*place in RAM_VECT_region { block RamVect };*/ /*Referenced for CMSIS*/

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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
/*-Vector table start*/
define symbol __ICFEDIT_vector_start__ = 0x20000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF;
define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000;
define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x900;
define symbol __ICFEDIT_size_heap__ = 0x200;
/*-Exports-*/
export symbol __ICFEDIT_vector_start__;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__];
define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];
/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] |
mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/
/* define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { }; */
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_vector_start__ { readonly section .intvec };
place in RAM0_region { readonly };
place in RAM1_region { readwrite, block CSTACK, block HEAP };

21
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/*
Copyright (c) 2011 Arduino. All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
// API compatibility
#include "variant.h"

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/*
Copyright (c) 2011 Arduino. All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "variant.h"
/*
* DUE Board pin | PORT | Label
* ----------------+--------+-------
* 0 | PA8 | "RX0"
* 1 | PA9 | "TX0"
* 2 TIOA0 | PB25 |
* 3 TIOA7 | PC28 |
* 4 NPCS1 | PA29 |
* TIOB6 | PC26 |
* 5 TIOA6 | PC25 |
* 6 PWML7 | PC24 |
* 7 PWML6 | PC23 |
* 8 PWML5 | PC22 |
* 9 PWML4 | PC21 |
* 10 NPCS0 | PA28 |
* TIOB7 | PC29 |
* 11 TIOA8 | PD7 |
* 12 TIOB8 | PD8 |
* 13 TIOB0 | PB27 | LED AMBER "L"
* 14 TXD3 | PD4 | "TX3"
* 15 RXD3 | PD5 | "RX3"
* 16 TXD1 | PA13 | "TX2"
* 17 RXD1 | PA12 | "RX2"
* 18 TXD0 | PA11 | "TX1"
* 19 RXD0 | PA10 | "RX1"
* 20 | PB12 | "SDA"
* 21 | PB13 | "SCL"
* 22 | PB26 |
* 23 | PA14 |
* 24 | PA15 |
* 25 | PD0 |
* 26 | PD1 |
* 27 | PD2 |
* 28 | PD3 |
* 29 | PD6 |
* 30 | PD9 |
* 31 | PA7 |
* 32 | PD10 |
* 33 | PC1 |
* 34 | PC2 |
* 35 | PC3 |
* 36 | PC4 |
* 37 | PC5 |
* 38 | PC6 |
* 39 | PC7 |
* 40 | PC8 |
* 41 | PC9 |
* 42 | PA19 |
* 43 | PA20 |
* 44 | PC19 |
* 45 | PC18 |
* 46 | PC17 |
* 47 | PC16 |
* 48 | PC15 |
* 49 | PC14 |
* 50 | PC13 |
* 51 | PC12 |
* 52 NPCS2 | PB21 |
* 53 | PB14 |
* 54 | PA16 | "A0"
* 55 | PA24 | "A1"
* 56 | PA23 | "A2"
* 57 | PA22 | "A3"
* 58 TIOB2 | PA6 | "A4"
* 69 | PA4 | "A5"
* 60 TIOB1 | PA3 | "A6"
* 61 TIOA1 | PA2 | "A7"
* 62 | PB17 | "A8"
* 63 | PB18 | "A9"
* 64 | PB19 | "A10"
* 65 | PB20 | "A11"
* 66 | PB15 | "DAC0"
* 67 | PB16 | "DAC1"
* 68 | PA1 | "CANRX"
* 69 | PA0 | "CANTX"
* 70 | PA17 | "SDA1"
* 71 | PA18 | "SCL1"
* 72 | PC30 | LED AMBER "RX"
* 73 | PA21 | LED AMBER "TX"
* 74 MISO | PA25 |
* 75 MOSI | PA26 |
* 76 SCLK | PA27 |
* 77 NPCS0 | PA28 |
* 78 NPCS3 | PB23 | unconnected!
*
* USB pin | PORT
* ----------------+--------
* ID | PB11
* VBOF | PB10
*
*/
#ifdef __cplusplus
extern "C" {
#endif
/*
* Pins descriptions
*/
extern const PinDescription g_APinDescription[]=
{
// 0 .. 53 - Digital pins
// ----------------------
// 0/1 - UART (Serial)
{ PIOA, PIO_PA8A_URXD, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // URXD
{ PIOA, PIO_PA9A_UTXD, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // UTXD
// 2
{ PIOB, PIO_PB25B_TIOA0, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC0_CHA0 }, // TIOA0
{ PIOC, PIO_PC28B_TIOA7, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC2_CHA7 }, // TIOA7
{ PIOC, PIO_PC26B_TIOB6, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC2_CHB6 }, // TIOB6
// 5
{ PIOC, PIO_PC25B_TIOA6, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC2_CHA6 }, // TIOA6
{ PIOC, PIO_PC24B_PWML7, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH7, NOT_ON_TIMER }, // PWML7
{ PIOC, PIO_PC23B_PWML6, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH6, NOT_ON_TIMER }, // PWML6
{ PIOC, PIO_PC22B_PWML5, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH5, NOT_ON_TIMER }, // PWML5
{ PIOC, PIO_PC21B_PWML4, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH4, NOT_ON_TIMER }, // PWML4
// 10
{ PIOC, PIO_PC29B_TIOB7, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC2_CHB7 }, // TIOB7
{ PIOD, PIO_PD7B_TIOA8, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC2_CHA8 }, // TIOA8
{ PIOD, PIO_PD8B_TIOB8, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC2_CHB8 }, // TIOB8
// 13 - AMBER LED
{ PIOB, PIO_PB27B_TIOB0, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC0_CHB0 }, // TIOB0
// 14/15 - USART3 (Serial3)
{ PIOD, PIO_PD4B_TXD3, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TXD3
{ PIOD, PIO_PD5B_RXD3, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // RXD3
// 16/17 - USART1 (Serial2)
{ PIOA, PIO_PA13A_TXD1, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TXD1
{ PIOA, PIO_PA12A_RXD1, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // RXD1
// 18/19 - USART0 (Serial1)
{ PIOA, PIO_PA11A_TXD0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TXD0
{ PIOA, PIO_PA10A_RXD0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // RXD0
// 20/21 - TWI1
{ PIOB, PIO_PB12A_TWD1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TWD1 - SDA0
{ PIOB, PIO_PB13A_TWCK1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TWCK1 - SCL0
// 22
{ PIOB, PIO_PB26, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 22
{ PIOA, PIO_PA14, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 23
{ PIOA, PIO_PA15, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 24
{ PIOD, PIO_PD0, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 25
// 26
{ PIOD, PIO_PD1, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 26
{ PIOD, PIO_PD2, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 27
{ PIOD, PIO_PD3, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 28
{ PIOD, PIO_PD6, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 29
// 30
{ PIOD, PIO_PD9, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 30
{ PIOA, PIO_PA7, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 31
{ PIOD, PIO_PD10, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 32
{ PIOC, PIO_PC1, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 33
// 34
{ PIOC, PIO_PC2, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 34
{ PIOC, PIO_PC3, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 35
//{ PIOC, PIO_PC3B_PWMH0, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH0, NOT_ON_TIMER }, // PWMH0 PIN 35
{ PIOC, PIO_PC4, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 36
{ PIOC, PIO_PC5, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 37
//{ PIOC, PIO_PC5B_PWMH1, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH1, NOT_ON_TIMER }, // PWMH1 PIN 37
// 38
{ PIOC, PIO_PC6, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 38
{ PIOC, PIO_PC7, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 39
//{ PIOC, PIO_PC7B_PWMH2, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH2, NOT_ON_TIMER }, // PWMH2 PIN 39
{ PIOC, PIO_PC8, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 40
//{ PIOC, PIO_PC8B_PWML3, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH3, NOT_ON_TIMER }, // PWML3 PIN 40
{ PIOC, PIO_PC9, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 41
// 42
{ PIOA, PIO_PA19, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 42
{ PIOA, PIO_PA20, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 43
{ PIOC, PIO_PC19, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 44
//{ PIOC, PIO_PC19B_PWMH5, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH5, NOT_ON_TIMER }, // PWMH5 PIN 44
{ PIOC, PIO_PC18, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 45
// 46
{ PIOC, PIO_PC17, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 46
{ PIOC, PIO_PC16, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 47
{ PIOC, PIO_PC15, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 48
{ PIOC, PIO_PC14, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 49
// 50
{ PIOC, PIO_PC13, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 50
{ PIOC, PIO_PC12, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 51
{ PIOB, PIO_PB21, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 52
{ PIOB, PIO_PB14, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 53
// 54 .. 65 - Analog pins
// ----------------------
{ PIOA, PIO_PA16X1_AD7, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC0, ADC7, NOT_ON_PWM, NOT_ON_TIMER }, // AD0
{ PIOA, PIO_PA24X1_AD6, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC1, ADC6, NOT_ON_PWM, NOT_ON_TIMER }, // AD1
{ PIOA, PIO_PA23X1_AD5, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC2, ADC5, NOT_ON_PWM, NOT_ON_TIMER }, // AD2
{ PIOA, PIO_PA22X1_AD4, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC3, ADC4, NOT_ON_PWM, NOT_ON_TIMER }, // AD3
// 58
//{ PIOA, PIO_PA6X1_AD3, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC4, ADC3, NOT_ON_PWM, TC0_CHB2 }, // AD4
{ PIOA, PIO_PA6A_TIOB2, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_TIMER|PIN_ATTR_DIGITAL), ADC4, ADC3, NOT_ON_PWM, TC0_CHB2 }, // TIOB2
{ PIOA, PIO_PA4X1_AD2, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC5, ADC2, NOT_ON_PWM, NOT_ON_TIMER }, // AD5
{ PIOA, PIO_PA3X1_AD1, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC6, ADC1, NOT_ON_PWM, TC0_CHB1 }, // AD6
{ PIOA, PIO_PA2X1_AD0, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC7, ADC0, NOT_ON_PWM, TC0_CHA1 }, // AD7
// 62
{ PIOB, PIO_PB17X1_AD10, ID_PIOB, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC8, ADC10, NOT_ON_PWM, NOT_ON_TIMER }, // AD8
{ PIOB, PIO_PB18X1_AD11, ID_PIOB, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC9, ADC11, NOT_ON_PWM, NOT_ON_TIMER }, // AD9
{ PIOB, PIO_PB19X1_AD12, ID_PIOB, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC10, ADC12, NOT_ON_PWM, NOT_ON_TIMER }, // AD10
{ PIOB, PIO_PB20X1_AD13, ID_PIOB, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC11, ADC13, NOT_ON_PWM, NOT_ON_TIMER }, // AD11
// 66/67 - DAC0/DAC1
{ PIOB, PIO_PB15X1_DAC0, ID_PIOB, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC12, DA0, NOT_ON_PWM, NOT_ON_TIMER }, // DAC0
{ PIOB, PIO_PB16X1_DAC1, ID_PIOB, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC13, DA1, NOT_ON_PWM, NOT_ON_TIMER }, // DAC1
// 68/69 - CANRX0/CANTX0
{ PIOA, PIO_PA1A_CANRX0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, ADC14, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // CANRX
{ PIOA, PIO_PA0A_CANTX0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, ADC15, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // CANTX
// 70/71 - TWI0
{ PIOA, PIO_PA17A_TWD0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TWD0 - SDA1
{ PIOA, PIO_PA18A_TWCK0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TWCK0 - SCL1
// 72/73 - LEDs
{ PIOC, PIO_PC30, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // LED AMBER RXL
{ PIOA, PIO_PA21, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // LED AMBER TXL
// 74/75/76 - SPI
{ PIOA, PIO_PA25A_SPI0_MISO,ID_PIOA,PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // MISO
{ PIOA, PIO_PA26A_SPI0_MOSI,ID_PIOA,PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // MOSI
{ PIOA, PIO_PA27A_SPI0_SPCK,ID_PIOA,PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // SPCK
// 77 - SPI CS0
{ PIOA, PIO_PA28A_SPI0_NPCS0,ID_PIOA,PIO_PERIPH_A,PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // NPCS0
// 78 - SPI CS3 (unconnected)
{ PIOB, PIO_PB23B_SPI0_NPCS3,ID_PIOB,PIO_PERIPH_B,PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // NPCS3
// 79 .. 84 - "All pins" masks
// 79 - TWI0 all pins
{ PIOA, PIO_PA17A_TWD0|PIO_PA18A_TWCK0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER },
// 80 - TWI1 all pins
{ PIOB, PIO_PB12A_TWD1|PIO_PB13A_TWCK1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER },
// 81 - UART (Serial) all pins
{ PIOA, PIO_PA8A_URXD|PIO_PA9A_UTXD, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER },
// 82 - USART0 (Serial1) all pins
{ PIOA, PIO_PA11A_TXD0|PIO_PA10A_RXD0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER },
// 83 - USART1 (Serial2) all pins
{ PIOA, PIO_PA13A_TXD1|PIO_PA12A_RXD1, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER },
// 84 - USART3 (Serial3) all pins
{ PIOD, PIO_PD4B_TXD3|PIO_PD5B_RXD3, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER },
// 85 - USB
//{ PIOB, PIO_PB11A_UOTGID|PIO_PB10A_UOTGVBOF, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // ID - VBOF
// 85 - PB11 only
{ PIOB, PIO_PB11A_UOTGID, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // ID - VBOF
// 86 - SPI CS2
{ PIOB, PIO_PB21B_SPI0_NPCS2, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // NPCS2
// 87 - SPI CS1
{ PIOA, PIO_PA29A_SPI0_NPCS1, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // NPCS1
// 88/89 - CANRX1/CANTX1 (same physical pin for 66/53)
{ PIOB, PIO_PB15A_CANRX1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // CANRX1
{ PIOB, PIO_PB14A_CANTX1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // CANTX1
// 90 .. 91 - "All CAN pins" masks
// 90 - CAN0 all pins
{ PIOA, PIO_PA1A_CANRX0|PIO_PA0A_CANTX0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER },
// 91 - CAN1 all pins
{ PIOB, PIO_PB15A_CANRX1|PIO_PB14A_CANTX1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER },
// 92 - Extra AMBIT Pins
{ PIOC, PIO_PC11, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 92
{ PIOB, PIO_PB2, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 93
{ PIOB, PIO_PB1, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 94
{ PIOB, PIO_PB0, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 95
{ PIOC, PIO_PC10, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 96
{ PIOB, PIO_PB24, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 97
{ PIOB, PIO_PB7, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 98
{ PIOB, PIO_PB6, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 99
{ PIOB, PIO_PB8, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 100
{ PIOB, PIO_PB5, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 101
{ PIOB, PIO_PB4, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 102
{ PIOB, PIO_PB3, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 103
{ PIOC, PIO_PC20, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 104
{ PIOB, PIO_PB22, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 105
{ PIOC, PIO_PC27, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 106
{ PIOB, PIO_PB10B_A18, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 107
{ PIOB, PIO_PB9, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 108
{ PIOA, PIO_PA5, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 109
// END
{ NULL, 0, 0, PIO_NOT_A_PIN, PIO_DEFAULT, 0, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }
} ;
uint8_t g_pinStatus[PINS_COUNT] = {0};
#ifdef __cplusplus
}
#endif
/*
* UART objects
*/
RingBuffer rx_buffer1;
RingBuffer tx_buffer1;
UARTClass Serial(UART, UART_IRQn, ID_UART, &rx_buffer1, &tx_buffer1);
void serialEvent() __attribute__((weak));
void serialEvent() { }
// IT handlers
void UART_Handler(void)
{
Serial.IrqHandler();
}
// ----------------------------------------------------------------------------
/*
* USART objects
*/
RingBuffer rx_buffer2;
RingBuffer rx_buffer3;
RingBuffer rx_buffer4;
RingBuffer tx_buffer2;
RingBuffer tx_buffer3;
RingBuffer tx_buffer4;
USARTClass Serial1(USART0, USART0_IRQn, ID_USART0, &rx_buffer2, &tx_buffer2);
void serialEvent1() __attribute__((weak));
void serialEvent1() { }
USARTClass Serial2(USART1, USART1_IRQn, ID_USART1, &rx_buffer3, &tx_buffer3);
void serialEvent2() __attribute__((weak));
void serialEvent2() { }
USARTClass Serial3(USART3, USART3_IRQn, ID_USART3, &rx_buffer4, &tx_buffer4);
void serialEvent3() __attribute__((weak));
void serialEvent3() { }
// IT handlers
void USART0_Handler(void)
{
Serial1.IrqHandler();
}
void USART1_Handler(void)
{
Serial2.IrqHandler();
}
void USART3_Handler(void)
{
Serial3.IrqHandler();
}
// ----------------------------------------------------------------------------
void serialEventRun(void)
{
if (Serial.available()) serialEvent();
if (Serial1.available()) serialEvent1();
if (Serial2.available()) serialEvent2();
if (Serial3.available()) serialEvent3();
}
// ----------------------------------------------------------------------------
#ifdef __cplusplus
extern "C" {
#endif
void __libc_init_array(void);
void init( void )
{
SystemInit();
// Set Systick to 1ms interval, common to all SAM3 variants
if (SysTick_Config(SystemCoreClock / 1000))
{
// Capture error
while (true);
}
// Initialize C library
__libc_init_array();
// Disable pull-up on every pin
for (unsigned i = 0; i < PINS_COUNT; i++)
digitalWrite(i, LOW);
// Enable parallel access on PIO output data registers
PIOA->PIO_OWER = 0xFFFFFFFF;
PIOB->PIO_OWER = 0xFFFFFFFF;
PIOC->PIO_OWER = 0xFFFFFFFF;
PIOD->PIO_OWER = 0xFFFFFFFF;
// Set USB Full Speed for Archim
udd_low_speed_disable();
udd_high_speed_disable();
// Initialize Serial port U(S)ART pins
PIO_Configure(
g_APinDescription[PINS_UART].pPort,
g_APinDescription[PINS_UART].ulPinType,
g_APinDescription[PINS_UART].ulPin,
g_APinDescription[PINS_UART].ulPinConfiguration);
digitalWrite(0, HIGH); // Enable pullup for RX0
PIO_Configure(
g_APinDescription[PINS_USART0].pPort,
g_APinDescription[PINS_USART0].ulPinType,
g_APinDescription[PINS_USART0].ulPin,
g_APinDescription[PINS_USART0].ulPinConfiguration);
PIO_Configure(
g_APinDescription[PINS_USART1].pPort,
g_APinDescription[PINS_USART1].ulPinType,
g_APinDescription[PINS_USART1].ulPin,
g_APinDescription[PINS_USART1].ulPinConfiguration);
PIO_Configure(
g_APinDescription[PINS_USART3].pPort,
g_APinDescription[PINS_USART3].ulPinType,
g_APinDescription[PINS_USART3].ulPin,
g_APinDescription[PINS_USART3].ulPinConfiguration);
// Initialize USB pins
PIO_Configure(
g_APinDescription[PINS_USB].pPort,
g_APinDescription[PINS_USB].ulPinType,
g_APinDescription[PINS_USB].ulPin,
g_APinDescription[PINS_USB].ulPinConfiguration);
// Initialize CAN pins
PIO_Configure(
g_APinDescription[PINS_CAN0].pPort,
g_APinDescription[PINS_CAN0].ulPinType,
g_APinDescription[PINS_CAN0].ulPin,
g_APinDescription[PINS_CAN0].ulPinConfiguration);
PIO_Configure(
g_APinDescription[PINS_CAN1].pPort,
g_APinDescription[PINS_CAN1].ulPinType,
g_APinDescription[PINS_CAN1].ulPin,
g_APinDescription[PINS_CAN1].ulPinConfiguration);
// Initialize Analog Controller
pmc_enable_periph_clk(ID_ADC);
adc_init(ADC, SystemCoreClock, ADC_FREQ_MAX, ADC_STARTUP_FAST);
adc_configure_timing(ADC, 0, ADC_SETTLING_TIME_3, 1);
adc_configure_trigger(ADC, ADC_TRIG_SW, 0); // Disable hardware trigger.
adc_disable_interrupt(ADC, 0xFFFFFFFF); // Disable all ADC interrupts.
adc_disable_all_channel(ADC);
// Initialize analogOutput module
analogOutputInit();
}
#ifdef __cplusplus
}
#endif

284
buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/variant.h Normal file
View File

@@ -0,0 +1,284 @@
/*
Copyright (c) 2011 Arduino. All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _VARIANT_ARDUINO_DUE_X_
#define _VARIANT_ARDUINO_DUE_X_
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
/** Frequency of the board main oscillator */
#define VARIANT_MAINOSC 12000000
/** Master clock frequency */
#define VARIANT_MCK 84000000
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "Arduino.h"
#ifdef __cplusplus
#include "UARTClass.h"
#include "USARTClass.h"
#endif
#ifdef __cplusplus
extern "C"{
#endif // __cplusplus
/**
* Libc porting layers
*/
#if defined ( __GNUC__ ) /* GCC CS3 */
# include <syscalls.h> /** RedHat Newlib minimal stub */
#endif
/*----------------------------------------------------------------------------
* Pins
*----------------------------------------------------------------------------*/
// Number of pins defined in PinDescription array
#define PINS_COUNT 79
#define NUM_DIGITAL_PINS 66
#define NUM_ANALOG_INPUTS 12
#define analogInputToDigitalPin(p) ((p < 12) ? (p) + 54 : -1)
#define digitalPinToPort(P) ( g_APinDescription[P].pPort )
#define digitalPinToBitMask(P) ( g_APinDescription[P].ulPin )
//#define analogInPinToBit(P) ( )
#define portOutputRegister(port) ( &(port->PIO_ODSR) )
#define portInputRegister(port) ( &(port->PIO_PDSR) )
#define digitalPinHasPWM(P) ( g_APinDescription[P].ulPWMChannel != NOT_ON_PWM || g_APinDescription[P].ulTCChannel != NOT_ON_TIMER )
/*
* portModeRegister(..) should return a register to set pin mode
* INPUT or OUTPUT by setting the corresponding bit to 0 or 1.
* Unfortunately on SAM architecture the PIO_OSR register is
* read-only and can be set only through the enable/disable registers
* pair PIO_OER/PIO_ODR.
*/
// #define portModeRegister(port) ( &(port->PIO_OSR) )
/*
* digitalPinToTimer(..) is AVR-specific and is not defined for SAM
* architecture. If you need to check if a pin supports PWM you must
* use digitalPinHasPWM(..).
*
* https://github.com/arduino/Arduino/issues/1833
*/
// #define digitalPinToTimer(P)
// Interrupts
#define digitalPinToInterrupt(p) ((p) < NUM_DIGITAL_PINS ? (p) : -1)
// LEDs
#define PIN_LED_13 (13U)
#define PIN_LED_RXL (72U)
#define PIN_LED_TXL (73U)
#define PIN_LED PIN_LED_13
#define PIN_LED2 PIN_LED_RXL
#define PIN_LED3 PIN_LED_TXL
#define LED_BUILTIN 13
/*
* SPI Interfaces
*/
#define SPI_INTERFACES_COUNT 1
#define SPI_INTERFACE SPI0
#define SPI_INTERFACE_ID ID_SPI0
#define SPI_CHANNELS_NUM 4
#define PIN_SPI_SS0 (77U)
#define PIN_SPI_SS1 (87U)
#define PIN_SPI_SS2 (86U)
#define PIN_SPI_SS3 (78U)
#define PIN_SPI_MOSI (75U)
#define PIN_SPI_MISO (74U)
#define PIN_SPI_SCK (76U)
#define BOARD_SPI_SS0 (77U) //(10U)
#define BOARD_SPI_SS1 (4U)
#define BOARD_SPI_SS2 (52U)
#define BOARD_SPI_SS3 PIN_SPI_SS3
#define BOARD_SPI_DEFAULT_SS BOARD_SPI_SS3
#define BOARD_PIN_TO_SPI_PIN(x) \
(x==BOARD_SPI_SS0 ? PIN_SPI_SS0 : \
(x==BOARD_SPI_SS1 ? PIN_SPI_SS1 : \
(x==BOARD_SPI_SS2 ? PIN_SPI_SS2 : PIN_SPI_SS3 )))
#define BOARD_PIN_TO_SPI_CHANNEL(x) \
(x==BOARD_SPI_SS0 ? 0 : \
(x==BOARD_SPI_SS1 ? 1 : \
(x==BOARD_SPI_SS2 ? 2 : 3)))
static const uint8_t SS = BOARD_SPI_SS0;
static const uint8_t SS1 = BOARD_SPI_SS1;
static const uint8_t SS2 = BOARD_SPI_SS2;
static const uint8_t SS3 = BOARD_SPI_SS3;
static const uint8_t MOSI = PIN_SPI_MOSI;
static const uint8_t MISO = PIN_SPI_MISO;
static const uint8_t SCK = PIN_SPI_SCK;
/*
* Wire Interfaces
*/
#define WIRE_INTERFACES_COUNT 2
#define PIN_WIRE_SDA (20U)
#define PIN_WIRE_SCL (21U)
#define WIRE_INTERFACE TWI1
#define WIRE_INTERFACE_ID ID_TWI1
#define WIRE_ISR_HANDLER TWI1_Handler
#define WIRE_ISR_ID TWI1_IRQn
#define PIN_WIRE1_SDA (70U)
#define PIN_WIRE1_SCL (71U)
#define WIRE1_INTERFACE TWI0
#define WIRE1_INTERFACE_ID ID_TWI0
#define WIRE1_ISR_HANDLER TWI0_Handler
#define WIRE1_ISR_ID TWI0_IRQn
static const uint8_t SDA = PIN_WIRE_SDA;
static const uint8_t SCL = PIN_WIRE_SCL;
static const uint8_t SDA1 = PIN_WIRE1_SDA;
static const uint8_t SCL1 = PIN_WIRE1_SCL;
/*
* UART/USART Interfaces
*/
// Serial
#define PINS_UART (81U)
// Serial1
#define PINS_USART0 (82U)
// Serial2
#define PINS_USART1 (83U)
// Serial3
#define PINS_USART3 (84U)
/*
* USB Interfaces
*/
#define PINS_USB (85U)
/*
* Analog pins
*/
static const uint8_t A0 = 54;
static const uint8_t A1 = 55;
static const uint8_t A2 = 56;
static const uint8_t A3 = 57;
static const uint8_t A4 = 58;
static const uint8_t A5 = 59;
static const uint8_t A6 = 60;
static const uint8_t A7 = 61;
static const uint8_t A8 = 62;
static const uint8_t A9 = 63;
static const uint8_t A10 = 64;
static const uint8_t A11 = 65;
static const uint8_t DAC0 = 66;
static const uint8_t DAC1 = 67;
static const uint8_t CANRX = 68;
static const uint8_t CANTX = 69;
#define ADC_RESOLUTION 12
/*
* Complementary CAN pins
*/
static const uint8_t CAN1RX = 88;
static const uint8_t CAN1TX = 89;
// CAN0
#define PINS_CAN0 (90U)
// CAN1
#define PINS_CAN1 (91U)
/*
* DACC
*/
#define DACC_INTERFACE DACC
#define DACC_INTERFACE_ID ID_DACC
#define DACC_RESOLUTION 12
#define DACC_ISR_HANDLER DACC_Handler
#define DACC_ISR_ID DACC_IRQn
/*
* PWM
*/
#define PWM_INTERFACE PWM
#define PWM_INTERFACE_ID ID_PWM
#define PWM_FREQUENCY 31000
#define PWM_MAX_DUTY_CYCLE 255
#define PWM_MIN_DUTY_CYCLE 0
#define PWM_RESOLUTION 8
/*
* TC
*/
#define TC_INTERFACE TC0
#define TC_INTERFACE_ID ID_TC0
#define TC_FREQUENCY 100000
#define TC_MAX_DUTY_CYCLE 255
#define TC_MIN_DUTY_CYCLE 0
#define TC_RESOLUTION 8
#ifdef __cplusplus
}
#endif
/*----------------------------------------------------------------------------
* Arduino objects - C++ only
*----------------------------------------------------------------------------*/
#ifdef __cplusplus
extern UARTClass Serial;
extern USARTClass Serial1;
extern USARTClass Serial2;
extern USARTClass Serial3;
#endif
// These serial port names are intended to allow libraries and architecture-neutral
// sketches to automatically default to the correct port name for a particular type
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
//
// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
//
// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
//
// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
//
// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
//
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
// pins are NOT connected to anything by default.
#define SERIAL_PORT_MONITOR Serial
#define SERIAL_PORT_USBVIRTUAL SerialUSB
#define SERIAL_PORT_HARDWARE_OPEN Serial1
#define SERIAL_PORT_HARDWARE_OPEN1 Serial2
#define SERIAL_PORT_HARDWARE_OPEN2 Serial3
#define SERIAL_PORT_HARDWARE Serial
#define SERIAL_PORT_HARDWARE1 Serial1
#define SERIAL_PORT_HARDWARE2 Serial2
#define SERIAL_PORT_HARDWARE3 Serial3
#endif /* _VARIANT_ARDUINO_DUE_X_ */

80
buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PeripheralPins.c → buildroot/share/PlatformIO/variants/MARLIN_BIGTREE_BTT002/PeripheralPins.c Executable file → Normal file
View File

@@ -41,32 +41,32 @@
#ifdef HAL_ADC_MODULE_ENABLED
const PinMap PinMap_ADC[] = {
{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 E0_DIR
{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 BLTOUCH_2
{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 BLTOUCH_4
{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 E1_EN
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 TF_SS
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 TF_SCLK
{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 TF_MISO
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 LED
{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 HEATER2
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 HEATER0
{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 Z_EN
{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 EXP_14
{PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 Z_DIR
{PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 E0_EN
{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 EXP_8
{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 EXP_7
{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 TEMP_1
{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 TEMP_BED
{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 TEMP_0
{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 EXP2-1
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 TF_SS SD_SS (CUSTOM_SPI_PINS)
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 TF_SCLK SD_SCK
{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 TF_MISO SD_MISO
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 LED SD_MOSI
{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 BTN_EN2
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 BTN_ENC
{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 ---
{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 ---
{PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 ---
{PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 TEMP_PROBE
{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 SD_DETECT
{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 BTN_EN1
#if STM32F4X_PIN_NUM >= 144 //144 pins mcu, 114 gpio, 24 ADC
{PF_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_IN9 TH_0
#if STM32F4X_PIN_NUM >= 144 // 144 pins mcu, 114 gpio, 24 ADC
{PF_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_IN9 TH_0
{PF_4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_IN14 TH_1
{PF_5, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_IN15 TH_2
{PF_6, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4 TH_3
{PF_7, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5 EXP_13
{PF_8, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6 EXP_3
{PF_9, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7 EXP_6
{PF_10, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8 EXP_5
{PF_6, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4 TH_3
{PF_7, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5 EXP_13
{PF_8, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6 EXP_3
{PF_9, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7 EXP_6
{PF_10, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8 EXP_5
#endif
{NC, NP, 0}
};
@@ -95,9 +95,7 @@ const PinMap PinMap_I2C_SDA[] = {
#endif
{NC, NP, 0}
};
#endif
#ifdef HAL_I2C_MODULE_ENABLED
const PinMap PinMap_I2C_SCL[] = {
{PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
@@ -114,21 +112,23 @@ const PinMap PinMap_I2C_SCL[] = {
#ifdef HAL_TIM_MODULE_ENABLED
const PinMap PinMap_PWM[] = {
{PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 HEATER0
{PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 HEATER1
{PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 HEATER2
{PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 BED
{PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 FAN0
{PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 FAN1
{PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 FAN2
{PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 EXTENSION1-4
{PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 BED
{PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 HEATER0
{PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 FAN0
{PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 FAN1
//probably unused on SKR-Pro. confirmation needed, please.
/**
* Unused by specifications on BTT002. (PLEASE CONFIRM)
* Uncomment the corresponding line if you want to have HardwarePWM on some pins.
* WARNING: check timers' usage first to avoid conflicts.
* If you don't know what you're doing leave things as they are or you WILL break something (including hardware)
* If you alter this section DO NOT report bugs to Marlin team since they are most likely caused by you. Thank you.
*/
//{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
//{PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
//{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 is bltouch analog?
//{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
//{PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
//{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 is bltouch analog?
//{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
//{PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
//{PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
//{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
@@ -148,8 +148,10 @@ const PinMap PinMap_PWM[] = {
//{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
//{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
//{PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
//{PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
//{PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
//{PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
//{PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
//{PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
//{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
//{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
@@ -157,9 +159,7 @@ const PinMap PinMap_PWM[] = {
//{PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
//{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
//{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
//{PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
//{PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
//{PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
//{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
//{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
//{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
@@ -174,7 +174,11 @@ const PinMap PinMap_PWM[] = {
//{PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
//{PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
//{PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
//{PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3
//{PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
//{PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4
//{PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
//{PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
//{PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
//{PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
//{PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N

50
buildroot/share/PlatformIO/variants/MARLIN_BIGTREE_BTT002/PinNamesVar.h Normal file
View File

@@ -0,0 +1,50 @@
/* SYS_WKUP */
#ifdef PWR_WAKEUP_PIN1
SYS_WKUP1 = PA_0,
#endif
#ifdef PWR_WAKEUP_PIN2
SYS_WKUP2 = NC,
#endif
#ifdef PWR_WAKEUP_PIN3
SYS_WKUP3 = NC,
#endif
#ifdef PWR_WAKEUP_PIN4
SYS_WKUP4 = NC,
#endif
#ifdef PWR_WAKEUP_PIN5
SYS_WKUP5 = NC,
#endif
#ifdef PWR_WAKEUP_PIN6
SYS_WKUP6 = NC,
#endif
#ifdef PWR_WAKEUP_PIN7
SYS_WKUP7 = NC,
#endif
#ifdef PWR_WAKEUP_PIN8
SYS_WKUP8 = NC,
#endif
/* USB */
#ifdef USBCON
USB_OTG_FS_SOF = PA_8,
USB_OTG_FS_VBUS = PA_9,
USB_OTG_FS_ID = PA_10,
USB_OTG_FS_DM = PA_11,
USB_OTG_FS_DP = PA_12,
USB_OTG_HS_ULPI_D0 = PA_3,
USB_OTG_HS_SOF = PA_4,
USB_OTG_HS_ULPI_CK = PA_5,
USB_OTG_HS_ULPI_D1 = PB_0,
USB_OTG_HS_ULPI_D2 = PB_1,
USB_OTG_HS_ULPI_D7 = PB_5,
USB_OTG_HS_ULPI_D3 = PB_10,
USB_OTG_HS_ULPI_D4 = PB_11,
USB_OTG_HS_ID = PB_12,
USB_OTG_HS_ULPI_D5 = PB_12,
USB_OTG_HS_ULPI_D6 = PB_13,
USB_OTG_HS_VBUS = PB_13,
USB_OTG_HS_DM = PB_14,
USB_OTG_HS_DP = PB_15,
USB_OTG_HS_ULPI_STP = PC_0,
USB_OTG_HS_ULPI_DIR = PC_2,
USB_OTG_HS_ULPI_NXT = PC_3,
#endif

52
buildroot/share/PlatformIO/variants/MARLIN_BIGTREE_BTT002/hal_conf_extra.h Normal file
View File

@@ -0,0 +1,52 @@
#pragma once
#define HAL_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED
#define HAL_CRC_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED // Needed for Endstop (and other external) Interrupts
#define HAL_GPIO_MODULE_ENABLED
#define HAL_I2C_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
//#define HAL_RTC_MODULE_ENABLED // Real Time Clock...do we use it?
#define HAL_SPI_MODULE_ENABLED
#define HAL_TIM_MODULE_ENABLED
#define HAL_USART_MODULE_ENABLED
#define HAL_CORTEX_MODULE_ENABLED
//#define HAL_UART_MODULE_ENABLED // by default
//#define HAL_PCD_MODULE_ENABLED // Automatically added if any type of USB is enabled, as in Arduino IDE. (STM32 v3.10700.191028)
//#define HAL_SD_MODULE_ENABLED
//#define HAL_DAC_MODULE_ENABLED
//#define HAL_FLASH_MODULE_ENABLED
//#define HAL_CAN_MODULE_ENABLED
//#define HAL_CAN_LEGACY_MODULE_ENABLED
//#define HAL_CEC_MODULE_ENABLED
//#define HAL_CRYP_MODULE_ENABLED
//#define HAL_DCMI_MODULE_ENABLED
//#define HAL_DMA2D_MODULE_ENABLED
//#define HAL_ETH_MODULE_ENABLED
//#define HAL_NAND_MODULE_ENABLED
//#define HAL_NOR_MODULE_ENABLED
//#define HAL_PCCARD_MODULE_ENABLED
//#define HAL_SRAM_MODULE_ENABLED
//#define HAL_SDRAM_MODULE_ENABLED
//#define HAL_HASH_MODULE_ENABLED
//#define HAL_SMBUS_MODULE_ENABLED
//#define HAL_I2S_MODULE_ENABLED
//#define HAL_IWDG_MODULE_ENABLED
//#define HAL_LTDC_MODULE_ENABLED
//#define HAL_DSI_MODULE_ENABLED
//#define HAL_QSPI_MODULE_ENABLED
//#define HAL_RNG_MODULE_ENABLED
//#define HAL_SAI_MODULE_ENABLED
//#define HAL_IRDA_MODULE_ENABLED
//#define HAL_SMARTCARD_MODULE_ENABLED
//#define HAL_WWDG_MODULE_ENABLED
//#define HAL_HCD_MODULE_ENABLED
//#define HAL_FMPI2C_MODULE_ENABLED
//#define HAL_SPDIFRX_MODULE_ENABLED
//#define HAL_DFSDM_MODULE_ENABLED
//#define HAL_LPTIM_MODULE_ENABLED
//#define HAL_MMC_MODULE_ENABLED

2
buildroot/share/PlatformIO/variants/BIGTREE_BTT002/ldscript.ld → buildroot/share/PlatformIO/variants/MARLIN_BIGTREE_BTT002/ldscript.ld Executable file → Normal file
View File

@@ -169,7 +169,7 @@ SECTIONS
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss secion */
/* This is used by the startup in order to initialize the .bss section */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)

0
buildroot/share/PlatformIO/variants/BIGTREE_BTT002/variant.cpp → buildroot/share/PlatformIO/variants/MARLIN_BIGTREE_BTT002/variant.cpp Executable file → Normal file
View File

15
buildroot/share/PlatformIO/variants/BIGTREE_BTT002/variant.h → buildroot/share/PlatformIO/variants/MARLIN_BIGTREE_BTT002/variant.h Executable file → Normal file
View File

@@ -244,12 +244,10 @@ extern "C" {
#define PIN_WIRE_SCL PB6
// Timer Definitions
//Do not use timer used by PWM pins when possible. See PinMap_PWM in PeripheralPins.c
#define TIMER_TONE TIM6
#define TIMER_SERIAL TIM7
// Do not use basic timer: OC is required
#define TIMER_SERVO TIM2 //TODO: advanced-control timers don't work
// Do not use timer used by PWM pins when possible. See PinMap_PWM in PeripheralPins.c
#define TIMER_TONE TIM7
#define TIMER_SERVO TIM5
#define TIMER_SERIAL TIM2
// UART Definitions
// Define here Serial instance number to map on Serial generic name
@@ -266,6 +264,11 @@ extern "C" {
#define PIN_SERIAL_RX PA10
#define PIN_SERIAL_TX PA9
// Serial Pins for the MMU2
#define ENABLE_HWSERIAL4
#define PIN_SERIAL4_RX PC11
#define PIN_SERIAL4_TX PC10
#ifdef __cplusplus
} // extern "C"
#endif

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