Merge upstream changes from Marlin 2.1.2.2
This commit is contained in:
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -63,8 +63,8 @@ HARDWARE_MOTHERBOARD ?= 1020
|
||||
|
||||
ifeq ($(OS),Windows_NT)
|
||||
# Windows
|
||||
ARDUINO_INSTALL_DIR ?= ${HOME}/Arduino
|
||||
ARDUINO_USER_DIR ?= ${HOME}/Arduino
|
||||
ARDUINO_INSTALL_DIR ?= ${HOME}/AppData/Local/Arduino
|
||||
ARDUINO_USER_DIR ?= ${HOME}/Documents/Arduino
|
||||
else
|
||||
UNAME_S := $(shell uname -s)
|
||||
ifeq ($(UNAME_S),Linux)
|
||||
@@ -82,11 +82,11 @@ endif
|
||||
|
||||
# Arduino source install directory, and version number
|
||||
# On most linuxes this will be /usr/share/arduino
|
||||
ARDUINO_INSTALL_DIR ?= ${HOME}/Arduino
|
||||
ARDUINO_VERSION ?= 106
|
||||
ARDUINO_INSTALL_DIR ?= ${HOME}/AppData/Local/Arduino # C:/Users/${USERNAME}/AppData/Local/Arduino
|
||||
ARDUINO_VERSION ?= 10819
|
||||
|
||||
# The installed Libraries are in the User folder
|
||||
ARDUINO_USER_DIR ?= ${HOME}/Arduino
|
||||
ARDUINO_USER_DIR ?= ${HOME}/Documents/Arduino
|
||||
|
||||
# You can optionally set a path to the avr-gcc tools.
|
||||
# Requires a trailing slash. For example, /usr/local/avr-gcc/bin/
|
||||
@@ -656,18 +656,18 @@ ifeq ($(HARDWARE_VARIANT), $(filter $(HARDWARE_VARIANT),arduino Teensy Sanguino)
|
||||
# Old libraries (avr-core 1.6.21 < / Arduino < 1.6.8)
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/hardware/arduino/avr/libraries/SPI
|
||||
# New libraries (avr-core >= 1.6.21 / Arduino >= 1.6.8)
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/hardware/arduino/avr/libraries/SPI/src
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/packages/arduino/hardware/arduino/avr/1.8.6/libraries/SPI/src
|
||||
endif
|
||||
|
||||
ifeq ($(IS_MCU),1)
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/hardware/arduino/avr/cores/arduino
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/packages/arduino/hardware/arduino/avr/1.8.6/cores/arduino
|
||||
|
||||
# Old libraries (avr-core 1.6.21 < / Arduino < 1.6.8)
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/hardware/arduino/avr/libraries/SPI
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/hardware/arduino/avr/libraries/SoftwareSerial
|
||||
# New libraries (avr-core >= 1.6.21 / Arduino >= 1.6.8)
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/hardware/arduino/avr/libraries/SPI/src
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/hardware/arduino/avr/libraries/SoftwareSerial/src
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/packages/arduino/hardware/arduino/avr/1.8.6/libraries/SPI/src
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/packages/arduino/hardware/arduino/avr/1.8.6/libraries/SoftwareSerial/src
|
||||
endif
|
||||
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/libraries/LiquidCrystal/src
|
||||
@@ -681,17 +681,17 @@ ifeq ($(WIRE), 1)
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/hardware/arduino/avr/libraries/Wire
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/hardware/arduino/avr/libraries/Wire/utility
|
||||
# New libraries (avr-core >= 1.6.21 / Arduino >= 1.6.8)
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/hardware/arduino/avr/libraries/Wire/src
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/hardware/arduino/avr/libraries/Wire/src/utility
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/packages/arduino/hardware/avr/1.8.6/libraries/Wire/src
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/packages/arduino/hardware/avr/1.8.6/libraries/Wire/src/utility
|
||||
endif
|
||||
ifeq ($(NEOPIXEL), 1)
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/libraries/Adafruit_NeoPixel
|
||||
endif
|
||||
ifeq ($(U8GLIB), 1)
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/libraries/U8glib
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/libraries/U8glib/csrc
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/libraries/U8glib/cppsrc
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/libraries/U8glib/fntsrc
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/libraries/U8glib-HAL
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/libraries/U8glib-HAL/src
|
||||
# VPATH += $(ARDUINO_INSTALL_DIR)/libraries/U8glib
|
||||
# VPATH += $(ARDUINO_INSTALL_DIR)/libraries/U8glib/src
|
||||
endif
|
||||
ifeq ($(TMC), 1)
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/libraries/TMCStepper/src
|
||||
@@ -700,9 +700,9 @@ endif
|
||||
|
||||
ifeq ($(HARDWARE_VARIANT), arduino)
|
||||
HARDWARE_SUB_VARIANT ?= mega
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/hardware/arduino/avr/variants/$(HARDWARE_SUB_VARIANT)
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/packages/arduino/hardware/avr/1.8.6/variants/$(HARDWARE_SUB_VARIANT)
|
||||
else ifeq ($(HARDWARE_VARIANT), Sanguino)
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/hardware/marlin/avr/variants/sanguino
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/packages/arduino/hardware/avr/1.8.6/variants/sanguino
|
||||
else ifeq ($(HARDWARE_VARIANT), archim)
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/packages/ultimachine/hardware/sam/1.6.9-b/system/libsam
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/packages/ultimachine/hardware/sam/1.6.9-b/system/CMSIS/CMSIS/Include/
|
||||
@@ -718,7 +718,7 @@ else ifeq ($(HARDWARE_VARIANT), archim)
|
||||
LDLIBS = $(ARDUINO_INSTALL_DIR)/packages/ultimachine/hardware/sam/1.6.9-b/variants/archim/libsam_sam3x8e_gcc_rel.a
|
||||
else
|
||||
HARDWARE_SUB_VARIANT ?= standard
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/hardware/$(HARDWARE_VARIANT)/variants/$(HARDWARE_SUB_VARIANT)
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/packages/arduino/hardware/avr/1.8.6/variants/$(HARDWARE_SUB_VARIANT)
|
||||
endif
|
||||
|
||||
LIB_SRC = wiring.c \
|
||||
@@ -733,7 +733,7 @@ endif
|
||||
|
||||
ifeq ($(HARDWARE_VARIANT), Teensy)
|
||||
LIB_SRC = wiring.c
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/hardware/teensy/cores/teensy
|
||||
VPATH += $(ARDUINO_INSTALL_DIR)/packages/arduino/hardware/teensy/cores/teensy
|
||||
endif
|
||||
|
||||
LIB_CXXSRC = WMath.cpp WString.cpp Print.cpp SPI.cpp
|
||||
@@ -880,7 +880,7 @@ AVRDUDE_WRITE_FLASH = -Uflash:w:$(BUILD_DIR)/$(TARGET).hex:i
|
||||
ifeq ($(shell uname -s), Linux)
|
||||
AVRDUDE_CONF = /etc/avrdude/avrdude.conf
|
||||
else
|
||||
AVRDUDE_CONF = $(ARDUINO_INSTALL_DIR)/hardware/tools/avr/etc/avrdude.conf
|
||||
AVRDUDE_CONF = $(ARDUINO_INSTALL_DIR)/packages/arduino/tools/avrdude/6.3.0-arduino17/etc/avrdude.conf
|
||||
endif
|
||||
AVRDUDE_FLAGS = -D -C$(AVRDUDE_CONF) \
|
||||
-p$(PROG_MCU) -P$(AVRDUDE_PORT) -c$(AVRDUDE_PROGRAMMER) \
|
||||
|
@@ -2,7 +2,7 @@
|
||||
|
||||
Marlin Firmware
|
||||
|
||||
(c) 2011-2020 MarlinFirmware
|
||||
(c) 2011-2024 MarlinFirmware
|
||||
Portions of Marlin are (c) by their respective authors.
|
||||
All code complies with GPLv2 and/or GPLv3
|
||||
|
||||
@@ -27,7 +27,7 @@ Configuration
|
||||
- https://github.com/MarlinFirmware/Configurations
|
||||
Example configurations for several printer models.
|
||||
|
||||
- https://www.youtube.com/watch?v=3gwWVFtdg-4
|
||||
- https://youtu.be/3gwWVFtdg-4
|
||||
A good 20-minute overview of Marlin configuration by Tom Sanladerer.
|
||||
(Applies to Marlin 1.0.x, so Jerk and Acceleration should be halved.)
|
||||
Also... https://www.google.com/search?tbs=vid%3A1&q=configure+marlin
|
||||
|
@@ -28,7 +28,7 @@
|
||||
/**
|
||||
* Marlin release version identifier
|
||||
*/
|
||||
//#define SHORT_BUILD_VERSION "2.1.2.1"
|
||||
//#define SHORT_BUILD_VERSION "2.1.2.2"
|
||||
|
||||
/**
|
||||
* Verbose version identifier which should contain a reference to the location
|
||||
@@ -41,7 +41,7 @@
|
||||
* here we define this default string as the date where the latest release
|
||||
* version was tagged.
|
||||
*/
|
||||
//#define STRING_DISTRIBUTION_DATE "2023-05-16"
|
||||
//#define STRING_DISTRIBUTION_DATE "2024-02-08"
|
||||
|
||||
/**
|
||||
* Defines a generic printer name to be output to the LCD after booting Marlin.
|
||||
|
@@ -3,10 +3,50 @@
|
||||
# config.ini - Options to apply before the build
|
||||
#
|
||||
[config:base]
|
||||
#
|
||||
# ini_use_config - A comma-separated list of actions to apply to the Configuration files.
|
||||
# The actions will be applied in the listed order.
|
||||
# - none
|
||||
# Ignore this file and don't apply any configuration options
|
||||
#
|
||||
# - base
|
||||
# Just apply the options in config:base to the configuration
|
||||
#
|
||||
# - minimal
|
||||
# Just apply the options in config:minimal to the configuration
|
||||
#
|
||||
# - all
|
||||
# Apply all 'config:*' sections in this file to the configuration
|
||||
#
|
||||
# - another.ini
|
||||
# Load another INI file with a path relative to this config.ini file (i.e., within Marlin/)
|
||||
#
|
||||
# - https://me.myserver.com/path/to/configs
|
||||
# Fetch configurations from any URL.
|
||||
#
|
||||
# - example/Creality/Ender-5 Plus @ bugfix-2.1.x
|
||||
# Fetch example configuration files from the MarlinFirmware/Configurations repository
|
||||
# https://raw.githubusercontent.com/MarlinFirmware/Configurations/bugfix-2.1.x/config/examples/Creality/Ender-5%20Plus/
|
||||
#
|
||||
# - example/default @ release-2.0.9.7
|
||||
# Fetch default configuration files from the MarlinFirmware/Configurations repository
|
||||
# https://raw.githubusercontent.com/MarlinFirmware/Configurations/release-2.0.9.7/config/default/
|
||||
#
|
||||
# - [disable]
|
||||
# Comment out all #defines in both Configuration.h and Configuration_adv.h. This is useful
|
||||
# to start with a clean slate before applying any config: options, so only the options explicitly
|
||||
# set in config.ini will be enabled in the configuration.
|
||||
#
|
||||
# - [flatten] (Not yet implemented)
|
||||
# Produce a flattened set of Configuration.h and Configuration_adv.h files with only the enabled
|
||||
# #defines and no comments. A clean look, but context-free.
|
||||
#
|
||||
ini_use_config = none
|
||||
|
||||
# Load all config: sections in this file
|
||||
;ini_use_config = all
|
||||
# Disable everything and apply subsequent config:base options
|
||||
;ini_use_config = [disable], base
|
||||
# Load config file relative to Marlin/
|
||||
;ini_use_config = another.ini
|
||||
# Download configurations from GitHub
|
||||
@@ -42,7 +82,7 @@ preheat_1_temp_hotend = 180
|
||||
bang_max = 255
|
||||
pidtemp = on
|
||||
pid_k1 = 0.95
|
||||
pid_max = BANG_MAX
|
||||
pid_max = 255
|
||||
pid_functional_range = 10
|
||||
|
||||
default_kp = 22.20
|
||||
@@ -100,10 +140,10 @@ invert_x_step_pin = false
|
||||
invert_y_step_pin = false
|
||||
invert_z_step_pin = false
|
||||
|
||||
disable_x = false
|
||||
disable_y = false
|
||||
disable_z = false
|
||||
disable_e = false
|
||||
disable_x = off
|
||||
disable_y = off
|
||||
disable_z = off
|
||||
disable_e = off
|
||||
|
||||
proportional_font_ratio = 1.0
|
||||
default_nominal_filament_dia = 1.75
|
||||
@@ -127,7 +167,7 @@ busy_while_heating = on
|
||||
default_ejerk = 5.0
|
||||
default_keepalive_interval = 2
|
||||
default_leveling_fade_height = 0.0
|
||||
disable_inactive_extruder = on
|
||||
disable_other_extruders = on
|
||||
display_charset_hd44780 = JAPANESE
|
||||
eeprom_boot_silent = on
|
||||
eeprom_chitchat = on
|
||||
@@ -176,12 +216,12 @@ auto_report_temperatures = on
|
||||
autotemp = on
|
||||
autotemp_oldweight = 0.98
|
||||
bed_check_interval = 5000
|
||||
default_stepper_deactive_time = 120
|
||||
default_stepper_timeout_sec = 120
|
||||
default_volumetric_extruder_limit = 0.00
|
||||
disable_inactive_e = true
|
||||
disable_inactive_x = true
|
||||
disable_inactive_y = true
|
||||
disable_inactive_z = true
|
||||
disable_idle_x = on
|
||||
disable_idle_y = on
|
||||
disable_idle_z = on
|
||||
disable_idle_e = on
|
||||
e0_auto_fan_pin = -1
|
||||
encoder_100x_steps_per_sec = 80
|
||||
encoder_10x_steps_per_sec = 30
|
||||
|
@@ -63,18 +63,23 @@ void save_reset_reason() {
|
||||
|
||||
void MarlinHAL::init() {
|
||||
// Init Servo Pins
|
||||
#define INIT_SERVO(N) OUT_WRITE(SERVO##N##_PIN, LOW)
|
||||
#if HAS_SERVO_0
|
||||
INIT_SERVO(0);
|
||||
OUT_WRITE(SERVO0_PIN, LOW);
|
||||
#endif
|
||||
#if HAS_SERVO_1
|
||||
INIT_SERVO(1);
|
||||
OUT_WRITE(SERVO1_PIN, LOW);
|
||||
#endif
|
||||
#if HAS_SERVO_2
|
||||
INIT_SERVO(2);
|
||||
OUT_WRITE(SERVO2_PIN, LOW);
|
||||
#endif
|
||||
#if HAS_SERVO_3
|
||||
INIT_SERVO(3);
|
||||
OUT_WRITE(SERVO3_PIN, LOW);
|
||||
#endif
|
||||
#if HAS_SERVO_4
|
||||
OUT_WRITE(SERVO4_PIN, LOW);
|
||||
#endif
|
||||
#if HAS_SERVO_5
|
||||
OUT_WRITE(SERVO5_PIN, LOW);
|
||||
#endif
|
||||
|
||||
init_pwm_timers(); // Init user timers to default frequency - 1000HZ
|
||||
@@ -145,12 +150,12 @@ void MarlinHAL::reboot() {
|
||||
// Free Memory Accessor
|
||||
// ------------------------
|
||||
|
||||
#if ENABLED(SDSUPPORT)
|
||||
#if HAS_MEDIA
|
||||
|
||||
#include "../../sd/SdFatUtil.h"
|
||||
int freeMemory() { return SdFatUtil::FreeRam(); }
|
||||
|
||||
#else // !SDSUPPORT
|
||||
#else // !HAS_MEDIA
|
||||
|
||||
extern "C" {
|
||||
extern char __bss_end;
|
||||
@@ -167,6 +172,6 @@ void MarlinHAL::reboot() {
|
||||
}
|
||||
}
|
||||
|
||||
#endif // !SDSUPPORT
|
||||
#endif // !HAS_MEDIA
|
||||
|
||||
#endif // __AVR__
|
||||
|
@@ -1,7 +1,9 @@
|
||||
/**
|
||||
* Marlin 3D Printer Firmware
|
||||
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
|
||||
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
|
||||
*
|
||||
* Based on Sprinter and grbl.
|
||||
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -140,15 +142,15 @@ typedef Servo hal_servo_t;
|
||||
#endif
|
||||
#define LCD_SERIAL lcdSerial
|
||||
#if HAS_DGUS_LCD
|
||||
#define SERIAL_GET_TX_BUFFER_FREE() LCD_SERIAL.get_tx_buffer_free()
|
||||
#define LCD_SERIAL_TX_BUFFER_FREE() LCD_SERIAL.get_tx_buffer_free()
|
||||
#endif
|
||||
#endif
|
||||
|
||||
//
|
||||
// ADC
|
||||
//
|
||||
#define HAL_ADC_VREF 5.0
|
||||
#define HAL_ADC_RESOLUTION 10
|
||||
#define HAL_ADC_VREF_MV 5000
|
||||
#define HAL_ADC_RESOLUTION 10
|
||||
|
||||
//
|
||||
// Pin Mapping for M42, M43, M226
|
||||
|
@@ -119,7 +119,6 @@ void spiBegin() {
|
||||
while (!TEST(SPSR, SPIF)) { /* Intentionally left empty */ }
|
||||
}
|
||||
|
||||
|
||||
/** begin spi transaction */
|
||||
void spiBeginTransaction(uint32_t spiClock, uint8_t bitOrder, uint8_t dataMode) {
|
||||
// Based on Arduino SPI library
|
||||
@@ -175,7 +174,6 @@ void spiBegin() {
|
||||
SPSR = clockDiv | 0x01;
|
||||
}
|
||||
|
||||
|
||||
#else // SOFTWARE_SPI || FORCE_SOFT_SPI
|
||||
|
||||
// ------------------------
|
||||
@@ -198,7 +196,7 @@ void spiBegin() {
|
||||
// output pin high - like sending 0xFF
|
||||
WRITE(SD_MOSI_PIN, HIGH);
|
||||
|
||||
LOOP_L_N(i, 8) {
|
||||
for (uint8_t i = 0; i < 8; ++i) {
|
||||
WRITE(SD_SCK_PIN, HIGH);
|
||||
|
||||
nop; // adjust so SCK is nice
|
||||
@@ -225,7 +223,7 @@ void spiBegin() {
|
||||
void spiSend(uint8_t data) {
|
||||
// no interrupts during byte send - about 8µs
|
||||
cli();
|
||||
LOOP_L_N(i, 8) {
|
||||
for (uint8_t i = 0; i < 8; ++i) {
|
||||
WRITE(SD_SCK_PIN, LOW);
|
||||
WRITE(SD_MOSI_PIN, data & 0x80);
|
||||
data <<= 1;
|
||||
|
@@ -34,12 +34,9 @@
|
||||
#include <WString.h>
|
||||
|
||||
#include "../../inc/MarlinConfigPre.h"
|
||||
#include "../../core/types.h"
|
||||
#include "../../core/serial_hook.h"
|
||||
|
||||
#ifndef SERIAL_PORT
|
||||
#define SERIAL_PORT 0
|
||||
#endif
|
||||
|
||||
#ifndef USBCON
|
||||
|
||||
// The presence of the UBRRH register is used to detect a UART.
|
||||
@@ -138,10 +135,6 @@
|
||||
|
||||
#define BYTE 0
|
||||
|
||||
// Templated type selector
|
||||
template<bool b, typename T, typename F> struct TypeSelector { typedef T type;} ;
|
||||
template<typename T, typename F> struct TypeSelector<false, T, F> { typedef F type; };
|
||||
|
||||
template<typename Cfg>
|
||||
class MarlinSerial {
|
||||
protected:
|
||||
@@ -164,7 +157,7 @@
|
||||
static constexpr B_U2Xx<Cfg::PORT> B_U2X = 0;
|
||||
|
||||
// Base size of type on buffer size
|
||||
typedef typename TypeSelector<(Cfg::RX_SIZE>256), uint16_t, uint8_t>::type ring_buffer_pos_t;
|
||||
typedef uvalue_t(Cfg::RX_SIZE - 1) ring_buffer_pos_t;
|
||||
|
||||
struct ring_buffer_r {
|
||||
volatile ring_buffer_pos_t head, tail;
|
||||
@@ -283,7 +276,7 @@
|
||||
static constexpr bool DROPPED_RX = false;
|
||||
static constexpr bool RX_FRAMING_ERRORS = false;
|
||||
static constexpr bool MAX_RX_QUEUED = false;
|
||||
static constexpr bool RX_OVERRUNS = BOTH(HAS_DGUS_LCD, SERIAL_STATS_RX_BUFFER_OVERRUNS);
|
||||
static constexpr bool RX_OVERRUNS = ALL(HAS_DGUS_LCD, SERIAL_STATS_RX_BUFFER_OVERRUNS);
|
||||
};
|
||||
|
||||
typedef Serial1Class< MarlinSerial< LCDSerialCfg<LCD_SERIAL_PORT> > > MSerialLCD;
|
||||
|
@@ -63,7 +63,6 @@
|
||||
|
||||
static volatile int8_t Channel[_Nbr_16timers]; // counter for the servo being pulsed for each timer (or -1 if refresh interval)
|
||||
|
||||
|
||||
/************ static functions common to all instances ***********************/
|
||||
|
||||
static inline void handle_interrupts(const timer16_Sequence_t timer, volatile uint16_t* TCNTn, volatile uint16_t* OCRnA) {
|
||||
|
@@ -23,7 +23,7 @@
|
||||
|
||||
#include "../../inc/MarlinConfig.h"
|
||||
|
||||
#if EITHER(EEPROM_SETTINGS, SD_FIRMWARE_UPDATE)
|
||||
#if ANY(EEPROM_SETTINGS, SD_FIRMWARE_UPDATE)
|
||||
|
||||
/**
|
||||
* PersistentStore for Arduino-style EEPROM interface
|
||||
|
@@ -91,7 +91,6 @@ void endstop_ISR() { endstops.update(); }
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
// Install Pin change interrupt for a pin. Can be called multiple times.
|
||||
void pciSetup(const int8_t pin) {
|
||||
if (digitalPinHasPCICR(pin)) {
|
||||
@@ -120,7 +119,7 @@ void pciSetup(const int8_t pin) {
|
||||
|
||||
void setup_endstop_interrupts() {
|
||||
#define _ATTACH(P) attachInterrupt(digitalPinToInterrupt(P), endstop_ISR, CHANGE)
|
||||
#if HAS_X_MAX
|
||||
#if USE_X_MAX
|
||||
#if (digitalPinToInterrupt(X_MAX_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(X_MAX_PIN);
|
||||
#else
|
||||
@@ -128,7 +127,7 @@ void setup_endstop_interrupts() {
|
||||
pciSetup(X_MAX_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_X_MIN
|
||||
#if USE_X_MIN
|
||||
#if (digitalPinToInterrupt(X_MIN_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(X_MIN_PIN);
|
||||
#else
|
||||
@@ -136,7 +135,7 @@ void setup_endstop_interrupts() {
|
||||
pciSetup(X_MIN_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_Y_MAX
|
||||
#if USE_Y_MAX
|
||||
#if (digitalPinToInterrupt(Y_MAX_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(Y_MAX_PIN);
|
||||
#else
|
||||
@@ -144,7 +143,7 @@ void setup_endstop_interrupts() {
|
||||
pciSetup(Y_MAX_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_Y_MIN
|
||||
#if USE_Y_MIN
|
||||
#if (digitalPinToInterrupt(Y_MIN_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(Y_MIN_PIN);
|
||||
#else
|
||||
@@ -152,7 +151,7 @@ void setup_endstop_interrupts() {
|
||||
pciSetup(Y_MIN_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_Z_MAX
|
||||
#if USE_Z_MAX
|
||||
#if (digitalPinToInterrupt(Z_MAX_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(Z_MAX_PIN);
|
||||
#else
|
||||
@@ -160,7 +159,7 @@ void setup_endstop_interrupts() {
|
||||
pciSetup(Z_MAX_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_Z_MIN
|
||||
#if USE_Z_MIN
|
||||
#if (digitalPinToInterrupt(Z_MIN_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(Z_MIN_PIN);
|
||||
#else
|
||||
@@ -168,97 +167,97 @@ void setup_endstop_interrupts() {
|
||||
pciSetup(Z_MIN_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_I_MAX
|
||||
#if USE_I_MAX
|
||||
#if (digitalPinToInterrupt(I_MAX_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(I_MAX_PIN);
|
||||
#else
|
||||
static_assert(digitalPinHasPCICR(I_MAX_PIN), "I_MAX_PIN is not interrupt-capable");
|
||||
static_assert(digitalPinHasPCICR(I_MAX_PIN), "I_MAX_PIN is not interrupt-capable. Disable ENDSTOP_INTERRUPTS_FEATURE to continue.");
|
||||
pciSetup(I_MAX_PIN);
|
||||
#endif
|
||||
#elif HAS_I_MIN
|
||||
#elif USE_I_MIN
|
||||
#if (digitalPinToInterrupt(I_MIN_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(I_MIN_PIN);
|
||||
#else
|
||||
static_assert(digitalPinHasPCICR(I_MIN_PIN), "I_MIN_PIN is not interrupt-capable");
|
||||
static_assert(digitalPinHasPCICR(I_MIN_PIN), "I_MIN_PIN is not interrupt-capable. Disable ENDSTOP_INTERRUPTS_FEATURE to continue.");
|
||||
pciSetup(I_MIN_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_J_MAX
|
||||
#if USE_J_MAX
|
||||
#if (digitalPinToInterrupt(J_MAX_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(J_MAX_PIN);
|
||||
#else
|
||||
static_assert(digitalPinHasPCICR(J_MAX_PIN), "J_MAX_PIN is not interrupt-capable");
|
||||
static_assert(digitalPinHasPCICR(J_MAX_PIN), "J_MAX_PIN is not interrupt-capable. Disable ENDSTOP_INTERRUPTS_FEATURE to continue.");
|
||||
pciSetup(J_MAX_PIN);
|
||||
#endif
|
||||
#elif HAS_J_MIN
|
||||
#elif USE_J_MIN
|
||||
#if (digitalPinToInterrupt(J_MIN_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(J_MIN_PIN);
|
||||
#else
|
||||
static_assert(digitalPinHasPCICR(J_MIN_PIN), "J_MIN_PIN is not interrupt-capable");
|
||||
static_assert(digitalPinHasPCICR(J_MIN_PIN), "J_MIN_PIN is not interrupt-capable. Disable ENDSTOP_INTERRUPTS_FEATURE to continue.");
|
||||
pciSetup(J_MIN_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_K_MAX
|
||||
#if USE_K_MAX
|
||||
#if (digitalPinToInterrupt(K_MAX_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(K_MAX_PIN);
|
||||
#else
|
||||
static_assert(digitalPinHasPCICR(K_MAX_PIN), "K_MAX_PIN is not interrupt-capable");
|
||||
static_assert(digitalPinHasPCICR(K_MAX_PIN), "K_MAX_PIN is not interrupt-capable. Disable ENDSTOP_INTERRUPTS_FEATURE to continue.");
|
||||
pciSetup(K_MAX_PIN);
|
||||
#endif
|
||||
#elif HAS_K_MIN
|
||||
#elif USE_K_MIN
|
||||
#if (digitalPinToInterrupt(K_MIN_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(K_MIN_PIN);
|
||||
#else
|
||||
static_assert(digitalPinHasPCICR(K_MIN_PIN), "K_MIN_PIN is not interrupt-capable");
|
||||
static_assert(digitalPinHasPCICR(K_MIN_PIN), "K_MIN_PIN is not interrupt-capable. Disable ENDSTOP_INTERRUPTS_FEATURE to continue.");
|
||||
pciSetup(K_MIN_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_U_MAX
|
||||
#if USE_U_MAX
|
||||
#if (digitalPinToInterrupt(U_MAX_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(U_MAX_PIN);
|
||||
#else
|
||||
static_assert(digitalPinHasPCICR(U_MAX_PIN), "U_MAX_PIN is not interrupt-capable");
|
||||
static_assert(digitalPinHasPCICR(U_MAX_PIN), "U_MAX_PIN is not interrupt-capable. Disable ENDSTOP_INTERRUPTS_FEATURE to continue.");
|
||||
pciSetup(U_MAX_PIN);
|
||||
#endif
|
||||
#elif HAS_U_MIN
|
||||
#elif USE_U_MIN
|
||||
#if (digitalPinToInterrupt(U_MIN_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(U_MIN_PIN);
|
||||
#else
|
||||
static_assert(digitalPinHasPCICR(U_MIN_PIN), "U_MIN_PIN is not interrupt-capable");
|
||||
static_assert(digitalPinHasPCICR(U_MIN_PIN), "U_MIN_PIN is not interrupt-capable. Disable ENDSTOP_INTERRUPTS_FEATURE to continue.");
|
||||
pciSetup(U_MIN_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_V_MAX
|
||||
#if USE_V_MAX
|
||||
#if (digitalPinToInterrupt(V_MAX_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(V_MAX_PIN);
|
||||
#else
|
||||
static_assert(digitalPinHasPCICR(V_MAX_PIN), "V_MAX_PIN is not interrupt-capable");
|
||||
static_assert(digitalPinHasPCICR(V_MAX_PIN), "V_MAX_PIN is not interrupt-capable. Disable ENDSTOP_INTERRUPTS_FEATURE to continue.");
|
||||
pciSetup(V_MAX_PIN);
|
||||
#endif
|
||||
#elif HAS_V_MIN
|
||||
#elif USE_V_MIN
|
||||
#if (digitalPinToInterrupt(V_MIN_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(V_MIN_PIN);
|
||||
#else
|
||||
static_assert(digitalPinHasPCICR(V_MIN_PIN), "V_MIN_PIN is not interrupt-capable");
|
||||
static_assert(digitalPinHasPCICR(V_MIN_PIN), "V_MIN_PIN is not interrupt-capable. Disable ENDSTOP_INTERRUPTS_FEATURE to continue.");
|
||||
pciSetup(V_MIN_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_W_MAX
|
||||
#if USE_W_MAX
|
||||
#if (digitalPinToInterrupt(W_MAX_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(W_MAX_PIN);
|
||||
#else
|
||||
static_assert(digitalPinHasPCICR(W_MAX_PIN), "W_MAX_PIN is not interrupt-capable");
|
||||
static_assert(digitalPinHasPCICR(W_MAX_PIN), "W_MAX_PIN is not interrupt-capable. Disable ENDSTOP_INTERRUPTS_FEATURE to continue.");
|
||||
pciSetup(W_MAX_PIN);
|
||||
#endif
|
||||
#elif HAS_W_MIN
|
||||
#elif USE_W_MIN
|
||||
#if (digitalPinToInterrupt(W_MIN_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(W_MIN_PIN);
|
||||
#else
|
||||
static_assert(digitalPinHasPCICR(W_MIN_PIN), "W_MIN_PIN is not interrupt-capable");
|
||||
static_assert(digitalPinHasPCICR(W_MIN_PIN), "W_MIN_PIN is not interrupt-capable. Disable ENDSTOP_INTERRUPTS_FEATURE to continue.");
|
||||
pciSetup(W_MIN_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_X2_MAX
|
||||
#if USE_X2_MAX
|
||||
#if (digitalPinToInterrupt(X2_MAX_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(X2_MAX_PIN);
|
||||
#else
|
||||
@@ -266,7 +265,7 @@ void setup_endstop_interrupts() {
|
||||
pciSetup(X2_MAX_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_X2_MIN
|
||||
#if USE_X2_MIN
|
||||
#if (digitalPinToInterrupt(X2_MIN_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(X2_MIN_PIN);
|
||||
#else
|
||||
@@ -274,7 +273,7 @@ void setup_endstop_interrupts() {
|
||||
pciSetup(X2_MIN_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_Y2_MAX
|
||||
#if USE_Y2_MAX
|
||||
#if (digitalPinToInterrupt(Y2_MAX_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(Y2_MAX_PIN);
|
||||
#else
|
||||
@@ -282,7 +281,7 @@ void setup_endstop_interrupts() {
|
||||
pciSetup(Y2_MAX_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_Y2_MIN
|
||||
#if USE_Y2_MIN
|
||||
#if (digitalPinToInterrupt(Y2_MIN_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(Y2_MIN_PIN);
|
||||
#else
|
||||
@@ -290,7 +289,7 @@ void setup_endstop_interrupts() {
|
||||
pciSetup(Y2_MIN_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_Z2_MAX
|
||||
#if USE_Z2_MAX
|
||||
#if (digitalPinToInterrupt(Z2_MAX_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(Z2_MAX_PIN);
|
||||
#else
|
||||
@@ -298,7 +297,7 @@ void setup_endstop_interrupts() {
|
||||
pciSetup(Z2_MAX_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_Z2_MIN
|
||||
#if USE_Z2_MIN
|
||||
#if (digitalPinToInterrupt(Z2_MIN_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(Z2_MIN_PIN);
|
||||
#else
|
||||
@@ -306,7 +305,7 @@ void setup_endstop_interrupts() {
|
||||
pciSetup(Z2_MIN_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_Z3_MAX
|
||||
#if USE_Z3_MAX
|
||||
#if (digitalPinToInterrupt(Z3_MAX_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(Z3_MAX_PIN);
|
||||
#else
|
||||
@@ -314,7 +313,7 @@ void setup_endstop_interrupts() {
|
||||
pciSetup(Z3_MAX_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_Z3_MIN
|
||||
#if USE_Z3_MIN
|
||||
#if (digitalPinToInterrupt(Z3_MIN_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(Z3_MIN_PIN);
|
||||
#else
|
||||
@@ -322,7 +321,7 @@ void setup_endstop_interrupts() {
|
||||
pciSetup(Z3_MIN_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_Z4_MAX
|
||||
#if USE_Z4_MAX
|
||||
#if (digitalPinToInterrupt(Z4_MAX_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(Z4_MAX_PIN);
|
||||
#else
|
||||
@@ -330,7 +329,7 @@ void setup_endstop_interrupts() {
|
||||
pciSetup(Z4_MAX_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#if HAS_Z4_MIN
|
||||
#if USE_Z4_MIN
|
||||
#if (digitalPinToInterrupt(Z4_MIN_PIN) != NOT_AN_INTERRUPT)
|
||||
_ATTACH(Z4_MIN_PIN);
|
||||
#else
|
||||
|
@@ -132,7 +132,7 @@ void MarlinHAL::set_pwm_frequency(const pin_t pin, const uint16_t f_desired) {
|
||||
|
||||
DEBUG_ECHOLNPGM("f=", f);
|
||||
DEBUG_ECHOLNPGM("(prescaler loop)");
|
||||
LOOP_L_N(i, COUNT(prescaler)) { // Loop through all prescaler values
|
||||
for (uint8_t i = 0; i < COUNT(prescaler); ++i) { // Loop through all prescaler values
|
||||
const uint32_t p = prescaler[i]; // Extend to 32 bits for calculations
|
||||
DEBUG_ECHOLNPGM("prescaler[", i, "]=", p);
|
||||
uint16_t res_fast_temp, res_pc_temp;
|
||||
@@ -232,7 +232,7 @@ void MarlinHAL::init_pwm_timers() {
|
||||
#endif
|
||||
};
|
||||
|
||||
LOOP_L_N(i, COUNT(pwm_pin))
|
||||
for (uint8_t i = 0; i < COUNT(pwm_pin); ++i)
|
||||
set_pwm_frequency(pwm_pin[i], 1000);
|
||||
}
|
||||
|
||||
|
@@ -255,84 +255,6 @@ enum ClockSource2 : uint8_t {
|
||||
#define SET_FOCB(T,V) SET_FOC(T,B,V)
|
||||
#define SET_FOCC(T,V) SET_FOC(T,C,V)
|
||||
|
||||
#if 0
|
||||
|
||||
/**
|
||||
* PWM availability macros
|
||||
*/
|
||||
|
||||
// Determine which hardware PWMs are already in use
|
||||
#define _PWM_CHK_FAN_B(P) (P == E0_AUTO_FAN_PIN || P == E1_AUTO_FAN_PIN || P == E2_AUTO_FAN_PIN || P == E3_AUTO_FAN_PIN || P == E4_AUTO_FAN_PIN || P == E5_AUTO_FAN_PIN || P == E6_AUTO_FAN_PIN || P == E7_AUTO_FAN_PIN || P == CHAMBER_AUTO_FAN_PIN || P == COOLER_AUTO_FAN_PIN)
|
||||
#if PIN_EXISTS(CONTROLLER_FAN)
|
||||
#define PWM_CHK_FAN_B(P) (_PWM_CHK_FAN_B(P) || P == CONTROLLER_FAN_PIN)
|
||||
#else
|
||||
#define PWM_CHK_FAN_B(P) _PWM_CHK_FAN_B(P)
|
||||
#endif
|
||||
|
||||
#if ANY_PIN(FAN, FAN1, FAN2, FAN3, FAN4, FAN5, FAN6, FAN7)
|
||||
#if PIN_EXISTS(FAN7)
|
||||
#define PWM_CHK_FAN_A(P) (P == FAN0_PIN || P == FAN1_PIN || P == FAN2_PIN || P == FAN3_PIN || P == FAN4_PIN || P == FAN5_PIN || P == FAN6_PIN || P == FAN7_PIN)
|
||||
#elif PIN_EXISTS(FAN6)
|
||||
#define PWM_CHK_FAN_A(P) (P == FAN0_PIN || P == FAN1_PIN || P == FAN2_PIN || P == FAN3_PIN || P == FAN4_PIN || P == FAN5_PIN || P == FAN6_PIN)
|
||||
#elif PIN_EXISTS(FAN5)
|
||||
#define PWM_CHK_FAN_A(P) (P == FAN0_PIN || P == FAN1_PIN || P == FAN2_PIN || P == FAN3_PIN || P == FAN4_PIN || P == FAN5_PIN)
|
||||
#elif PIN_EXISTS(FAN4)
|
||||
#define PWM_CHK_FAN_A(P) (P == FAN0_PIN || P == FAN1_PIN || P == FAN2_PIN || P == FAN3_PIN || P == FAN4_PIN)
|
||||
#elif PIN_EXISTS(FAN3)
|
||||
#define PWM_CHK_FAN_A(P) (P == FAN0_PIN || P == FAN1_PIN || P == FAN2_PIN || P == FAN3_PIN)
|
||||
#elif PIN_EXISTS(FAN2)
|
||||
#define PWM_CHK_FAN_A(P) (P == FAN0_PIN || P == FAN1_PIN || P == FAN2_PIN)
|
||||
#elif PIN_EXISTS(FAN1)
|
||||
#define PWM_CHK_FAN_A(P) (P == FAN0_PIN || P == FAN1_PIN)
|
||||
#else
|
||||
#define PWM_CHK_FAN_A(P) (P == FAN0_PIN)
|
||||
#endif
|
||||
#else
|
||||
#define PWM_CHK_FAN_A(P) false
|
||||
#endif
|
||||
|
||||
#if HAS_MOTOR_CURRENT_PWM
|
||||
#if PIN_EXISTS(MOTOR_CURRENT_PWM_XY)
|
||||
#define PWM_CHK_MOTOR_CURRENT(P) (P == MOTOR_CURRENT_PWM_E_PIN || P == MOTOR_CURRENT_PWM_E0_PIN || P == MOTOR_CURRENT_PWM_E1_PIN || P == MOTOR_CURRENT_PWM_Z_PIN || P == MOTOR_CURRENT_PWM_XY_PIN)
|
||||
#elif PIN_EXISTS(MOTOR_CURRENT_PWM_Z)
|
||||
#define PWM_CHK_MOTOR_CURRENT(P) (P == MOTOR_CURRENT_PWM_E_PIN || P == MOTOR_CURRENT_PWM_E0_PIN || P == MOTOR_CURRENT_PWM_E1_PIN || P == MOTOR_CURRENT_PWM_Z_PIN)
|
||||
#else
|
||||
#define PWM_CHK_MOTOR_CURRENT(P) (P == MOTOR_CURRENT_PWM_E_PIN || P == MOTOR_CURRENT_PWM_E0_PIN || P == MOTOR_CURRENT_PWM_E1_PIN)
|
||||
#endif
|
||||
#else
|
||||
#define PWM_CHK_MOTOR_CURRENT(P) false
|
||||
#endif
|
||||
|
||||
#ifdef NUM_SERVOS
|
||||
#if AVR_ATmega2560_FAMILY
|
||||
#define PWM_CHK_SERVO(P) (P == 5 || (NUM_SERVOS > 12 && P == 6) || (NUM_SERVOS > 24 && P == 46)) // PWMS 3A, 4A & 5A
|
||||
#elif AVR_ATmega2561_FAMILY
|
||||
#define PWM_CHK_SERVO(P) (P == 5) // PWM3A
|
||||
#elif AVR_ATmega1284_FAMILY
|
||||
#define PWM_CHK_SERVO(P) false
|
||||
#elif AVR_AT90USB1286_FAMILY
|
||||
#define PWM_CHK_SERVO(P) (P == 16) // PWM3A
|
||||
#elif AVR_ATmega328_FAMILY
|
||||
#define PWM_CHK_SERVO(P) false
|
||||
#endif
|
||||
#else
|
||||
#define PWM_CHK_SERVO(P) false
|
||||
#endif
|
||||
|
||||
#if ENABLED(BARICUDA)
|
||||
#if HAS_HEATER_1 && HAS_HEATER_2
|
||||
#define PWM_CHK_HEATER(P) (P == HEATER_1_PIN || P == HEATER_2_PIN)
|
||||
#elif HAS_HEATER_1
|
||||
#define PWM_CHK_HEATER(P) (P == HEATER_1_PIN)
|
||||
#endif
|
||||
#else
|
||||
#define PWM_CHK_HEATER(P) false
|
||||
#endif
|
||||
|
||||
#define PWM_CHK(P) (PWM_CHK_HEATER(P) || PWM_CHK_SERVO(P) || PWM_CHK_MOTOR_CURRENT(P) || PWM_CHK_FAN_A(P) || PWM_CHK_FAN_B(P))
|
||||
|
||||
#endif // PWM_CHK is not used in Marlin
|
||||
|
||||
// define which hardware PWMs are available for the current CPU
|
||||
// all timer 1 PWMS deleted from this list because they are never available
|
||||
#if AVR_ATmega2560_FAMILY
|
||||
|
@@ -27,6 +27,7 @@
|
||||
* Hardware Pin : 02 03 06 07 01 05 15 16 17 18 23 24 25 26 64 63 13 12 46 45 44 43 78 77 76 75 74 73 72 71 60 59 58 57 56 55 54 53 50 70 52 51 42 41 40 39 38 37 36 35 22 21 20 19 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 | 04 08 09 10 11 14 27 28 29 30 31 32 33 34 47 48 49 61 62 65 66 67 68 69 79 80 81 98 99 100
|
||||
* Port : E0 E1 E4 E5 G5 E3 H3 H4 H5 H6 B4 B5 B6 B7 J1 J0 H1 H0 D3 D2 D1 D0 A0 A1 A2 A3 A4 A5 A6 A7 C7 C6 C5 C4 C3 C2 C1 C0 D7 G2 G1 G0 L7 L6 L5 L4 L3 L2 L1 L0 B3 B2 B1 B0 F0 F1 F2 F3 F4 F5 F6 F7 K0 K1 K2 K3 K4 K5 K6 K7 | E2 E6 E7 xx xx H2 H7 G3 G4 xx xx xx xx xx D4 D5 D6 xx xx J2 J3 J4 J5 J6 J7 xx xx xx xx xx
|
||||
* Logical Pin : 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 | 78 79 80 xx xx 84 85 71 70 xx xx xx xx xx 81 82 83 xx xx 72 73 75 76 77 74 xx xx xx xx xx
|
||||
* Analog Input : 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
|
||||
*
|
||||
* Arduino Pin Layout video: https://youtu.be/rIqeVCX09FA
|
||||
* AVR alternate pin function overview video: https://youtu.be/1yd8wuI5Plg
|
||||
@@ -34,39 +35,36 @@
|
||||
|
||||
#include "../fastio.h"
|
||||
|
||||
// change for your board
|
||||
#define DEBUG_LED DIO21
|
||||
|
||||
// UART
|
||||
#define RXD DIO0
|
||||
#define TXD DIO1
|
||||
#define RXD 0
|
||||
#define TXD 1
|
||||
|
||||
// SPI
|
||||
#define SCK DIO52
|
||||
#define MISO DIO50
|
||||
#define MOSI DIO51
|
||||
#define SS DIO53
|
||||
#define MISO 50
|
||||
#define MOSI 51
|
||||
#define SCK 52
|
||||
#define SS 53
|
||||
|
||||
// TWI (I2C)
|
||||
#define SCL DIO21
|
||||
#define SDA DIO20
|
||||
#define SCL 21
|
||||
#define SDA 20
|
||||
|
||||
// Timers and PWM
|
||||
#define OC0A DIO13
|
||||
#define OC0B DIO4
|
||||
#define OC1A DIO11
|
||||
#define OC1B DIO12
|
||||
#define OC2A DIO10
|
||||
#define OC2B DIO9
|
||||
#define OC3A DIO5
|
||||
#define OC3B DIO2
|
||||
#define OC3C DIO3
|
||||
#define OC4A DIO6
|
||||
#define OC4B DIO7
|
||||
#define OC4C DIO8
|
||||
#define OC5A DIO46
|
||||
#define OC5B DIO45
|
||||
#define OC5C DIO44
|
||||
#define OC0A 13
|
||||
#define OC0B 4
|
||||
#define OC1A 11
|
||||
#define OC1B 12
|
||||
#define OC2A 10
|
||||
#define OC2B 9
|
||||
#define OC3A 5
|
||||
#define OC3B 2
|
||||
#define OC3C 3
|
||||
#define OC4A 6
|
||||
#define OC4B 7
|
||||
#define OC4C 8
|
||||
#define OC5A 46
|
||||
#define OC5B 45
|
||||
#define OC5C 44
|
||||
|
||||
// Digital I/O
|
||||
|
||||
|
@@ -33,32 +33,29 @@
|
||||
|
||||
#include "../fastio.h"
|
||||
|
||||
// change for your board
|
||||
#define DEBUG_LED DIO46
|
||||
|
||||
// UART
|
||||
#define RXD DIO0
|
||||
#define TXD DIO1
|
||||
#define RXD 0
|
||||
#define TXD 1
|
||||
|
||||
// SPI
|
||||
#define SCK DIO10
|
||||
#define MISO DIO12
|
||||
#define MOSI DIO11
|
||||
#define SS DIO16
|
||||
#define SCK 10
|
||||
#define MISO 12
|
||||
#define MOSI 11
|
||||
#define SS 16
|
||||
|
||||
// TWI (I2C)
|
||||
#define SCL DIO17
|
||||
#define SDA DIO18
|
||||
#define SCL 17
|
||||
#define SDA 18
|
||||
|
||||
// Timers and PWM
|
||||
#define OC0A DIO9
|
||||
#define OC0B DIO4
|
||||
#define OC1A DIO7
|
||||
#define OC1B DIO8
|
||||
#define OC2A DIO6
|
||||
#define OC3A DIO5
|
||||
#define OC3B DIO2
|
||||
#define OC3C DIO3
|
||||
#define OC0A 9
|
||||
#define OC0B 4
|
||||
#define OC1A 7
|
||||
#define OC1B 8
|
||||
#define OC2A 6
|
||||
#define OC3A 5
|
||||
#define OC3B 2
|
||||
#define OC3C 3
|
||||
|
||||
// Digital I/O
|
||||
|
||||
|
@@ -33,29 +33,27 @@
|
||||
|
||||
#include "../fastio.h"
|
||||
|
||||
#define DEBUG_LED AIO5
|
||||
|
||||
// UART
|
||||
#define RXD DIO0
|
||||
#define TXD DIO1
|
||||
#define RXD 0
|
||||
#define TXD 1
|
||||
|
||||
// SPI
|
||||
#define SCK DIO13
|
||||
#define MISO DIO12
|
||||
#define MOSI DIO11
|
||||
#define SS DIO10
|
||||
#define SS 10
|
||||
#define MOSI 11
|
||||
#define MISO 12
|
||||
#define SCK 13
|
||||
|
||||
// TWI (I2C)
|
||||
#define SCL AIO5
|
||||
#define SDA AIO4
|
||||
|
||||
// Timers and PWM
|
||||
#define OC0A DIO6
|
||||
#define OC0B DIO5
|
||||
#define OC1A DIO9
|
||||
#define OC1B DIO10
|
||||
#define OC2A DIO11
|
||||
#define OC2B DIO3
|
||||
#define OC0A 6
|
||||
#define OC0B 5
|
||||
#define OC1A 9
|
||||
#define OC1B 10
|
||||
#define OC2A 11
|
||||
#define OC2B 3
|
||||
|
||||
// Digital I/O
|
||||
|
||||
|
@@ -59,34 +59,32 @@
|
||||
|
||||
#include "../fastio.h"
|
||||
|
||||
#define DEBUG_LED DIO0
|
||||
|
||||
// UART
|
||||
#define RXD DIO8
|
||||
#define TXD DIO9
|
||||
#define RXD0 DIO8
|
||||
#define TXD0 DIO9
|
||||
#define RXD 8
|
||||
#define TXD 9
|
||||
#define RXD0 8
|
||||
#define TXD0 9
|
||||
|
||||
#define RXD1 DIO10
|
||||
#define TXD1 DIO11
|
||||
#define RXD1 10
|
||||
#define TXD1 11
|
||||
|
||||
// SPI
|
||||
#define SCK DIO7
|
||||
#define MISO DIO6
|
||||
#define MOSI DIO5
|
||||
#define SS DIO4
|
||||
#define SS 4
|
||||
#define MOSI 5
|
||||
#define MISO 6
|
||||
#define SCK 7
|
||||
|
||||
// TWI (I2C)
|
||||
#define SCL DIO16
|
||||
#define SDA DIO17
|
||||
#define SCL 16
|
||||
#define SDA 17
|
||||
|
||||
// Timers and PWM
|
||||
#define OC0A DIO3
|
||||
#define OC0B DIO4
|
||||
#define OC1A DIO13
|
||||
#define OC1B DIO12
|
||||
#define OC2A DIO15
|
||||
#define OC2B DIO14
|
||||
#define OC0A 3
|
||||
#define OC0B 4
|
||||
#define OC1A 13
|
||||
#define OC1B 12
|
||||
#define OC2A 15
|
||||
#define OC2B 14
|
||||
|
||||
// Digital I/O
|
||||
|
||||
|
@@ -34,14 +34,11 @@
|
||||
|
||||
#include "../fastio.h"
|
||||
|
||||
// change for your board
|
||||
#define DEBUG_LED DIO31 /* led D5 red */
|
||||
|
||||
// SPI
|
||||
#define SCK DIO21 // 9
|
||||
#define MISO DIO23 // 11
|
||||
#define MOSI DIO22 // 10
|
||||
#define SS DIO20 // 8
|
||||
#define SS 20 // 8
|
||||
#define SCK 21 // 9
|
||||
#define MOSI 22 // 10
|
||||
#define MISO 23 // 11
|
||||
|
||||
// Digital I/O
|
||||
|
||||
@@ -682,7 +679,6 @@
|
||||
#define PF7_PWM 0
|
||||
#define PF7_DDR DDRF
|
||||
|
||||
|
||||
/**
|
||||
* Some of the pin mapping functions of the Teensduino extension to the Arduino IDE
|
||||
* do not function the same as the other Arduino extensions.
|
||||
|
@@ -20,3 +20,7 @@
|
||||
*
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
#ifndef SERIAL_PORT
|
||||
#define SERIAL_PORT 0
|
||||
#endif
|
||||
|
@@ -33,13 +33,13 @@
|
||||
* Check for common serial pin conflicts
|
||||
*/
|
||||
#define CHECK_SERIAL_PIN(N) ( \
|
||||
X_STOP_PIN == N || Y_STOP_PIN == N || Z_STOP_PIN == N \
|
||||
|| X_MIN_PIN == N || Y_MIN_PIN == N || Z_MIN_PIN == N \
|
||||
|| X_MAX_PIN == N || Y_MAX_PIN == N || Z_MAX_PIN == N \
|
||||
|| X_STEP_PIN == N || Y_STEP_PIN == N || Z_STEP_PIN == N \
|
||||
|| X_DIR_PIN == N || Y_DIR_PIN == N || Z_DIR_PIN == N \
|
||||
|| X_ENA_PIN == N || Y_ENA_PIN == N || Z_ENA_PIN == N \
|
||||
|| BTN_EN1 == N || BTN_EN2 == N \
|
||||
X_STOP_PIN == N || Y_STOP_PIN == N || Z_STOP_PIN == N \
|
||||
|| X_MIN_PIN == N || Y_MIN_PIN == N || Z_MIN_PIN == N \
|
||||
|| X_MAX_PIN == N || Y_MAX_PIN == N || Z_MAX_PIN == N \
|
||||
|| X_STEP_PIN == N || Y_STEP_PIN == N || Z_STEP_PIN == N \
|
||||
|| X_DIR_PIN == N || Y_DIR_PIN == N || Z_DIR_PIN == N \
|
||||
|| X_ENA_PIN == N || Y_ENA_PIN == N || Z_ENA_PIN == N \
|
||||
|| BTN_EN1 == N || BTN_EN2 == N || LCD_PINS_EN == N \
|
||||
)
|
||||
#if SERIAL_IN_USE(0)
|
||||
// D0-D1. No known conflicts.
|
||||
@@ -73,8 +73,8 @@
|
||||
/**
|
||||
* Checks for SOFT PWM
|
||||
*/
|
||||
#if HAS_FAN0 && FAN_PIN == 9 && DISABLED(FAN_SOFT_PWM) && ENABLED(SPEAKER)
|
||||
#error "FAN_PIN 9 Hardware PWM uses Timer 2 which conflicts with Arduino AVR Tone Timer (for SPEAKER)."
|
||||
#if HAS_FAN0 && FAN0_PIN == 9 && DISABLED(FAN_SOFT_PWM) && ENABLED(SPEAKER)
|
||||
#error "FAN0_PIN 9 Hardware PWM uses Timer 2 which conflicts with Arduino AVR Tone Timer (for SPEAKER)."
|
||||
#error "Disable SPEAKER or enable FAN_SOFT_PWM."
|
||||
#endif
|
||||
|
||||
@@ -95,11 +95,11 @@
|
||||
/**
|
||||
* The Trinamic library includes SoftwareSerial.h, leading to a compile error.
|
||||
*/
|
||||
#if BOTH(HAS_TRINAMIC_CONFIG, ENDSTOP_INTERRUPTS_FEATURE)
|
||||
#if ALL(HAS_TRINAMIC_CONFIG, ENDSTOP_INTERRUPTS_FEATURE)
|
||||
#error "TMCStepper includes SoftwareSerial.h which is incompatible with ENDSTOP_INTERRUPTS_FEATURE. Disable ENDSTOP_INTERRUPTS_FEATURE to continue."
|
||||
#endif
|
||||
|
||||
#if BOTH(HAS_TMC_SW_SERIAL, MONITOR_DRIVER_STATUS)
|
||||
#if ALL(HAS_TMC_SW_SERIAL, MONITOR_DRIVER_STATUS)
|
||||
#error "MONITOR_DRIVER_STATUS causes performance issues when used with SoftwareSerial-connected drivers. Disable MONITOR_DRIVER_STATUS or use hardware serial to continue."
|
||||
#endif
|
||||
|
||||
|
@@ -77,12 +77,12 @@
|
||||
|
||||
void PRINT_ARRAY_NAME(uint8_t x) {
|
||||
PGM_P const name_mem_pointer = (PGM_P)pgm_read_ptr(&pin_array[x].name);
|
||||
LOOP_L_N(y, MAX_NAME_LENGTH) {
|
||||
for (uint8_t y = 0; y < MAX_NAME_LENGTH; ++y) {
|
||||
char temp_char = pgm_read_byte(name_mem_pointer + y);
|
||||
if (temp_char != 0)
|
||||
SERIAL_CHAR(temp_char);
|
||||
else {
|
||||
LOOP_L_N(i, MAX_NAME_LENGTH - y) SERIAL_CHAR(' ');
|
||||
for (uint8_t i = 0; i < MAX_NAME_LENGTH - y; ++i) SERIAL_CHAR(' ');
|
||||
break;
|
||||
}
|
||||
}
|
||||
@@ -90,7 +90,6 @@ void PRINT_ARRAY_NAME(uint8_t x) {
|
||||
|
||||
#define GET_ARRAY_IS_DIGITAL(x) pgm_read_byte(&pin_array[x].is_digital)
|
||||
|
||||
|
||||
#if defined(__AVR_ATmega1284P__) // 1284 IDE extensions set this to the number of
|
||||
#undef NUM_DIGITAL_PINS // digital only pins while all other CPUs have it
|
||||
#define NUM_DIGITAL_PINS 32 // set to digital only + digital/analog
|
||||
@@ -110,7 +109,7 @@ void PRINT_ARRAY_NAME(uint8_t x) {
|
||||
* Print a pin's PWM status.
|
||||
* Return true if it's currently a PWM pin.
|
||||
*/
|
||||
static bool pwm_status(uint8_t pin) {
|
||||
bool pwm_status(uint8_t pin) {
|
||||
char buffer[20]; // for the sprintf statements
|
||||
|
||||
switch (digitalPinToTimer_DEBUG(pin)) {
|
||||
@@ -164,7 +163,6 @@ static bool pwm_status(uint8_t pin) {
|
||||
SERIAL_ECHO_SP(2);
|
||||
} // pwm_status
|
||||
|
||||
|
||||
const volatile uint8_t* const PWM_other[][3] PROGMEM = {
|
||||
{ &TCCR0A, &TCCR0B, &TIMSK0 },
|
||||
{ &TCCR1A, &TCCR1B, &TIMSK1 },
|
||||
@@ -182,7 +180,6 @@ const volatile uint8_t* const PWM_other[][3] PROGMEM = {
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
const volatile uint8_t* const PWM_OCR[][3] PROGMEM = {
|
||||
|
||||
#ifdef TIMER0A
|
||||
@@ -218,7 +215,6 @@ const volatile uint8_t* const PWM_OCR[][3] PROGMEM = {
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
#define TCCR_A(T) pgm_read_word(&PWM_other[T][0])
|
||||
#define TCCR_B(T) pgm_read_word(&PWM_other[T][1])
|
||||
#define TIMSK(T) pgm_read_word(&PWM_other[T][2])
|
||||
@@ -233,12 +229,12 @@ const volatile uint8_t* const PWM_OCR[][3] PROGMEM = {
|
||||
|
||||
#define OCR_VAL(T, L) pgm_read_word(&PWM_OCR[T][L])
|
||||
|
||||
static void err_is_counter() { SERIAL_ECHOPGM(" non-standard PWM mode"); }
|
||||
static void err_is_interrupt() { SERIAL_ECHOPGM(" compare interrupt enabled"); }
|
||||
static void err_prob_interrupt() { SERIAL_ECHOPGM(" overflow interrupt enabled"); }
|
||||
static void print_is_also_tied() { SERIAL_ECHOPGM(" is also tied to this pin"); SERIAL_ECHO_SP(14); }
|
||||
void err_is_counter() { SERIAL_ECHOPGM(" non-standard PWM mode"); }
|
||||
void err_is_interrupt() { SERIAL_ECHOPGM(" compare interrupt enabled"); }
|
||||
void err_prob_interrupt() { SERIAL_ECHOPGM(" overflow interrupt enabled"); }
|
||||
void print_is_also_tied() { SERIAL_ECHOPGM(" is also tied to this pin"); SERIAL_ECHO_SP(14); }
|
||||
|
||||
inline void com_print(const uint8_t N, const uint8_t Z) {
|
||||
void com_print(const uint8_t N, const uint8_t Z) {
|
||||
const uint8_t *TCCRA = (uint8_t*)TCCR_A(N);
|
||||
SERIAL_ECHOPGM(" COM", AS_DIGIT(N));
|
||||
SERIAL_CHAR(Z);
|
||||
@@ -280,7 +276,7 @@ void timer_prefix(uint8_t T, char L, uint8_t N) { // T - timer L - pwm N -
|
||||
if (TEST(*TMSK, TOIE)) err_prob_interrupt();
|
||||
}
|
||||
|
||||
static void pwm_details(uint8_t pin) {
|
||||
void pwm_details(uint8_t pin) {
|
||||
switch (digitalPinToTimer_DEBUG(pin)) {
|
||||
|
||||
#if ABTEST(0)
|
||||
@@ -354,47 +350,41 @@ static void pwm_details(uint8_t pin) {
|
||||
} // pwm_details
|
||||
|
||||
#ifndef digitalRead_mod // Use Teensyduino's version of digitalRead - it doesn't disable the PWMs
|
||||
int digitalRead_mod(const int8_t pin) { // same as digitalRead except the PWM stop section has been removed
|
||||
int digitalRead_mod(const pin_t pin) { // same as digitalRead except the PWM stop section has been removed
|
||||
const uint8_t port = digitalPinToPort_DEBUG(pin);
|
||||
return (port != NOT_A_PIN) && (*portInputRegister(port) & digitalPinToBitMask_DEBUG(pin)) ? HIGH : LOW;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef PRINT_PORT
|
||||
void print_port(const pin_t pin) { // print port number
|
||||
#ifdef digitalPinToPort_DEBUG
|
||||
uint8_t x;
|
||||
SERIAL_ECHOPGM(" Port: ");
|
||||
#if AVR_AT90USB1286_FAMILY
|
||||
x = (pin == 46 || pin == 47) ? 'E' : digitalPinToPort_DEBUG(pin) + 64;
|
||||
#else
|
||||
x = digitalPinToPort_DEBUG(pin) + 64;
|
||||
#endif
|
||||
SERIAL_CHAR(x);
|
||||
|
||||
void print_port(int8_t pin) { // print port number
|
||||
#ifdef digitalPinToPort_DEBUG
|
||||
uint8_t x;
|
||||
SERIAL_ECHOPGM(" Port: ");
|
||||
#if AVR_AT90USB1286_FAMILY
|
||||
x = (pin == 46 || pin == 47) ? 'E' : digitalPinToPort_DEBUG(pin) + 64;
|
||||
#else
|
||||
x = digitalPinToPort_DEBUG(pin) + 64;
|
||||
#endif
|
||||
SERIAL_CHAR(x);
|
||||
|
||||
#if AVR_AT90USB1286_FAMILY
|
||||
if (pin == 46)
|
||||
x = '2';
|
||||
else if (pin == 47)
|
||||
x = '3';
|
||||
else {
|
||||
uint8_t temp = digitalPinToBitMask_DEBUG(pin);
|
||||
for (x = '0'; x < '9' && temp != 1; x++) temp >>= 1;
|
||||
}
|
||||
#else
|
||||
#if AVR_AT90USB1286_FAMILY
|
||||
if (pin == 46)
|
||||
x = '2';
|
||||
else if (pin == 47)
|
||||
x = '3';
|
||||
else {
|
||||
uint8_t temp = digitalPinToBitMask_DEBUG(pin);
|
||||
for (x = '0'; x < '9' && temp != 1; x++) temp >>= 1;
|
||||
#endif
|
||||
SERIAL_CHAR(x);
|
||||
}
|
||||
#else
|
||||
SERIAL_ECHO_SP(10);
|
||||
uint8_t temp = digitalPinToBitMask_DEBUG(pin);
|
||||
for (x = '0'; x < '9' && temp != 1; x++) temp >>= 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
#define PRINT_PORT(p) print_port(p)
|
||||
|
||||
#endif
|
||||
SERIAL_CHAR(x);
|
||||
#else
|
||||
SERIAL_ECHO_SP(10);
|
||||
#endif
|
||||
}
|
||||
|
||||
#define PRINT_PIN(p) do{ sprintf_P(buffer, PSTR("%3d "), p); SERIAL_ECHO(buffer); }while(0)
|
||||
#define PRINT_PIN_ANALOG(p) do{ sprintf_P(buffer, PSTR(" (A%2d) "), DIGITAL_PIN_TO_ANALOG_PIN(pin)); SERIAL_ECHO(buffer); }while(0)
|
||||
|
@@ -22,11 +22,10 @@
|
||||
#pragma once
|
||||
|
||||
//
|
||||
// some of the pin mapping functions of the Teensduino extension to the Arduino IDE
|
||||
// do not function the same as the other Arduino extensions
|
||||
// Some of the pin mapping functions of the Arduino IDE Teensduino extension
|
||||
// function differently from other Arduino extensions.
|
||||
//
|
||||
|
||||
|
||||
#define TEENSYDUINO_IDE
|
||||
|
||||
//digitalPinToTimer(pin) function works like Arduino but Timers are not defined
|
||||
@@ -48,8 +47,6 @@
|
||||
#define PE 5
|
||||
#define PF 6
|
||||
|
||||
#undef digitalPinToPort
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_port_PGM[] = {
|
||||
PD, // 0 - PD0 - INT0 - PWM
|
||||
PD, // 1 - PD1 - INT1 - PWM
|
||||
@@ -101,7 +98,7 @@ const uint8_t PROGMEM digital_pin_to_port_PGM[] = {
|
||||
PE, // 47 - PE3 (not defined in teensyduino)
|
||||
};
|
||||
|
||||
#define digitalPinToPort(P) ( pgm_read_byte( digital_pin_to_port_PGM + (P) ) )
|
||||
#define digitalPinToPort(P) pgm_read_byte(digital_pin_to_port_PGM[P])
|
||||
|
||||
// digitalPinToBitMask(pin) is OK
|
||||
|
||||
|
@@ -231,7 +231,6 @@ const uint8_t PROGMEM digital_pin_to_bit_mask_PGM_plus_70[] = {
|
||||
|
||||
#define digitalPinToBitMask_plus_70(P) ( pgm_read_byte( digital_pin_to_bit_mask_PGM_plus_70 + (P) ) )
|
||||
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_timer_PGM_plus_70[] = {
|
||||
// TIMERS
|
||||
// ------------------------
|
||||
|
@@ -1,7 +1,9 @@
|
||||
/**
|
||||
* Marlin 3D Printer Firmware
|
||||
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
|
||||
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
|
||||
*
|
||||
* Based on Sprinter and grbl.
|
||||
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
@@ -88,7 +88,7 @@ void u8g_spiSend_sw_AVR_mode_0(uint8_t val) {
|
||||
volatile uint8_t *outData = u8g_outData,
|
||||
*outClock = u8g_outClock;
|
||||
U8G_ATOMIC_START();
|
||||
LOOP_L_N(i, 8) {
|
||||
for (uint8_t i = 0; i < 8; ++i) {
|
||||
if (val & 0x80)
|
||||
*outData |= bitData;
|
||||
else
|
||||
@@ -108,7 +108,7 @@ void u8g_spiSend_sw_AVR_mode_3(uint8_t val) {
|
||||
volatile uint8_t *outData = u8g_outData,
|
||||
*outClock = u8g_outClock;
|
||||
U8G_ATOMIC_START();
|
||||
LOOP_L_N(i, 8) {
|
||||
for (uint8_t i = 0; i < 8; ++i) {
|
||||
*outClock &= bitNotClock;
|
||||
if (val & 0x80)
|
||||
*outData |= bitData;
|
||||
@@ -120,7 +120,6 @@ void u8g_spiSend_sw_AVR_mode_3(uint8_t val) {
|
||||
U8G_ATOMIC_END();
|
||||
}
|
||||
|
||||
|
||||
#if ENABLED(FYSETC_MINI_12864)
|
||||
#define SPISEND_SW_AVR u8g_spiSend_sw_AVR_mode_3
|
||||
#else
|
||||
|
@@ -1,7 +1,9 @@
|
||||
/**
|
||||
* Marlin 3D Printer Firmware
|
||||
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
|
||||
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
|
||||
*
|
||||
* Based on Sprinter and grbl.
|
||||
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -45,7 +47,7 @@ uint16_t MarlinHAL::adc_result;
|
||||
#endif
|
||||
|
||||
void MarlinHAL::init() {
|
||||
#if ENABLED(SDSUPPORT)
|
||||
#if HAS_MEDIA
|
||||
OUT_WRITE(SDSS, HIGH); // Try to set SDSS inactive before any other SPI users start up
|
||||
#endif
|
||||
usb_task_init(); // Initialize the USB stack
|
||||
|
@@ -1,9 +1,9 @@
|
||||
/**
|
||||
* Marlin 3D Printer Firmware
|
||||
*
|
||||
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
|
||||
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
|
||||
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com
|
||||
*
|
||||
* Based on Sprinter and grbl.
|
||||
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -123,7 +123,7 @@ typedef Servo hal_servo_t;
|
||||
//
|
||||
// ADC
|
||||
//
|
||||
#define HAL_ADC_VREF 3.3
|
||||
#define HAL_ADC_VREF_MV 3300
|
||||
#define HAL_ADC_RESOLUTION 10
|
||||
|
||||
#ifndef analogInputToDigitalPin
|
||||
|
@@ -42,7 +42,7 @@
|
||||
// Public functions
|
||||
// ------------------------
|
||||
|
||||
#if EITHER(DUE_SOFTWARE_SPI, FORCE_SOFT_SPI)
|
||||
#if ANY(DUE_SOFTWARE_SPI, FORCE_SOFT_SPI)
|
||||
|
||||
// ------------------------
|
||||
// Software SPI
|
||||
|
@@ -474,7 +474,6 @@ void MarlinSerial<Cfg>::flushTX() {
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
// If not using the USB port as serial port
|
||||
#if defined(SERIAL_PORT) && SERIAL_PORT >= 0
|
||||
template class MarlinSerial< MarlinSerialCfg<SERIAL_PORT> >;
|
||||
|
@@ -30,6 +30,7 @@
|
||||
#include <WString.h>
|
||||
|
||||
#include "../../inc/MarlinConfigPre.h"
|
||||
#include "../../core/types.h"
|
||||
#include "../../core/serial_hook.h"
|
||||
|
||||
// Define constants and variables for buffering incoming serial data. We're
|
||||
@@ -52,10 +53,6 @@
|
||||
// #error "TX_BUFFER_SIZE must be 0, a power of 2 greater than 1, and no greater than 256."
|
||||
//#endif
|
||||
|
||||
// Templated type selector
|
||||
template<bool b, typename T, typename F> struct TypeSelector { typedef T type;} ;
|
||||
template<typename T, typename F> struct TypeSelector<false, T, F> { typedef F type; };
|
||||
|
||||
// Templated structure wrapper
|
||||
template<typename S, unsigned int addr> struct StructWrapper {
|
||||
constexpr StructWrapper(int) {}
|
||||
@@ -76,7 +73,7 @@ protected:
|
||||
static constexpr int HWUART_IRQ_ID = IRQ_IDS[Cfg::PORT];
|
||||
|
||||
// Base size of type on buffer size
|
||||
typedef typename TypeSelector<(Cfg::RX_SIZE>256), uint16_t, uint8_t>::type ring_buffer_pos_t;
|
||||
typedef uvalue_t(Cfg::RX_SIZE - 1) ring_buffer_pos_t;
|
||||
|
||||
struct ring_buffer_r {
|
||||
volatile ring_buffer_pos_t head, tail;
|
||||
|
@@ -73,18 +73,18 @@ void install_min_serial() {
|
||||
}
|
||||
|
||||
#if DISABLED(DYNAMIC_VECTORTABLE)
|
||||
extern "C" {
|
||||
__attribute__((naked)) void JumpHandler_ASM() {
|
||||
__asm__ __volatile__ (
|
||||
"b CommonHandler_ASM\n"
|
||||
);
|
||||
extern "C" {
|
||||
__attribute__((naked)) void JumpHandler_ASM() {
|
||||
__asm__ __volatile__ (
|
||||
"b CommonHandler_ASM\n"
|
||||
);
|
||||
}
|
||||
void __attribute__((naked, alias("JumpHandler_ASM"))) HardFault_Handler();
|
||||
void __attribute__((naked, alias("JumpHandler_ASM"))) BusFault_Handler();
|
||||
void __attribute__((naked, alias("JumpHandler_ASM"))) UsageFault_Handler();
|
||||
void __attribute__((naked, alias("JumpHandler_ASM"))) MemManage_Handler();
|
||||
void __attribute__((naked, alias("JumpHandler_ASM"))) NMI_Handler();
|
||||
}
|
||||
void __attribute__((naked, alias("JumpHandler_ASM"))) HardFault_Handler();
|
||||
void __attribute__((naked, alias("JumpHandler_ASM"))) BusFault_Handler();
|
||||
void __attribute__((naked, alias("JumpHandler_ASM"))) UsageFault_Handler();
|
||||
void __attribute__((naked, alias("JumpHandler_ASM"))) MemManage_Handler();
|
||||
void __attribute__((naked, alias("JumpHandler_ASM"))) NMI_Handler();
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // POSTMORTEM_DEBUGGING
|
||||
|
@@ -81,7 +81,7 @@ Pio *SCK_pPio, *MOSI_pPio;
|
||||
uint32_t SCK_dwMask, MOSI_dwMask;
|
||||
|
||||
void u8g_spiSend_sw_DUE_mode_0(uint8_t val) { // 3MHz
|
||||
LOOP_L_N(i, 8) {
|
||||
for (uint8_t i = 0; i < 8; ++i) {
|
||||
if (val & 0x80)
|
||||
MOSI_pPio->PIO_SODR = MOSI_dwMask;
|
||||
else
|
||||
@@ -95,7 +95,7 @@ void u8g_spiSend_sw_DUE_mode_0(uint8_t val) { // 3MHz
|
||||
}
|
||||
|
||||
void u8g_spiSend_sw_DUE_mode_3(uint8_t val) { // 3.5MHz
|
||||
LOOP_L_N(i, 8) {
|
||||
for (uint8_t i = 0; i < 8; ++i) {
|
||||
SCK_pPio->PIO_CODR = SCK_dwMask;
|
||||
DELAY_NS(50);
|
||||
if (val & 0x80)
|
||||
|
@@ -1,10 +1,9 @@
|
||||
/**
|
||||
* Marlin 3D Printer Firmware
|
||||
*
|
||||
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
|
||||
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
|
||||
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com
|
||||
* Copyright (c) 2016 Victor Perez victor_pv@hotmail.com
|
||||
*
|
||||
* Based on Sprinter and grbl.
|
||||
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -292,7 +291,7 @@ static bool ee_PageWrite(uint16_t page, const void *data) {
|
||||
uint32_t *p1 = (uint32_t*)addrflash;
|
||||
uint32_t *p2 = (uint32_t*)data;
|
||||
int count = 0;
|
||||
for (i =0; i<PageSize >> 2; i++) {
|
||||
for (i = 0; i < PageSize >> 2; i++) {
|
||||
if (p1[i] != p2[i]) {
|
||||
uint32_t delta = p1[i] ^ p2[i];
|
||||
while (delta) {
|
||||
|
@@ -1,10 +1,9 @@
|
||||
/**
|
||||
* Marlin 3D Printer Firmware
|
||||
*
|
||||
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
|
||||
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
|
||||
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com
|
||||
* Copyright (c) 2016 Victor Perez victor_pv@hotmail.com
|
||||
*
|
||||
* Based on Sprinter and grbl.
|
||||
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
@@ -47,33 +47,33 @@ void endstop_ISR() { endstops.update(); }
|
||||
|
||||
void setup_endstop_interrupts() {
|
||||
#define _ATTACH(P) attachInterrupt(digitalPinToInterrupt(P), endstop_ISR, CHANGE)
|
||||
TERN_(HAS_X_MAX, _ATTACH(X_MAX_PIN));
|
||||
TERN_(HAS_X_MIN, _ATTACH(X_MIN_PIN));
|
||||
TERN_(HAS_Y_MAX, _ATTACH(Y_MAX_PIN));
|
||||
TERN_(HAS_Y_MIN, _ATTACH(Y_MIN_PIN));
|
||||
TERN_(HAS_Z_MAX, _ATTACH(Z_MAX_PIN));
|
||||
TERN_(HAS_Z_MIN, _ATTACH(Z_MIN_PIN));
|
||||
TERN_(HAS_X2_MAX, _ATTACH(X2_MAX_PIN));
|
||||
TERN_(HAS_X2_MIN, _ATTACH(X2_MIN_PIN));
|
||||
TERN_(HAS_Y2_MAX, _ATTACH(Y2_MAX_PIN));
|
||||
TERN_(HAS_Y2_MIN, _ATTACH(Y2_MIN_PIN));
|
||||
TERN_(HAS_Z2_MAX, _ATTACH(Z2_MAX_PIN));
|
||||
TERN_(HAS_Z2_MIN, _ATTACH(Z2_MIN_PIN));
|
||||
TERN_(HAS_Z3_MAX, _ATTACH(Z3_MAX_PIN));
|
||||
TERN_(HAS_Z3_MIN, _ATTACH(Z3_MIN_PIN));
|
||||
TERN_(HAS_Z4_MAX, _ATTACH(Z4_MAX_PIN));
|
||||
TERN_(HAS_Z4_MIN, _ATTACH(Z4_MIN_PIN));
|
||||
TERN_(USE_X_MAX, _ATTACH(X_MAX_PIN));
|
||||
TERN_(USE_X_MIN, _ATTACH(X_MIN_PIN));
|
||||
TERN_(USE_Y_MAX, _ATTACH(Y_MAX_PIN));
|
||||
TERN_(USE_Y_MIN, _ATTACH(Y_MIN_PIN));
|
||||
TERN_(USE_Z_MAX, _ATTACH(Z_MAX_PIN));
|
||||
TERN_(USE_Z_MIN, _ATTACH(Z_MIN_PIN));
|
||||
TERN_(USE_X2_MAX, _ATTACH(X2_MAX_PIN));
|
||||
TERN_(USE_X2_MIN, _ATTACH(X2_MIN_PIN));
|
||||
TERN_(USE_Y2_MAX, _ATTACH(Y2_MAX_PIN));
|
||||
TERN_(USE_Y2_MIN, _ATTACH(Y2_MIN_PIN));
|
||||
TERN_(USE_Z2_MAX, _ATTACH(Z2_MAX_PIN));
|
||||
TERN_(USE_Z2_MIN, _ATTACH(Z2_MIN_PIN));
|
||||
TERN_(USE_Z3_MAX, _ATTACH(Z3_MAX_PIN));
|
||||
TERN_(USE_Z3_MIN, _ATTACH(Z3_MIN_PIN));
|
||||
TERN_(USE_Z4_MAX, _ATTACH(Z4_MAX_PIN));
|
||||
TERN_(USE_Z4_MIN, _ATTACH(Z4_MIN_PIN));
|
||||
TERN_(HAS_Z_MIN_PROBE_PIN, _ATTACH(Z_MIN_PROBE_PIN));
|
||||
TERN_(HAS_I_MAX, _ATTACH(I_MAX_PIN));
|
||||
TERN_(HAS_I_MIN, _ATTACH(I_MIN_PIN));
|
||||
TERN_(HAS_J_MAX, _ATTACH(J_MAX_PIN));
|
||||
TERN_(HAS_J_MIN, _ATTACH(J_MIN_PIN));
|
||||
TERN_(HAS_K_MAX, _ATTACH(K_MAX_PIN));
|
||||
TERN_(HAS_K_MIN, _ATTACH(K_MIN_PIN));
|
||||
TERN_(HAS_U_MAX, _ATTACH(U_MAX_PIN));
|
||||
TERN_(HAS_U_MIN, _ATTACH(U_MIN_PIN));
|
||||
TERN_(HAS_V_MAX, _ATTACH(V_MAX_PIN));
|
||||
TERN_(HAS_V_MIN, _ATTACH(V_MIN_PIN));
|
||||
TERN_(HAS_W_MAX, _ATTACH(W_MAX_PIN));
|
||||
TERN_(HAS_W_MIN, _ATTACH(W_MIN_PIN));
|
||||
TERN_(USE_I_MAX, _ATTACH(I_MAX_PIN));
|
||||
TERN_(USE_I_MIN, _ATTACH(I_MIN_PIN));
|
||||
TERN_(USE_J_MAX, _ATTACH(J_MAX_PIN));
|
||||
TERN_(USE_J_MIN, _ATTACH(J_MIN_PIN));
|
||||
TERN_(USE_K_MAX, _ATTACH(K_MAX_PIN));
|
||||
TERN_(USE_K_MIN, _ATTACH(K_MIN_PIN));
|
||||
TERN_(USE_U_MAX, _ATTACH(U_MAX_PIN));
|
||||
TERN_(USE_U_MIN, _ATTACH(U_MIN_PIN));
|
||||
TERN_(USE_V_MAX, _ATTACH(V_MAX_PIN));
|
||||
TERN_(USE_V_MIN, _ATTACH(V_MIN_PIN));
|
||||
TERN_(USE_W_MAX, _ATTACH(W_MAX_PIN));
|
||||
TERN_(USE_W_MIN, _ATTACH(W_MIN_PIN));
|
||||
}
|
||||
|
@@ -189,12 +189,12 @@
|
||||
*/
|
||||
|
||||
// UART
|
||||
#define RXD DIO0
|
||||
#define TXD DIO1
|
||||
#define RXD 0
|
||||
#define TXD 1
|
||||
|
||||
// TWI (I2C)
|
||||
#define SCL DIO21
|
||||
#define SDA DIO20
|
||||
#define SCL 21
|
||||
#define SDA 20
|
||||
|
||||
/**
|
||||
* pins
|
||||
|
@@ -49,7 +49,6 @@ extern volatile uint32_t *SODR_A, *SODR_B, *CODR_A, *CODR_B;
|
||||
|
||||
#define PWM_MAP_INIT_ROW(IO,ZZ) { ZZ == 'A' ? SODR_A : SODR_B, ZZ == 'A' ? CODR_A : CODR_B, 1 << _PIN(IO) }
|
||||
|
||||
|
||||
#define PWM_MAP_INIT { PWM_MAP_INIT_ROW(MOTOR_CURRENT_PWM_X_PIN, 'B'), \
|
||||
PWM_MAP_INIT_ROW(MOTOR_CURRENT_PWM_Y_PIN, 'B'), \
|
||||
PWM_MAP_INIT_ROW(MOTOR_CURRENT_PWM_Z_PIN, 'B'), \
|
||||
@@ -63,7 +62,7 @@ extern PWM_map ISR_table[NUM_PWMS];
|
||||
extern uint32_t motor_current_setting[3];
|
||||
|
||||
#define IR_BIT(p) (WITHIN(p, 0, 3) ? (p) : (p) + 4)
|
||||
#define COPY_ACTIVE_TABLE() do{ LOOP_L_N(i, 6) work_table[i] = active_table[i]; }while(0)
|
||||
#define COPY_ACTIVE_TABLE() do{ for (uint8_t i = 0; i < 6; ++i) work_table[i] = active_table[i]; }while(0)
|
||||
|
||||
#define PWM_MR0 19999 // base repetition rate minus one count - 20mS
|
||||
#define PWM_PR 24 // prescaler value - prescaler divide by 24 + 1 - 1 MHz output
|
||||
|
@@ -168,7 +168,6 @@ const G2_PinDescription G2_g_APinDescription[] = {
|
||||
{ PIOB, PIO_PB21, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 52
|
||||
{ PIOB, PIO_PB14, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 53
|
||||
|
||||
|
||||
// 54 .. 65 - Analog pins
|
||||
// ----------------------
|
||||
{ PIOA, PIO_PA16X1_AD7, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC0, ADC7, NOT_ON_PWM, NOT_ON_TIMER }, // AD0
|
||||
|
@@ -23,6 +23,6 @@
|
||||
|
||||
#if USE_FALLBACK_EEPROM
|
||||
#define FLASH_EEPROM_EMULATION
|
||||
#elif EITHER(I2C_EEPROM, SPI_EEPROM)
|
||||
#elif ANY(I2C_EEPROM, SPI_EEPROM)
|
||||
#define USE_SHARED_EEPROM 1
|
||||
#endif
|
||||
|
@@ -68,9 +68,9 @@
|
||||
* Usually the hardware SPI pins are only available to the LCD. This makes the DUE hard SPI used at the same time
|
||||
* as the TMC2130 soft SPI the most common setup.
|
||||
*/
|
||||
#define _IS_HW_SPI(P) (defined(TMC_SW_##P) && (TMC_SW_##P == SD_MOSI_PIN || TMC_SW_##P == SD_MISO_PIN || TMC_SW_##P == SD_SCK_PIN))
|
||||
#define _IS_HW_SPI(P) (defined(TMC_SPI_##P) && (TMC_SPI_##P == SD_MOSI_PIN || TMC_SPI_##P == SD_MISO_PIN || TMC_SPI_##P == SD_SCK_PIN))
|
||||
|
||||
#if ENABLED(SDSUPPORT) && HAS_DRIVER(TMC2130)
|
||||
#if HAS_MEDIA && HAS_DRIVER(TMC2130)
|
||||
#if ENABLED(TMC_USE_SW_SPI)
|
||||
#if DISABLED(DUE_SOFTWARE_SPI) && (_IS_HW_SPI(MOSI) || _IS_HW_SPI(MISO) || _IS_HW_SPI(SCK))
|
||||
#error "DUE hardware SPI is required but is incompatible with TMC2130 software SPI. Either disable TMC_USE_SW_SPI or use separate pins for the two SPIs."
|
||||
|
@@ -64,7 +64,6 @@
|
||||
#define NUMBER_PINS_TOTAL PINS_COUNT
|
||||
|
||||
#define digitalRead_mod(p) extDigitalRead(p) // AVR digitalRead disabled PWM before it read the pin
|
||||
#define PRINT_PORT(p)
|
||||
#define PRINT_ARRAY_NAME(x) do{ sprintf_P(buffer, PSTR("%-" STRINGIFY(MAX_NAME_LENGTH) "s"), pin_array[x].name); SERIAL_ECHO(buffer); }while(0)
|
||||
#define PRINT_PIN(p) do{ sprintf_P(buffer, PSTR("%02d"), p); SERIAL_ECHO(buffer); }while(0)
|
||||
#define PRINT_PIN_ANALOG(p) do{ sprintf_P(buffer, PSTR(" (A%2d) "), DIGITAL_PIN_TO_ANALOG_PIN(pin)); SERIAL_ECHO(buffer); }while(0)
|
||||
@@ -93,6 +92,8 @@ void pwm_details(int32_t pin) {
|
||||
}
|
||||
}
|
||||
|
||||
void print_port(const pin_t) {}
|
||||
|
||||
/**
|
||||
* DUE Board pin | PORT | Label
|
||||
* ----------------+--------+-------
|
||||
|
@@ -1,9 +1,9 @@
|
||||
/**
|
||||
* Marlin 3D Printer Firmware
|
||||
*
|
||||
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
|
||||
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
|
||||
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com
|
||||
*
|
||||
* Based on Sprinter and grbl.
|
||||
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
@@ -1,8 +1,9 @@
|
||||
/**
|
||||
* Marlin 3D Printer Firmware
|
||||
*
|
||||
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
|
||||
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
|
||||
*
|
||||
* Based on Sprinter and grbl.
|
||||
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
@@ -142,7 +142,6 @@
|
||||
*/
|
||||
#define COMPILER_PACK_RESET() COMPILER_PRAGMA(pack())
|
||||
|
||||
|
||||
/**
|
||||
* \brief Set aligned boundary.
|
||||
*/
|
||||
@@ -283,7 +282,6 @@ typedef double F64; //!< 64-bit floating-point number.
|
||||
typedef uint32_t iram_size_t;
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \name Status Types
|
||||
*/
|
||||
//! @{
|
||||
@@ -291,7 +289,6 @@ typedef bool Status_bool_t; //!< Boolean status.
|
||||
typedef U8 Status_t; //!< 8-bit-coded status.
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \name Aliasing Aggregate Types
|
||||
*/
|
||||
//! @{
|
||||
@@ -462,7 +459,6 @@ typedef struct
|
||||
#endif
|
||||
//! @}
|
||||
|
||||
|
||||
#ifndef __ASSEMBLY__ // not for assembling.
|
||||
|
||||
//! \name Optimization Control
|
||||
@@ -581,7 +577,6 @@ typedef struct
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \name Zero-Bit Counting
|
||||
*
|
||||
* Under GCC, __builtin_clz and __builtin_ctz behave like macros when
|
||||
@@ -692,7 +687,6 @@ typedef struct
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \name Bit Reversing
|
||||
*/
|
||||
//! @{
|
||||
@@ -732,7 +726,6 @@ typedef struct
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \name Alignment
|
||||
*/
|
||||
//! @{
|
||||
@@ -798,7 +791,6 @@ typedef struct
|
||||
*/
|
||||
#define Long_call(addr) ((*(void (*)(void))(addr))())
|
||||
|
||||
|
||||
/*! \name MCU Endianism Handling
|
||||
* ARM is MCU little endianism.
|
||||
*/
|
||||
@@ -868,7 +860,6 @@ typedef struct
|
||||
#define CPU_TO_BE32(x) swap32(x)
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \name Endianism Conversion
|
||||
*
|
||||
* The same considerations as for clz and ctz apply here but GCC's
|
||||
@@ -955,7 +946,6 @@ typedef struct
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \name Target Abstraction
|
||||
*/
|
||||
//! @{
|
||||
@@ -997,7 +987,6 @@ typedef U8 Byte; //!< 8-bit unsigned integer.
|
||||
|
||||
#endif // #ifndef __ASSEMBLY__
|
||||
|
||||
|
||||
#ifdef __ICCARM__
|
||||
#define SHORTENUM __packed
|
||||
#elif defined(__GNUC__)
|
||||
|
@@ -81,7 +81,6 @@
|
||||
#define LUN_0_NAME "\"SD/MMC Card\""
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \name Actions Associated with Memory Accesses
|
||||
*
|
||||
* Write here the action to associate with each memory access.
|
||||
@@ -112,5 +111,4 @@
|
||||
#define GLOBAL_WR_PROTECT false //!< Management of a global write protection.
|
||||
//! @}
|
||||
|
||||
|
||||
#endif // _CONF_ACCESS_H_
|
||||
|
@@ -96,5 +96,4 @@
|
||||
// - UPLL frequency: 480MHz
|
||||
// - USB clock: 480 / 1 = 480MHz
|
||||
|
||||
|
||||
#endif /* CONF_CLOCK_H_INCLUDED */
|
||||
|
@@ -88,7 +88,6 @@
|
||||
#endif
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* USB Device Callbacks definitions (Optional)
|
||||
* @{
|
||||
@@ -101,7 +100,7 @@
|
||||
#define USB_DEVICE_SPECIFIC_REQUEST() usb_task_other_requests()
|
||||
//@}
|
||||
|
||||
#if ENABLED(SDSUPPORT)
|
||||
#if HAS_MEDIA
|
||||
/**
|
||||
* USB Device low level configuration
|
||||
* When only one interface is used, these configurations are defined by the class module.
|
||||
@@ -150,7 +149,6 @@
|
||||
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* USB Interface Configuration
|
||||
* @{
|
||||
@@ -185,7 +183,7 @@
|
||||
//! Enable id string of interface to add an extra USB string
|
||||
#define UDI_CDC_IAD_STRING_ID 4
|
||||
|
||||
#if ENABLED(SDSUPPORT)
|
||||
#if HAS_MEDIA
|
||||
/**
|
||||
* USB CDC low level configuration
|
||||
* In standalone these configurations are defined by the CDC module.
|
||||
@@ -210,7 +208,6 @@
|
||||
//@}
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* Configuration of MSC interface
|
||||
* @{
|
||||
@@ -245,7 +242,6 @@
|
||||
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* Description of Composite Device
|
||||
* @{
|
||||
|
@@ -68,7 +68,6 @@
|
||||
#endif
|
||||
#include "ctrl_access.h"
|
||||
|
||||
|
||||
//_____ D E F I N I T I O N S ______________________________________________
|
||||
|
||||
#ifdef FREERTOS_USED
|
||||
@@ -112,7 +111,6 @@ static xSemaphoreHandle ctrl_access_semphr = NULL;
|
||||
|
||||
#endif // FREERTOS_USED
|
||||
|
||||
|
||||
#if MAX_LUN
|
||||
|
||||
/*! \brief Initializes an entry of the LUN descriptor table.
|
||||
@@ -242,17 +240,14 @@ static const struct
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#if GLOBAL_WR_PROTECT == true
|
||||
bool g_wr_protect;
|
||||
#endif
|
||||
|
||||
|
||||
/*! \name Control Interface
|
||||
*/
|
||||
//! @{
|
||||
|
||||
|
||||
#ifdef FREERTOS_USED
|
||||
|
||||
bool ctrl_access_init(void)
|
||||
@@ -270,7 +265,6 @@ bool ctrl_access_init(void)
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
/*! \brief Locks accesses to LUNs.
|
||||
*
|
||||
* \return \c true if the access was successfully locked, else \c false.
|
||||
@@ -288,7 +282,6 @@ static bool ctrl_access_lock(void)
|
||||
|
||||
#endif // FREERTOS_USED
|
||||
|
||||
|
||||
U8 get_nb_lun(void)
|
||||
{
|
||||
#if MEM_USB == ENABLE
|
||||
@@ -309,13 +302,11 @@ U8 get_nb_lun(void)
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
U8 get_cur_lun(void)
|
||||
{
|
||||
return LUN_ID_0;
|
||||
}
|
||||
|
||||
|
||||
Ctrl_status mem_test_unit_ready(U8 lun)
|
||||
{
|
||||
Ctrl_status status;
|
||||
@@ -337,7 +328,6 @@ Ctrl_status mem_test_unit_ready(U8 lun)
|
||||
return status;
|
||||
}
|
||||
|
||||
|
||||
Ctrl_status mem_read_capacity(U8 lun, U32 *u32_nb_sector)
|
||||
{
|
||||
Ctrl_status status;
|
||||
@@ -359,7 +349,6 @@ Ctrl_status mem_read_capacity(U8 lun, U32 *u32_nb_sector)
|
||||
return status;
|
||||
}
|
||||
|
||||
|
||||
U8 mem_sector_size(U8 lun)
|
||||
{
|
||||
U8 sector_size;
|
||||
@@ -381,7 +370,6 @@ U8 mem_sector_size(U8 lun)
|
||||
return sector_size;
|
||||
}
|
||||
|
||||
|
||||
bool mem_unload(U8 lun, bool unload)
|
||||
{
|
||||
bool unloaded;
|
||||
@@ -433,7 +421,6 @@ bool mem_wr_protect(U8 lun)
|
||||
return wr_protect;
|
||||
}
|
||||
|
||||
|
||||
bool mem_removal(U8 lun)
|
||||
{
|
||||
bool removal;
|
||||
@@ -458,7 +445,6 @@ bool mem_removal(U8 lun)
|
||||
return removal;
|
||||
}
|
||||
|
||||
|
||||
const char *mem_name(U8 lun)
|
||||
{
|
||||
#if MAX_LUN==0
|
||||
@@ -475,17 +461,14 @@ const char *mem_name(U8 lun)
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
#if ACCESS_USB == true
|
||||
|
||||
/*! \name MEM <-> USB Interface
|
||||
*/
|
||||
//! @{
|
||||
|
||||
|
||||
Ctrl_status memory_2_usb(U8 lun, U32 addr, U16 nb_sector)
|
||||
{
|
||||
Ctrl_status status;
|
||||
@@ -505,7 +488,6 @@ Ctrl_status memory_2_usb(U8 lun, U32 addr, U16 nb_sector)
|
||||
return status;
|
||||
}
|
||||
|
||||
|
||||
Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector)
|
||||
{
|
||||
Ctrl_status status;
|
||||
@@ -525,19 +507,16 @@ Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector)
|
||||
return status;
|
||||
}
|
||||
|
||||
|
||||
//! @}
|
||||
|
||||
#endif // ACCESS_USB == true
|
||||
|
||||
|
||||
#if ACCESS_MEM_TO_RAM == true
|
||||
|
||||
/*! \name MEM <-> RAM Interface
|
||||
*/
|
||||
//! @{
|
||||
|
||||
|
||||
Ctrl_status memory_2_ram(U8 lun, U32 addr, void *ram)
|
||||
{
|
||||
Ctrl_status status;
|
||||
@@ -564,7 +543,6 @@ Ctrl_status memory_2_ram(U8 lun, U32 addr, void *ram)
|
||||
return status;
|
||||
}
|
||||
|
||||
|
||||
Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram)
|
||||
{
|
||||
Ctrl_status status;
|
||||
@@ -591,19 +569,16 @@ Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram)
|
||||
return status;
|
||||
}
|
||||
|
||||
|
||||
//! @}
|
||||
|
||||
#endif // ACCESS_MEM_TO_RAM == true
|
||||
|
||||
|
||||
#if ACCESS_STREAM == true
|
||||
|
||||
/*! \name Streaming MEM <-> MEM Interface
|
||||
*/
|
||||
//! @{
|
||||
|
||||
|
||||
#if ACCESS_MEM_TO_MEM == true
|
||||
|
||||
#include "fat.h"
|
||||
@@ -625,21 +600,18 @@ Ctrl_status stream_mem_to_mem(U8 src_lun, U32 src_addr, U8 dest_lun, U32 dest_ad
|
||||
|
||||
#endif // ACCESS_MEM_TO_MEM == true
|
||||
|
||||
|
||||
Ctrl_status stream_state(U8 id)
|
||||
{
|
||||
UNUSED(id);
|
||||
return CTRL_GOOD;
|
||||
}
|
||||
|
||||
|
||||
U16 stream_stop(U8 id)
|
||||
{
|
||||
UNUSED(id);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
//! @}
|
||||
|
||||
#endif // ACCESS_STREAM
|
||||
|
@@ -56,7 +56,6 @@
|
||||
* Support and FAQ: visit <a href="https://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _CTRL_ACCESS_H_
|
||||
#define _CTRL_ACCESS_H_
|
||||
|
||||
@@ -89,7 +88,6 @@ typedef enum
|
||||
CTRL_BUSY = FAIL + 2 //!< Memory not initialized or changed.
|
||||
} Ctrl_status;
|
||||
|
||||
|
||||
// FYI: Each Logical Unit Number (LUN) corresponds to a memory.
|
||||
|
||||
// Check LUN defines.
|
||||
@@ -136,7 +134,6 @@ typedef enum
|
||||
#define LUN_ID_USB (MAX_LUN) //!< First dynamic LUN (USB host mass storage).
|
||||
//! @}
|
||||
|
||||
|
||||
// Include LUN header files.
|
||||
#if LUN_0 == ENABLE
|
||||
#include LUN_0_INCLUDE
|
||||
@@ -166,13 +163,11 @@ typedef enum
|
||||
#include LUN_USB_INCLUDE
|
||||
#endif
|
||||
|
||||
|
||||
// Check the configuration of write protection in conf_access.h.
|
||||
#ifndef GLOBAL_WR_PROTECT
|
||||
#error GLOBAL_WR_PROTECT must be defined as true or false in conf_access.h
|
||||
#endif
|
||||
|
||||
|
||||
#if GLOBAL_WR_PROTECT == true
|
||||
|
||||
//! Write protect.
|
||||
@@ -180,7 +175,6 @@ extern bool g_wr_protect;
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/*! \name Control Interface
|
||||
*/
|
||||
//! @{
|
||||
@@ -279,7 +273,6 @@ extern const char *mem_name(U8 lun);
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
#if ACCESS_USB == true
|
||||
|
||||
/*! \name MEM <-> USB Interface
|
||||
@@ -310,7 +303,6 @@ extern Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector);
|
||||
|
||||
#endif // ACCESS_USB == true
|
||||
|
||||
|
||||
#if ACCESS_MEM_TO_RAM == true
|
||||
|
||||
/*! \name MEM <-> RAM Interface
|
||||
@@ -341,7 +333,6 @@ extern Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram);
|
||||
|
||||
#endif // ACCESS_MEM_TO_RAM == true
|
||||
|
||||
|
||||
#if ACCESS_STREAM == true
|
||||
|
||||
/*! \name Streaming MEM <-> MEM Interface
|
||||
|
@@ -74,17 +74,17 @@ extern "C" {
|
||||
//@{
|
||||
|
||||
enum genclk_source {
|
||||
GENCLK_PCK_SRC_SLCK_RC = 0, //!< Internal 32kHz RC oscillator as PCK source clock
|
||||
GENCLK_PCK_SRC_SLCK_XTAL = 1, //!< External 32kHz crystal oscillator as PCK source clock
|
||||
GENCLK_PCK_SRC_SLCK_BYPASS = 2, //!< External 32kHz bypass oscillator as PCK source clock
|
||||
GENCLK_PCK_SRC_MAINCK_4M_RC = 3, //!< Internal 4MHz RC oscillator as PCK source clock
|
||||
GENCLK_PCK_SRC_MAINCK_8M_RC = 4, //!< Internal 8MHz RC oscillator as PCK source clock
|
||||
GENCLK_PCK_SRC_MAINCK_12M_RC = 5, //!< Internal 12MHz RC oscillator as PCK source clock
|
||||
GENCLK_PCK_SRC_MAINCK_XTAL = 6, //!< External crystal oscillator as PCK source clock
|
||||
GENCLK_PCK_SRC_MAINCK_BYPASS = 7, //!< External bypass oscillator as PCK source clock
|
||||
GENCLK_PCK_SRC_PLLACK = 8, //!< Use PLLACK as PCK source clock
|
||||
GENCLK_PCK_SRC_PLLBCK = 9, //!< Use PLLBCK as PCK source clock
|
||||
GENCLK_PCK_SRC_MCK = 10, //!< Use Master Clk as PCK source clock
|
||||
GENCLK_PCK_SRC_SLCK_RC = 0, //!< Internal 32kHz RC oscillator as PCK source clock
|
||||
GENCLK_PCK_SRC_SLCK_XTAL = 1, //!< External 32kHz crystal oscillator as PCK source clock
|
||||
GENCLK_PCK_SRC_SLCK_BYPASS = 2, //!< External 32kHz bypass oscillator as PCK source clock
|
||||
GENCLK_PCK_SRC_MAINCK_4M_RC = 3, //!< Internal 4MHz RC oscillator as PCK source clock
|
||||
GENCLK_PCK_SRC_MAINCK_8M_RC = 4, //!< Internal 8MHz RC oscillator as PCK source clock
|
||||
GENCLK_PCK_SRC_MAINCK_12M_RC = 5, //!< Internal 12MHz RC oscillator as PCK source clock
|
||||
GENCLK_PCK_SRC_MAINCK_XTAL = 6, //!< External crystal oscillator as PCK source clock
|
||||
GENCLK_PCK_SRC_MAINCK_BYPASS = 7, //!< External bypass oscillator as PCK source clock
|
||||
GENCLK_PCK_SRC_PLLACK = 8, //!< Use PLLACK as PCK source clock
|
||||
GENCLK_PCK_SRC_PLLBCK = 9, //!< Use PLLBCK as PCK source clock
|
||||
GENCLK_PCK_SRC_MCK = 10, //!< Use Master Clk as PCK source clock
|
||||
};
|
||||
|
||||
//@}
|
||||
@@ -93,176 +93,162 @@ enum genclk_source {
|
||||
//@{
|
||||
|
||||
enum genclk_divider {
|
||||
GENCLK_PCK_PRES_1 = PMC_PCK_PRES_CLK_1, //!< Set PCK clock prescaler to 1
|
||||
GENCLK_PCK_PRES_2 = PMC_PCK_PRES_CLK_2, //!< Set PCK clock prescaler to 2
|
||||
GENCLK_PCK_PRES_4 = PMC_PCK_PRES_CLK_4, //!< Set PCK clock prescaler to 4
|
||||
GENCLK_PCK_PRES_8 = PMC_PCK_PRES_CLK_8, //!< Set PCK clock prescaler to 8
|
||||
GENCLK_PCK_PRES_16 = PMC_PCK_PRES_CLK_16, //!< Set PCK clock prescaler to 16
|
||||
GENCLK_PCK_PRES_32 = PMC_PCK_PRES_CLK_32, //!< Set PCK clock prescaler to 32
|
||||
GENCLK_PCK_PRES_64 = PMC_PCK_PRES_CLK_64, //!< Set PCK clock prescaler to 64
|
||||
GENCLK_PCK_PRES_1 = PMC_PCK_PRES_CLK_1, //!< Set PCK clock prescaler to 1
|
||||
GENCLK_PCK_PRES_2 = PMC_PCK_PRES_CLK_2, //!< Set PCK clock prescaler to 2
|
||||
GENCLK_PCK_PRES_4 = PMC_PCK_PRES_CLK_4, //!< Set PCK clock prescaler to 4
|
||||
GENCLK_PCK_PRES_8 = PMC_PCK_PRES_CLK_8, //!< Set PCK clock prescaler to 8
|
||||
GENCLK_PCK_PRES_16 = PMC_PCK_PRES_CLK_16, //!< Set PCK clock prescaler to 16
|
||||
GENCLK_PCK_PRES_32 = PMC_PCK_PRES_CLK_32, //!< Set PCK clock prescaler to 32
|
||||
GENCLK_PCK_PRES_64 = PMC_PCK_PRES_CLK_64, //!< Set PCK clock prescaler to 64
|
||||
};
|
||||
|
||||
//@}
|
||||
|
||||
struct genclk_config {
|
||||
uint32_t ctrl;
|
||||
uint32_t ctrl;
|
||||
};
|
||||
|
||||
static inline void genclk_config_defaults(struct genclk_config *p_cfg,
|
||||
uint32_t ul_id)
|
||||
{
|
||||
ul_id = ul_id;
|
||||
p_cfg->ctrl = 0;
|
||||
static inline void genclk_config_defaults(struct genclk_config *p_cfg, uint32_t ul_id) {
|
||||
ul_id = ul_id;
|
||||
p_cfg->ctrl = 0;
|
||||
}
|
||||
|
||||
static inline void genclk_config_read(struct genclk_config *p_cfg,
|
||||
uint32_t ul_id)
|
||||
{
|
||||
p_cfg->ctrl = PMC->PMC_PCK[ul_id];
|
||||
static inline void genclk_config_read(struct genclk_config *p_cfg, uint32_t ul_id) {
|
||||
p_cfg->ctrl = PMC->PMC_PCK[ul_id];
|
||||
}
|
||||
|
||||
static inline void genclk_config_write(const struct genclk_config *p_cfg,
|
||||
uint32_t ul_id)
|
||||
{
|
||||
PMC->PMC_PCK[ul_id] = p_cfg->ctrl;
|
||||
static inline void genclk_config_write(const struct genclk_config *p_cfg, uint32_t ul_id) {
|
||||
PMC->PMC_PCK[ul_id] = p_cfg->ctrl;
|
||||
}
|
||||
|
||||
//! \name Programmable Clock Source and Prescaler configuration
|
||||
//@{
|
||||
|
||||
static inline void genclk_config_set_source(struct genclk_config *p_cfg,
|
||||
enum genclk_source e_src)
|
||||
{
|
||||
p_cfg->ctrl &= (~PMC_PCK_CSS_Msk);
|
||||
static inline void genclk_config_set_source(struct genclk_config *p_cfg, enum genclk_source e_src) {
|
||||
p_cfg->ctrl &= (~PMC_PCK_CSS_Msk);
|
||||
|
||||
switch (e_src) {
|
||||
case GENCLK_PCK_SRC_SLCK_RC:
|
||||
case GENCLK_PCK_SRC_SLCK_XTAL:
|
||||
case GENCLK_PCK_SRC_SLCK_BYPASS:
|
||||
p_cfg->ctrl |= (PMC_PCK_CSS_SLOW_CLK);
|
||||
break;
|
||||
switch (e_src) {
|
||||
case GENCLK_PCK_SRC_SLCK_RC:
|
||||
case GENCLK_PCK_SRC_SLCK_XTAL:
|
||||
case GENCLK_PCK_SRC_SLCK_BYPASS:
|
||||
p_cfg->ctrl |= (PMC_PCK_CSS_SLOW_CLK);
|
||||
break;
|
||||
|
||||
case GENCLK_PCK_SRC_MAINCK_4M_RC:
|
||||
case GENCLK_PCK_SRC_MAINCK_8M_RC:
|
||||
case GENCLK_PCK_SRC_MAINCK_12M_RC:
|
||||
case GENCLK_PCK_SRC_MAINCK_XTAL:
|
||||
case GENCLK_PCK_SRC_MAINCK_BYPASS:
|
||||
p_cfg->ctrl |= (PMC_PCK_CSS_MAIN_CLK);
|
||||
break;
|
||||
case GENCLK_PCK_SRC_MAINCK_4M_RC:
|
||||
case GENCLK_PCK_SRC_MAINCK_8M_RC:
|
||||
case GENCLK_PCK_SRC_MAINCK_12M_RC:
|
||||
case GENCLK_PCK_SRC_MAINCK_XTAL:
|
||||
case GENCLK_PCK_SRC_MAINCK_BYPASS:
|
||||
p_cfg->ctrl |= (PMC_PCK_CSS_MAIN_CLK);
|
||||
break;
|
||||
|
||||
case GENCLK_PCK_SRC_PLLACK:
|
||||
p_cfg->ctrl |= (PMC_PCK_CSS_PLLA_CLK);
|
||||
break;
|
||||
case GENCLK_PCK_SRC_PLLACK:
|
||||
p_cfg->ctrl |= (PMC_PCK_CSS_PLLA_CLK);
|
||||
break;
|
||||
|
||||
case GENCLK_PCK_SRC_PLLBCK:
|
||||
p_cfg->ctrl |= (PMC_PCK_CSS_UPLL_CLK);
|
||||
break;
|
||||
case GENCLK_PCK_SRC_PLLBCK:
|
||||
p_cfg->ctrl |= (PMC_PCK_CSS_UPLL_CLK);
|
||||
break;
|
||||
|
||||
case GENCLK_PCK_SRC_MCK:
|
||||
p_cfg->ctrl |= (PMC_PCK_CSS_MCK);
|
||||
break;
|
||||
}
|
||||
case GENCLK_PCK_SRC_MCK:
|
||||
p_cfg->ctrl |= (PMC_PCK_CSS_MCK);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void genclk_config_set_divider(struct genclk_config *p_cfg,
|
||||
uint32_t e_divider)
|
||||
{
|
||||
p_cfg->ctrl &= ~PMC_PCK_PRES_Msk;
|
||||
p_cfg->ctrl |= e_divider;
|
||||
static inline void genclk_config_set_divider(struct genclk_config *p_cfg, uint32_t e_divider) {
|
||||
p_cfg->ctrl &= ~PMC_PCK_PRES_Msk;
|
||||
p_cfg->ctrl |= e_divider;
|
||||
}
|
||||
|
||||
//@}
|
||||
|
||||
static inline void genclk_enable(const struct genclk_config *p_cfg,
|
||||
uint32_t ul_id)
|
||||
{
|
||||
PMC->PMC_PCK[ul_id] = p_cfg->ctrl;
|
||||
pmc_enable_pck(ul_id);
|
||||
static inline void genclk_enable(const struct genclk_config *p_cfg, uint32_t ul_id) {
|
||||
PMC->PMC_PCK[ul_id] = p_cfg->ctrl;
|
||||
pmc_enable_pck(ul_id);
|
||||
}
|
||||
|
||||
static inline void genclk_disable(uint32_t ul_id)
|
||||
{
|
||||
pmc_disable_pck(ul_id);
|
||||
static inline void genclk_disable(uint32_t ul_id) {
|
||||
pmc_disable_pck(ul_id);
|
||||
}
|
||||
|
||||
static inline void genclk_enable_source(enum genclk_source e_src)
|
||||
{
|
||||
switch (e_src) {
|
||||
case GENCLK_PCK_SRC_SLCK_RC:
|
||||
if (!osc_is_ready(OSC_SLCK_32K_RC)) {
|
||||
osc_enable(OSC_SLCK_32K_RC);
|
||||
osc_wait_ready(OSC_SLCK_32K_RC);
|
||||
}
|
||||
break;
|
||||
static inline void genclk_enable_source(enum genclk_source e_src) {
|
||||
switch (e_src) {
|
||||
case GENCLK_PCK_SRC_SLCK_RC:
|
||||
if (!osc_is_ready(OSC_SLCK_32K_RC)) {
|
||||
osc_enable(OSC_SLCK_32K_RC);
|
||||
osc_wait_ready(OSC_SLCK_32K_RC);
|
||||
}
|
||||
break;
|
||||
|
||||
case GENCLK_PCK_SRC_SLCK_XTAL:
|
||||
if (!osc_is_ready(OSC_SLCK_32K_XTAL)) {
|
||||
osc_enable(OSC_SLCK_32K_XTAL);
|
||||
osc_wait_ready(OSC_SLCK_32K_XTAL);
|
||||
}
|
||||
break;
|
||||
case GENCLK_PCK_SRC_SLCK_XTAL:
|
||||
if (!osc_is_ready(OSC_SLCK_32K_XTAL)) {
|
||||
osc_enable(OSC_SLCK_32K_XTAL);
|
||||
osc_wait_ready(OSC_SLCK_32K_XTAL);
|
||||
}
|
||||
break;
|
||||
|
||||
case GENCLK_PCK_SRC_SLCK_BYPASS:
|
||||
if (!osc_is_ready(OSC_SLCK_32K_BYPASS)) {
|
||||
osc_enable(OSC_SLCK_32K_BYPASS);
|
||||
osc_wait_ready(OSC_SLCK_32K_BYPASS);
|
||||
}
|
||||
break;
|
||||
case GENCLK_PCK_SRC_SLCK_BYPASS:
|
||||
if (!osc_is_ready(OSC_SLCK_32K_BYPASS)) {
|
||||
osc_enable(OSC_SLCK_32K_BYPASS);
|
||||
osc_wait_ready(OSC_SLCK_32K_BYPASS);
|
||||
}
|
||||
break;
|
||||
|
||||
case GENCLK_PCK_SRC_MAINCK_4M_RC:
|
||||
if (!osc_is_ready(OSC_MAINCK_4M_RC)) {
|
||||
osc_enable(OSC_MAINCK_4M_RC);
|
||||
osc_wait_ready(OSC_MAINCK_4M_RC);
|
||||
}
|
||||
break;
|
||||
case GENCLK_PCK_SRC_MAINCK_4M_RC:
|
||||
if (!osc_is_ready(OSC_MAINCK_4M_RC)) {
|
||||
osc_enable(OSC_MAINCK_4M_RC);
|
||||
osc_wait_ready(OSC_MAINCK_4M_RC);
|
||||
}
|
||||
break;
|
||||
|
||||
case GENCLK_PCK_SRC_MAINCK_8M_RC:
|
||||
if (!osc_is_ready(OSC_MAINCK_8M_RC)) {
|
||||
osc_enable(OSC_MAINCK_8M_RC);
|
||||
osc_wait_ready(OSC_MAINCK_8M_RC);
|
||||
}
|
||||
break;
|
||||
case GENCLK_PCK_SRC_MAINCK_8M_RC:
|
||||
if (!osc_is_ready(OSC_MAINCK_8M_RC)) {
|
||||
osc_enable(OSC_MAINCK_8M_RC);
|
||||
osc_wait_ready(OSC_MAINCK_8M_RC);
|
||||
}
|
||||
break;
|
||||
|
||||
case GENCLK_PCK_SRC_MAINCK_12M_RC:
|
||||
if (!osc_is_ready(OSC_MAINCK_12M_RC)) {
|
||||
osc_enable(OSC_MAINCK_12M_RC);
|
||||
osc_wait_ready(OSC_MAINCK_12M_RC);
|
||||
}
|
||||
break;
|
||||
case GENCLK_PCK_SRC_MAINCK_12M_RC:
|
||||
if (!osc_is_ready(OSC_MAINCK_12M_RC)) {
|
||||
osc_enable(OSC_MAINCK_12M_RC);
|
||||
osc_wait_ready(OSC_MAINCK_12M_RC);
|
||||
}
|
||||
break;
|
||||
|
||||
case GENCLK_PCK_SRC_MAINCK_XTAL:
|
||||
if (!osc_is_ready(OSC_MAINCK_XTAL)) {
|
||||
osc_enable(OSC_MAINCK_XTAL);
|
||||
osc_wait_ready(OSC_MAINCK_XTAL);
|
||||
}
|
||||
break;
|
||||
case GENCLK_PCK_SRC_MAINCK_XTAL:
|
||||
if (!osc_is_ready(OSC_MAINCK_XTAL)) {
|
||||
osc_enable(OSC_MAINCK_XTAL);
|
||||
osc_wait_ready(OSC_MAINCK_XTAL);
|
||||
}
|
||||
break;
|
||||
|
||||
case GENCLK_PCK_SRC_MAINCK_BYPASS:
|
||||
if (!osc_is_ready(OSC_MAINCK_BYPASS)) {
|
||||
osc_enable(OSC_MAINCK_BYPASS);
|
||||
osc_wait_ready(OSC_MAINCK_BYPASS);
|
||||
}
|
||||
break;
|
||||
case GENCLK_PCK_SRC_MAINCK_BYPASS:
|
||||
if (!osc_is_ready(OSC_MAINCK_BYPASS)) {
|
||||
osc_enable(OSC_MAINCK_BYPASS);
|
||||
osc_wait_ready(OSC_MAINCK_BYPASS);
|
||||
}
|
||||
break;
|
||||
|
||||
#ifdef CONFIG_PLL0_SOURCE
|
||||
case GENCLK_PCK_SRC_PLLACK:
|
||||
pll_enable_config_defaults(0);
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_PLL0_SOURCE
|
||||
case GENCLK_PCK_SRC_PLLACK:
|
||||
pll_enable_config_defaults(0);
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PLL1_SOURCE
|
||||
case GENCLK_PCK_SRC_PLLBCK:
|
||||
pll_enable_config_defaults(1);
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_PLL1_SOURCE
|
||||
case GENCLK_PCK_SRC_PLLBCK:
|
||||
pll_enable_config_defaults(1);
|
||||
break;
|
||||
#endif
|
||||
|
||||
case GENCLK_PCK_SRC_MCK:
|
||||
break;
|
||||
case GENCLK_PCK_SRC_MCK:
|
||||
break;
|
||||
|
||||
default:
|
||||
Assert(false);
|
||||
break;
|
||||
}
|
||||
default:
|
||||
Assert(false);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
//! @}
|
||||
|
@@ -57,7 +57,6 @@
|
||||
|
||||
#include "preprocessor.h"
|
||||
|
||||
|
||||
//! Maximal number of repetitions supported by MREPEAT.
|
||||
#define MREPEAT_LIMIT 256
|
||||
|
||||
|
@@ -62,28 +62,28 @@ extern "C" {
|
||||
* should be defined by the board code, otherwise default value are used.
|
||||
*/
|
||||
#ifndef BOARD_FREQ_SLCK_XTAL
|
||||
# warning The board slow clock xtal frequency has not been defined.
|
||||
# define BOARD_FREQ_SLCK_XTAL (32768UL)
|
||||
#warning The board slow clock xtal frequency has not been defined.
|
||||
#define BOARD_FREQ_SLCK_XTAL (32768UL)
|
||||
#endif
|
||||
|
||||
#ifndef BOARD_FREQ_SLCK_BYPASS
|
||||
# warning The board slow clock bypass frequency has not been defined.
|
||||
# define BOARD_FREQ_SLCK_BYPASS (32768UL)
|
||||
#warning The board slow clock bypass frequency has not been defined.
|
||||
#define BOARD_FREQ_SLCK_BYPASS (32768UL)
|
||||
#endif
|
||||
|
||||
#ifndef BOARD_FREQ_MAINCK_XTAL
|
||||
# warning The board main clock xtal frequency has not been defined.
|
||||
# define BOARD_FREQ_MAINCK_XTAL (12000000UL)
|
||||
#warning The board main clock xtal frequency has not been defined.
|
||||
#define BOARD_FREQ_MAINCK_XTAL (12000000UL)
|
||||
#endif
|
||||
|
||||
#ifndef BOARD_FREQ_MAINCK_BYPASS
|
||||
# warning The board main clock bypass frequency has not been defined.
|
||||
# define BOARD_FREQ_MAINCK_BYPASS (12000000UL)
|
||||
#warning The board main clock bypass frequency has not been defined.
|
||||
#define BOARD_FREQ_MAINCK_BYPASS (12000000UL)
|
||||
#endif
|
||||
|
||||
#ifndef BOARD_OSC_STARTUP_US
|
||||
# warning The board main clock xtal startup time has not been defined.
|
||||
# define BOARD_OSC_STARTUP_US (15625UL)
|
||||
#warning The board main clock xtal startup time has not been defined.
|
||||
#define BOARD_OSC_STARTUP_US (15625UL)
|
||||
#endif
|
||||
|
||||
/**
|
||||
@@ -115,122 +115,116 @@ extern "C" {
|
||||
#define OSC_MAINCK_BYPASS_HZ BOARD_FREQ_MAINCK_BYPASS //!< External bypass oscillator.
|
||||
//@}
|
||||
|
||||
static inline void osc_enable(uint32_t ul_id)
|
||||
{
|
||||
switch (ul_id) {
|
||||
case OSC_SLCK_32K_RC:
|
||||
break;
|
||||
static inline void osc_enable(uint32_t ul_id) {
|
||||
switch (ul_id) {
|
||||
case OSC_SLCK_32K_RC:
|
||||
break;
|
||||
|
||||
case OSC_SLCK_32K_XTAL:
|
||||
pmc_switch_sclk_to_32kxtal(PMC_OSC_XTAL);
|
||||
break;
|
||||
case OSC_SLCK_32K_XTAL:
|
||||
pmc_switch_sclk_to_32kxtal(PMC_OSC_XTAL);
|
||||
break;
|
||||
|
||||
case OSC_SLCK_32K_BYPASS:
|
||||
pmc_switch_sclk_to_32kxtal(PMC_OSC_BYPASS);
|
||||
break;
|
||||
case OSC_SLCK_32K_BYPASS:
|
||||
pmc_switch_sclk_to_32kxtal(PMC_OSC_BYPASS);
|
||||
break;
|
||||
|
||||
case OSC_MAINCK_4M_RC:
|
||||
pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_4_MHz);
|
||||
break;
|
||||
|
||||
case OSC_MAINCK_4M_RC:
|
||||
pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_4_MHz);
|
||||
break;
|
||||
case OSC_MAINCK_8M_RC:
|
||||
pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_8_MHz);
|
||||
break;
|
||||
|
||||
case OSC_MAINCK_8M_RC:
|
||||
pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_8_MHz);
|
||||
break;
|
||||
case OSC_MAINCK_12M_RC:
|
||||
pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_12_MHz);
|
||||
break;
|
||||
|
||||
case OSC_MAINCK_12M_RC:
|
||||
pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_12_MHz);
|
||||
break;
|
||||
case OSC_MAINCK_XTAL:
|
||||
pmc_switch_mainck_to_xtal(PMC_OSC_XTAL/*,
|
||||
pmc_us_to_moscxtst(BOARD_OSC_STARTUP_US,
|
||||
OSC_SLCK_32K_RC_HZ)*/);
|
||||
break;
|
||||
|
||||
|
||||
case OSC_MAINCK_XTAL:
|
||||
pmc_switch_mainck_to_xtal(PMC_OSC_XTAL/*,
|
||||
pmc_us_to_moscxtst(BOARD_OSC_STARTUP_US,
|
||||
OSC_SLCK_32K_RC_HZ)*/);
|
||||
break;
|
||||
|
||||
case OSC_MAINCK_BYPASS:
|
||||
pmc_switch_mainck_to_xtal(PMC_OSC_BYPASS/*,
|
||||
pmc_us_to_moscxtst(BOARD_OSC_STARTUP_US,
|
||||
OSC_SLCK_32K_RC_HZ)*/);
|
||||
break;
|
||||
}
|
||||
case OSC_MAINCK_BYPASS:
|
||||
pmc_switch_mainck_to_xtal(PMC_OSC_BYPASS/*,
|
||||
pmc_us_to_moscxtst(BOARD_OSC_STARTUP_US,
|
||||
OSC_SLCK_32K_RC_HZ)*/);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void osc_disable(uint32_t ul_id)
|
||||
{
|
||||
switch (ul_id) {
|
||||
case OSC_SLCK_32K_RC:
|
||||
case OSC_SLCK_32K_XTAL:
|
||||
case OSC_SLCK_32K_BYPASS:
|
||||
break;
|
||||
static inline void osc_disable(uint32_t ul_id) {
|
||||
switch (ul_id) {
|
||||
case OSC_SLCK_32K_RC:
|
||||
case OSC_SLCK_32K_XTAL:
|
||||
case OSC_SLCK_32K_BYPASS:
|
||||
break;
|
||||
|
||||
case OSC_MAINCK_4M_RC:
|
||||
case OSC_MAINCK_8M_RC:
|
||||
case OSC_MAINCK_12M_RC:
|
||||
pmc_osc_disable_fastrc();
|
||||
break;
|
||||
case OSC_MAINCK_4M_RC:
|
||||
case OSC_MAINCK_8M_RC:
|
||||
case OSC_MAINCK_12M_RC:
|
||||
pmc_osc_disable_fastrc();
|
||||
break;
|
||||
|
||||
case OSC_MAINCK_XTAL:
|
||||
pmc_osc_disable_xtal(PMC_OSC_XTAL);
|
||||
break;
|
||||
case OSC_MAINCK_XTAL:
|
||||
pmc_osc_disable_xtal(PMC_OSC_XTAL);
|
||||
break;
|
||||
|
||||
case OSC_MAINCK_BYPASS:
|
||||
pmc_osc_disable_xtal(PMC_OSC_BYPASS);
|
||||
break;
|
||||
}
|
||||
case OSC_MAINCK_BYPASS:
|
||||
pmc_osc_disable_xtal(PMC_OSC_BYPASS);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static inline bool osc_is_ready(uint32_t ul_id)
|
||||
{
|
||||
switch (ul_id) {
|
||||
case OSC_SLCK_32K_RC:
|
||||
return 1;
|
||||
static inline bool osc_is_ready(uint32_t ul_id) {
|
||||
switch (ul_id) {
|
||||
case OSC_SLCK_32K_RC:
|
||||
return 1;
|
||||
|
||||
case OSC_SLCK_32K_XTAL:
|
||||
case OSC_SLCK_32K_BYPASS:
|
||||
return pmc_osc_is_ready_32kxtal();
|
||||
case OSC_SLCK_32K_XTAL:
|
||||
case OSC_SLCK_32K_BYPASS:
|
||||
return pmc_osc_is_ready_32kxtal();
|
||||
|
||||
case OSC_MAINCK_4M_RC:
|
||||
case OSC_MAINCK_8M_RC:
|
||||
case OSC_MAINCK_12M_RC:
|
||||
case OSC_MAINCK_XTAL:
|
||||
case OSC_MAINCK_BYPASS:
|
||||
return pmc_osc_is_ready_mainck();
|
||||
}
|
||||
case OSC_MAINCK_4M_RC:
|
||||
case OSC_MAINCK_8M_RC:
|
||||
case OSC_MAINCK_12M_RC:
|
||||
case OSC_MAINCK_XTAL:
|
||||
case OSC_MAINCK_BYPASS:
|
||||
return pmc_osc_is_ready_mainck();
|
||||
}
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline uint32_t osc_get_rate(uint32_t ul_id)
|
||||
{
|
||||
switch (ul_id) {
|
||||
case OSC_SLCK_32K_RC:
|
||||
return OSC_SLCK_32K_RC_HZ;
|
||||
static inline uint32_t osc_get_rate(uint32_t ul_id) {
|
||||
switch (ul_id) {
|
||||
case OSC_SLCK_32K_RC:
|
||||
return OSC_SLCK_32K_RC_HZ;
|
||||
|
||||
case OSC_SLCK_32K_XTAL:
|
||||
return BOARD_FREQ_SLCK_XTAL;
|
||||
case OSC_SLCK_32K_XTAL:
|
||||
return BOARD_FREQ_SLCK_XTAL;
|
||||
|
||||
case OSC_SLCK_32K_BYPASS:
|
||||
return BOARD_FREQ_SLCK_BYPASS;
|
||||
case OSC_SLCK_32K_BYPASS:
|
||||
return BOARD_FREQ_SLCK_BYPASS;
|
||||
|
||||
case OSC_MAINCK_4M_RC:
|
||||
return OSC_MAINCK_4M_RC_HZ;
|
||||
case OSC_MAINCK_4M_RC:
|
||||
return OSC_MAINCK_4M_RC_HZ;
|
||||
|
||||
case OSC_MAINCK_8M_RC:
|
||||
return OSC_MAINCK_8M_RC_HZ;
|
||||
case OSC_MAINCK_8M_RC:
|
||||
return OSC_MAINCK_8M_RC_HZ;
|
||||
|
||||
case OSC_MAINCK_12M_RC:
|
||||
return OSC_MAINCK_12M_RC_HZ;
|
||||
case OSC_MAINCK_12M_RC:
|
||||
return OSC_MAINCK_12M_RC_HZ;
|
||||
|
||||
case OSC_MAINCK_XTAL:
|
||||
return BOARD_FREQ_MAINCK_XTAL;
|
||||
case OSC_MAINCK_XTAL:
|
||||
return BOARD_FREQ_MAINCK_XTAL;
|
||||
|
||||
case OSC_MAINCK_BYPASS:
|
||||
return BOARD_FREQ_MAINCK_BYPASS;
|
||||
}
|
||||
case OSC_MAINCK_BYPASS:
|
||||
return BOARD_FREQ_MAINCK_BYPASS;
|
||||
}
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -241,11 +235,10 @@ static inline uint32_t osc_get_rate(uint32_t ul_id)
|
||||
*
|
||||
* \param id A number identifying the oscillator to wait for.
|
||||
*/
|
||||
static inline void osc_wait_ready(uint8_t id)
|
||||
{
|
||||
while (!osc_is_ready(id)) {
|
||||
/* Do nothing */
|
||||
}
|
||||
static inline void osc_wait_ready(uint8_t id) {
|
||||
while (!osc_is_ready(id)) {
|
||||
/* Do nothing */
|
||||
}
|
||||
}
|
||||
|
||||
//! @}
|
||||
|
@@ -77,22 +77,22 @@ extern "C" {
|
||||
#define PLL_COUNT 0x3FU
|
||||
|
||||
enum pll_source {
|
||||
PLL_SRC_MAINCK_4M_RC = OSC_MAINCK_4M_RC, //!< Internal 4MHz RC oscillator.
|
||||
PLL_SRC_MAINCK_8M_RC = OSC_MAINCK_8M_RC, //!< Internal 8MHz RC oscillator.
|
||||
PLL_SRC_MAINCK_12M_RC = OSC_MAINCK_12M_RC, //!< Internal 12MHz RC oscillator.
|
||||
PLL_SRC_MAINCK_XTAL = OSC_MAINCK_XTAL, //!< External crystal oscillator.
|
||||
PLL_SRC_MAINCK_BYPASS = OSC_MAINCK_BYPASS, //!< External bypass oscillator.
|
||||
PLL_NR_SOURCES, //!< Number of PLL sources.
|
||||
PLL_SRC_MAINCK_4M_RC = OSC_MAINCK_4M_RC, //!< Internal 4MHz RC oscillator.
|
||||
PLL_SRC_MAINCK_8M_RC = OSC_MAINCK_8M_RC, //!< Internal 8MHz RC oscillator.
|
||||
PLL_SRC_MAINCK_12M_RC = OSC_MAINCK_12M_RC, //!< Internal 12MHz RC oscillator.
|
||||
PLL_SRC_MAINCK_XTAL = OSC_MAINCK_XTAL, //!< External crystal oscillator.
|
||||
PLL_SRC_MAINCK_BYPASS = OSC_MAINCK_BYPASS, //!< External bypass oscillator.
|
||||
PLL_NR_SOURCES, //!< Number of PLL sources.
|
||||
};
|
||||
|
||||
struct pll_config {
|
||||
uint32_t ctrl;
|
||||
uint32_t ctrl;
|
||||
};
|
||||
|
||||
#define pll_get_default_rate(pll_id) \
|
||||
((osc_get_rate(CONFIG_PLL##pll_id##_SOURCE) \
|
||||
* CONFIG_PLL##pll_id##_MUL) \
|
||||
/ CONFIG_PLL##pll_id##_DIV)
|
||||
((osc_get_rate(CONFIG_PLL##pll_id##_SOURCE) \
|
||||
* CONFIG_PLL##pll_id##_MUL) \
|
||||
/ CONFIG_PLL##pll_id##_DIV)
|
||||
|
||||
/* Force UTMI PLL parameters (Hardware defined) */
|
||||
#ifdef CONFIG_PLL1_SOURCE
|
||||
@@ -113,145 +113,130 @@ struct pll_config {
|
||||
* is hidden in this implementation. Use mul as mul effective value.
|
||||
*/
|
||||
static inline void pll_config_init(struct pll_config *p_cfg,
|
||||
enum pll_source e_src, uint32_t ul_div, uint32_t ul_mul)
|
||||
{
|
||||
uint32_t vco_hz;
|
||||
enum pll_source e_src, uint32_t ul_div, uint32_t ul_mul) {
|
||||
uint32_t vco_hz;
|
||||
|
||||
Assert(e_src < PLL_NR_SOURCES);
|
||||
Assert(e_src < PLL_NR_SOURCES);
|
||||
|
||||
if (ul_div == 0 && ul_mul == 0) { /* Must only be true for UTMI PLL */
|
||||
p_cfg->ctrl = CKGR_UCKR_UPLLCOUNT(PLL_COUNT);
|
||||
} else { /* PLLA */
|
||||
/* Calculate internal VCO frequency */
|
||||
vco_hz = osc_get_rate(e_src) / ul_div;
|
||||
Assert(vco_hz >= PLL_INPUT_MIN_HZ);
|
||||
Assert(vco_hz <= PLL_INPUT_MAX_HZ);
|
||||
if (ul_div == 0 && ul_mul == 0) { /* Must only be true for UTMI PLL */
|
||||
p_cfg->ctrl = CKGR_UCKR_UPLLCOUNT(PLL_COUNT);
|
||||
}
|
||||
else { /* PLLA */
|
||||
/* Calculate internal VCO frequency */
|
||||
vco_hz = osc_get_rate(e_src) / ul_div;
|
||||
Assert(vco_hz >= PLL_INPUT_MIN_HZ);
|
||||
Assert(vco_hz <= PLL_INPUT_MAX_HZ);
|
||||
|
||||
vco_hz *= ul_mul;
|
||||
Assert(vco_hz >= PLL_OUTPUT_MIN_HZ);
|
||||
Assert(vco_hz <= PLL_OUTPUT_MAX_HZ);
|
||||
vco_hz *= ul_mul;
|
||||
Assert(vco_hz >= PLL_OUTPUT_MIN_HZ);
|
||||
Assert(vco_hz <= PLL_OUTPUT_MAX_HZ);
|
||||
|
||||
/* PMC hardware will automatically make it mul+1 */
|
||||
p_cfg->ctrl = CKGR_PLLAR_MULA(ul_mul - 1) | CKGR_PLLAR_DIVA(ul_div) | CKGR_PLLAR_PLLACOUNT(PLL_COUNT);
|
||||
}
|
||||
/* PMC hardware will automatically make it mul+1 */
|
||||
p_cfg->ctrl = CKGR_PLLAR_MULA(ul_mul - 1) | CKGR_PLLAR_DIVA(ul_div) | CKGR_PLLAR_PLLACOUNT(PLL_COUNT);
|
||||
}
|
||||
}
|
||||
|
||||
#define pll_config_defaults(cfg, pll_id) \
|
||||
pll_config_init(cfg, \
|
||||
CONFIG_PLL##pll_id##_SOURCE, \
|
||||
CONFIG_PLL##pll_id##_DIV, \
|
||||
CONFIG_PLL##pll_id##_MUL)
|
||||
#define pll_config_defaults(cfg, pll_id) \
|
||||
pll_config_init(cfg, \
|
||||
CONFIG_PLL##pll_id##_SOURCE, \
|
||||
CONFIG_PLL##pll_id##_DIV, \
|
||||
CONFIG_PLL##pll_id##_MUL)
|
||||
|
||||
static inline void pll_config_read(struct pll_config *p_cfg, uint32_t ul_pll_id)
|
||||
{
|
||||
Assert(ul_pll_id < NR_PLLS);
|
||||
|
||||
if (ul_pll_id == PLLA_ID) {
|
||||
p_cfg->ctrl = PMC->CKGR_PLLAR;
|
||||
} else {
|
||||
p_cfg->ctrl = PMC->CKGR_UCKR;
|
||||
}
|
||||
static inline void pll_config_read(struct pll_config *p_cfg, uint32_t ul_pll_id) {
|
||||
Assert(ul_pll_id < NR_PLLS);
|
||||
p_cfg->ctrl = ul_pll_id == PLLA_ID ? PMC->CKGR_PLLAR : PMC->CKGR_UCKR;
|
||||
}
|
||||
|
||||
static inline void pll_config_write(const struct pll_config *p_cfg, uint32_t ul_pll_id)
|
||||
{
|
||||
Assert(ul_pll_id < NR_PLLS);
|
||||
static inline void pll_config_write(const struct pll_config *p_cfg, uint32_t ul_pll_id) {
|
||||
Assert(ul_pll_id < NR_PLLS);
|
||||
|
||||
if (ul_pll_id == PLLA_ID) {
|
||||
pmc_disable_pllack(); // Always stop PLL first!
|
||||
PMC->CKGR_PLLAR = CKGR_PLLAR_ONE | p_cfg->ctrl;
|
||||
} else {
|
||||
PMC->CKGR_UCKR = p_cfg->ctrl;
|
||||
}
|
||||
if (ul_pll_id == PLLA_ID) {
|
||||
pmc_disable_pllack(); // Always stop PLL first!
|
||||
PMC->CKGR_PLLAR = CKGR_PLLAR_ONE | p_cfg->ctrl;
|
||||
}
|
||||
else
|
||||
PMC->CKGR_UCKR = p_cfg->ctrl;
|
||||
}
|
||||
|
||||
static inline void pll_enable(const struct pll_config *p_cfg, uint32_t ul_pll_id)
|
||||
{
|
||||
Assert(ul_pll_id < NR_PLLS);
|
||||
static inline void pll_enable(const struct pll_config *p_cfg, uint32_t ul_pll_id) {
|
||||
Assert(ul_pll_id < NR_PLLS);
|
||||
|
||||
if (ul_pll_id == PLLA_ID) {
|
||||
pmc_disable_pllack(); // Always stop PLL first!
|
||||
PMC->CKGR_PLLAR = CKGR_PLLAR_ONE | p_cfg->ctrl;
|
||||
} else {
|
||||
PMC->CKGR_UCKR = p_cfg->ctrl | CKGR_UCKR_UPLLEN;
|
||||
}
|
||||
if (ul_pll_id == PLLA_ID) {
|
||||
pmc_disable_pllack(); // Always stop PLL first!
|
||||
PMC->CKGR_PLLAR = CKGR_PLLAR_ONE | p_cfg->ctrl;
|
||||
}
|
||||
else
|
||||
PMC->CKGR_UCKR = p_cfg->ctrl | CKGR_UCKR_UPLLEN;
|
||||
}
|
||||
|
||||
/**
|
||||
* \note This will only disable the selected PLL, not the underlying oscillator (mainck).
|
||||
*/
|
||||
static inline void pll_disable(uint32_t ul_pll_id)
|
||||
{
|
||||
Assert(ul_pll_id < NR_PLLS);
|
||||
static inline void pll_disable(uint32_t ul_pll_id) {
|
||||
Assert(ul_pll_id < NR_PLLS);
|
||||
|
||||
if (ul_pll_id == PLLA_ID) {
|
||||
pmc_disable_pllack();
|
||||
} else {
|
||||
PMC->CKGR_UCKR &= ~CKGR_UCKR_UPLLEN;
|
||||
}
|
||||
if (ul_pll_id == PLLA_ID)
|
||||
pmc_disable_pllack();
|
||||
else
|
||||
PMC->CKGR_UCKR &= ~CKGR_UCKR_UPLLEN;
|
||||
}
|
||||
|
||||
static inline uint32_t pll_is_locked(uint32_t ul_pll_id)
|
||||
{
|
||||
Assert(ul_pll_id < NR_PLLS);
|
||||
static inline uint32_t pll_is_locked(uint32_t ul_pll_id) {
|
||||
Assert(ul_pll_id < NR_PLLS);
|
||||
|
||||
if (ul_pll_id == PLLA_ID) {
|
||||
return pmc_is_locked_pllack();
|
||||
} else {
|
||||
return pmc_is_locked_upll();
|
||||
}
|
||||
if (ul_pll_id == PLLA_ID)
|
||||
return pmc_is_locked_pllack();
|
||||
else
|
||||
return pmc_is_locked_upll();
|
||||
}
|
||||
|
||||
static inline void pll_enable_source(enum pll_source e_src)
|
||||
{
|
||||
switch (e_src) {
|
||||
case PLL_SRC_MAINCK_4M_RC:
|
||||
case PLL_SRC_MAINCK_8M_RC:
|
||||
case PLL_SRC_MAINCK_12M_RC:
|
||||
case PLL_SRC_MAINCK_XTAL:
|
||||
case PLL_SRC_MAINCK_BYPASS:
|
||||
osc_enable(e_src);
|
||||
osc_wait_ready(e_src);
|
||||
break;
|
||||
static inline void pll_enable_source(enum pll_source e_src) {
|
||||
switch (e_src) {
|
||||
case PLL_SRC_MAINCK_4M_RC:
|
||||
case PLL_SRC_MAINCK_8M_RC:
|
||||
case PLL_SRC_MAINCK_12M_RC:
|
||||
case PLL_SRC_MAINCK_XTAL:
|
||||
case PLL_SRC_MAINCK_BYPASS:
|
||||
osc_enable(e_src);
|
||||
osc_wait_ready(e_src);
|
||||
break;
|
||||
|
||||
default:
|
||||
Assert(false);
|
||||
break;
|
||||
}
|
||||
default:
|
||||
Assert(false);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void pll_enable_config_defaults(unsigned int ul_pll_id)
|
||||
{
|
||||
struct pll_config pllcfg;
|
||||
static inline void pll_enable_config_defaults(unsigned int ul_pll_id) {
|
||||
struct pll_config pllcfg;
|
||||
|
||||
if (pll_is_locked(ul_pll_id)) {
|
||||
return; // Pll already running
|
||||
}
|
||||
switch (ul_pll_id) {
|
||||
#ifdef CONFIG_PLL0_SOURCE
|
||||
case 0:
|
||||
pll_enable_source(CONFIG_PLL0_SOURCE);
|
||||
pll_config_init(&pllcfg,
|
||||
CONFIG_PLL0_SOURCE,
|
||||
CONFIG_PLL0_DIV,
|
||||
CONFIG_PLL0_MUL);
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_PLL1_SOURCE
|
||||
case 1:
|
||||
pll_enable_source(CONFIG_PLL1_SOURCE);
|
||||
pll_config_init(&pllcfg,
|
||||
CONFIG_PLL1_SOURCE,
|
||||
CONFIG_PLL1_DIV,
|
||||
CONFIG_PLL1_MUL);
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
Assert(false);
|
||||
break;
|
||||
}
|
||||
pll_enable(&pllcfg, ul_pll_id);
|
||||
while (!pll_is_locked(ul_pll_id));
|
||||
if (pll_is_locked(ul_pll_id)) return; // Pll already running
|
||||
|
||||
switch (ul_pll_id) {
|
||||
#ifdef CONFIG_PLL0_SOURCE
|
||||
case 0:
|
||||
pll_enable_source(CONFIG_PLL0_SOURCE);
|
||||
pll_config_init(&pllcfg,
|
||||
CONFIG_PLL0_SOURCE,
|
||||
CONFIG_PLL0_DIV,
|
||||
CONFIG_PLL0_MUL);
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_PLL1_SOURCE
|
||||
case 1:
|
||||
pll_enable_source(CONFIG_PLL1_SOURCE);
|
||||
pll_config_init(&pllcfg,
|
||||
CONFIG_PLL1_SOURCE,
|
||||
CONFIG_PLL1_DIV,
|
||||
CONFIG_PLL1_MUL);
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
Assert(false);
|
||||
break;
|
||||
}
|
||||
pll_enable(&pllcfg, ul_pll_id);
|
||||
while (!pll_is_locked(ul_pll_id));
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -264,15 +249,12 @@ static inline void pll_enable_config_defaults(unsigned int ul_pll_id)
|
||||
* \retval STATUS_OK The PLL is now locked.
|
||||
* \retval ERR_TIMEOUT Timed out waiting for PLL to become locked.
|
||||
*/
|
||||
static inline int pll_wait_for_lock(unsigned int pll_id)
|
||||
{
|
||||
Assert(pll_id < NR_PLLS);
|
||||
static inline int pll_wait_for_lock(unsigned int pll_id) {
|
||||
Assert(pll_id < NR_PLLS);
|
||||
|
||||
while (!pll_is_locked(pll_id)) {
|
||||
/* Do nothing */
|
||||
}
|
||||
while (!pll_is_locked(pll_id)) { /* Do nothing */ }
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
//! @}
|
||||
|
@@ -51,5 +51,4 @@
|
||||
#include "stringz.h"
|
||||
#include "mrepeat.h"
|
||||
|
||||
|
||||
#endif // _PREPROCESSOR_H_
|
||||
|
@@ -57,7 +57,6 @@
|
||||
#ifndef _SBC_PROTOCOL_H_
|
||||
#define _SBC_PROTOCOL_H_
|
||||
|
||||
|
||||
/**
|
||||
* \ingroup usb_msc_protocol
|
||||
* \defgroup usb_sbc_protocol SCSI Block Commands protocol definitions
|
||||
@@ -81,82 +80,81 @@
|
||||
//@{
|
||||
|
||||
enum scsi_sbc_mode {
|
||||
SCSI_MS_MODE_RW_ERR_RECOV = 0x01, //!< Read-Write Error Recovery mode page
|
||||
SCSI_MS_MODE_FORMAT_DEVICE = 0x03, //!< Format Device mode page
|
||||
SCSI_MS_MODE_FLEXIBLE_DISK = 0x05, //!< Flexible Disk mode page
|
||||
SCSI_MS_MODE_CACHING = 0x08, //!< Caching mode page
|
||||
SCSI_MS_MODE_RW_ERR_RECOV = 0x01, //!< Read-Write Error Recovery mode page
|
||||
SCSI_MS_MODE_FORMAT_DEVICE = 0x03, //!< Format Device mode page
|
||||
SCSI_MS_MODE_FLEXIBLE_DISK = 0x05, //!< Flexible Disk mode page
|
||||
SCSI_MS_MODE_CACHING = 0x08, //!< Caching mode page
|
||||
};
|
||||
|
||||
|
||||
//! \name SBC-2 Device-Specific Parameter
|
||||
//@{
|
||||
#define SCSI_MS_SBC_WP 0x80 //!< Write Protected
|
||||
#define SCSI_MS_SBC_DPOFUA 0x10 //!< DPO and FUA supported
|
||||
#define SCSI_MS_SBC_WP 0x80 //!< Write Protected
|
||||
#define SCSI_MS_SBC_DPOFUA 0x10 //!< DPO and FUA supported
|
||||
//@}
|
||||
|
||||
/**
|
||||
* \brief SBC-2 Short LBA mode parameter block descriptor
|
||||
*/
|
||||
struct sbc_slba_block_desc {
|
||||
be32_t nr_blocks; //!< Number of Blocks
|
||||
be32_t block_len; //!< Block Length
|
||||
#define SBC_SLBA_BLOCK_LEN_MASK 0x00FFFFFFU //!< Mask reserved bits
|
||||
be32_t nr_blocks; //!< Number of Blocks
|
||||
be32_t block_len; //!< Block Length
|
||||
#define SBC_SLBA_BLOCK_LEN_MASK 0x00FFFFFFU //!< Mask reserved bits
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief SBC-2 Caching mode page
|
||||
*/
|
||||
struct sbc_caching_mode_page {
|
||||
uint8_t page_code;
|
||||
uint8_t page_length;
|
||||
uint8_t flags2;
|
||||
#define SBC_MP_CACHE_IC (1 << 7) //!< Initiator Control
|
||||
#define SBC_MP_CACHE_ABPF (1 << 6) //!< Abort Pre-Fetch
|
||||
#define SBC_MP_CACHE_CAP (1 << 5) //!< Catching Analysis Permitted
|
||||
#define SBC_MP_CACHE_DISC (1 << 4) //!< Discontinuity
|
||||
#define SBC_MP_CACHE_SIZE (1 << 3) //!< Size enable
|
||||
#define SBC_MP_CACHE_WCE (1 << 2) //!< Write back Cache Enable
|
||||
#define SBC_MP_CACHE_MF (1 << 1) //!< Multiplication Factor
|
||||
#define SBC_MP_CACHE_RCD (1 << 0) //!< Read Cache Disable
|
||||
uint8_t retention;
|
||||
be16_t dis_pf_transfer_len;
|
||||
be16_t min_prefetch;
|
||||
be16_t max_prefetch;
|
||||
be16_t max_prefetch_ceil;
|
||||
uint8_t flags12;
|
||||
#define SBC_MP_CACHE_FSW (1 << 7) //!< Force Sequential Write
|
||||
#define SBC_MP_CACHE_LBCSS (1 << 6) //!< Logical Blk Cache Seg Sz
|
||||
#define SBC_MP_CACHE_DRA (1 << 5) //!< Disable Read-Ahead
|
||||
#define SBC_MP_CACHE_NV_DIS (1 << 0) //!< Non-Volatile Cache Disable
|
||||
uint8_t nr_cache_segments;
|
||||
be16_t cache_segment_size;
|
||||
uint8_t reserved[4];
|
||||
uint8_t page_code;
|
||||
uint8_t page_length;
|
||||
uint8_t flags2;
|
||||
#define SBC_MP_CACHE_IC (1 << 7) //!< Initiator Control
|
||||
#define SBC_MP_CACHE_ABPF (1 << 6) //!< Abort Pre-Fetch
|
||||
#define SBC_MP_CACHE_CAP (1 << 5) //!< Catching Analysis Permitted
|
||||
#define SBC_MP_CACHE_DISC (1 << 4) //!< Discontinuity
|
||||
#define SBC_MP_CACHE_SIZE (1 << 3) //!< Size enable
|
||||
#define SBC_MP_CACHE_WCE (1 << 2) //!< Write back Cache Enable
|
||||
#define SBC_MP_CACHE_MF (1 << 1) //!< Multiplication Factor
|
||||
#define SBC_MP_CACHE_RCD (1 << 0) //!< Read Cache Disable
|
||||
uint8_t retention;
|
||||
be16_t dis_pf_transfer_len;
|
||||
be16_t min_prefetch;
|
||||
be16_t max_prefetch;
|
||||
be16_t max_prefetch_ceil;
|
||||
uint8_t flags12;
|
||||
#define SBC_MP_CACHE_FSW (1 << 7) //!< Force Sequential Write
|
||||
#define SBC_MP_CACHE_LBCSS (1 << 6) //!< Logical Blk Cache Seg Sz
|
||||
#define SBC_MP_CACHE_DRA (1 << 5) //!< Disable Read-Ahead
|
||||
#define SBC_MP_CACHE_NV_DIS (1 << 0) //!< Non-Volatile Cache Disable
|
||||
uint8_t nr_cache_segments;
|
||||
be16_t cache_segment_size;
|
||||
uint8_t reserved[4];
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief SBC-2 Read-Write Error Recovery mode page
|
||||
*/
|
||||
struct sbc_rdwr_error_recovery_mode_page {
|
||||
uint8_t page_code;
|
||||
uint8_t page_length;
|
||||
#define SPC_MP_RW_ERR_RECOV_PAGE_LENGTH 0x0A
|
||||
uint8_t flags1;
|
||||
#define SBC_MP_RW_ERR_RECOV_AWRE (1 << 7)
|
||||
#define SBC_MP_RW_ERR_RECOV_ARRE (1 << 6)
|
||||
#define SBC_MP_RW_ERR_RECOV_TB (1 << 5)
|
||||
#define SBC_MP_RW_ERR_RECOV_RC (1 << 4)
|
||||
#define SBC_MP_RW_ERR_RECOV_ERR (1 << 3)
|
||||
#define SBC_MP_RW_ERR_RECOV_PER (1 << 2)
|
||||
#define SBC_MP_RW_ERR_RECOV_DTE (1 << 1)
|
||||
#define SBC_MP_RW_ERR_RECOV_DCR (1 << 0)
|
||||
uint8_t read_retry_count;
|
||||
uint8_t correction_span;
|
||||
uint8_t head_offset_count;
|
||||
uint8_t data_strobe_offset_count;
|
||||
uint8_t flags2;
|
||||
uint8_t write_retry_count;
|
||||
uint8_t flags3;
|
||||
be16_t recovery_time_limit;
|
||||
uint8_t page_code;
|
||||
uint8_t page_length;
|
||||
#define SPC_MP_RW_ERR_RECOV_PAGE_LENGTH 0x0A
|
||||
uint8_t flags1;
|
||||
#define SBC_MP_RW_ERR_RECOV_AWRE (1 << 7)
|
||||
#define SBC_MP_RW_ERR_RECOV_ARRE (1 << 6)
|
||||
#define SBC_MP_RW_ERR_RECOV_TB (1 << 5)
|
||||
#define SBC_MP_RW_ERR_RECOV_RC (1 << 4)
|
||||
#define SBC_MP_RW_ERR_RECOV_ERR (1 << 3)
|
||||
#define SBC_MP_RW_ERR_RECOV_PER (1 << 2)
|
||||
#define SBC_MP_RW_ERR_RECOV_DTE (1 << 1)
|
||||
#define SBC_MP_RW_ERR_RECOV_DCR (1 << 0)
|
||||
uint8_t read_retry_count;
|
||||
uint8_t correction_span;
|
||||
uint8_t head_offset_count;
|
||||
uint8_t data_strobe_offset_count;
|
||||
uint8_t flags2;
|
||||
uint8_t write_retry_count;
|
||||
uint8_t flags3;
|
||||
be16_t recovery_time_limit;
|
||||
};
|
||||
//@}
|
||||
|
||||
@@ -164,8 +162,8 @@ struct sbc_rdwr_error_recovery_mode_page {
|
||||
* \brief SBC-2 READ CAPACITY (10) parameter data
|
||||
*/
|
||||
struct sbc_read_capacity10_data {
|
||||
be32_t max_lba; //!< LBA of last logical block
|
||||
be32_t block_len; //!< Number of bytes in the last logical block
|
||||
be32_t max_lba; //!< LBA of last logical block
|
||||
be32_t block_len; //!< Number of bytes in the last logical block
|
||||
};
|
||||
|
||||
//@}
|
||||
|
@@ -6,7 +6,7 @@
|
||||
|
||||
#include "../../../inc/MarlinConfig.h"
|
||||
|
||||
#if ENABLED(SDSUPPORT)
|
||||
#if HAS_MEDIA
|
||||
|
||||
#include "../../../sd/cardreader.h"
|
||||
extern "C" {
|
||||
@@ -138,5 +138,5 @@ Ctrl_status sd_mmc_spi_usb_write_10(uint32_t addr, uint16_t nb_sector) {
|
||||
|
||||
#endif // ACCESS_USB == true
|
||||
|
||||
#endif // SDSUPPORT
|
||||
#endif // HAS_MEDIA
|
||||
#endif // ARDUINO_ARCH_SAM
|
||||
|
@@ -45,7 +45,6 @@
|
||||
* Support and FAQ: visit <a href="https://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _SD_MMC_SPI_MEM_H_
|
||||
#define _SD_MMC_SPI_MEM_H_
|
||||
|
||||
@@ -63,17 +62,14 @@
|
||||
#error sd_mmc_spi_mem.h is #included although SD_MMC_SPI_MEM is disabled
|
||||
#endif
|
||||
|
||||
|
||||
#include "ctrl_access.h"
|
||||
|
||||
|
||||
//_____ D E F I N I T I O N S ______________________________________________
|
||||
|
||||
#define SD_MMC_REMOVED 0
|
||||
#define SD_MMC_INSERTED 1
|
||||
#define SD_MMC_REMOVING 2
|
||||
|
||||
|
||||
//---- CONTROL FUNCTIONS ----
|
||||
//!
|
||||
//! @brief This function initializes the hw/sw resources required to drive the SD_MMC_SPI.
|
||||
@@ -133,7 +129,6 @@ extern bool sd_mmc_spi_wr_protect(void);
|
||||
//!
|
||||
extern bool sd_mmc_spi_removal(void);
|
||||
|
||||
|
||||
//---- ACCESS DATA FUNCTIONS ----
|
||||
|
||||
#if ACCESS_USB == true
|
||||
|
@@ -59,23 +59,23 @@
|
||||
|
||||
//! \name SCSI commands defined by SPC-2
|
||||
//@{
|
||||
#define SPC_TEST_UNIT_READY 0x00
|
||||
#define SPC_REQUEST_SENSE 0x03
|
||||
#define SPC_INQUIRY 0x12
|
||||
#define SPC_MODE_SELECT6 0x15
|
||||
#define SPC_MODE_SENSE6 0x1A
|
||||
#define SPC_SEND_DIAGNOSTIC 0x1D
|
||||
#define SPC_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1E
|
||||
#define SPC_MODE_SENSE10 0x5A
|
||||
#define SPC_REPORT_LUNS 0xA0
|
||||
#define SPC_TEST_UNIT_READY 0x00
|
||||
#define SPC_REQUEST_SENSE 0x03
|
||||
#define SPC_INQUIRY 0x12
|
||||
#define SPC_MODE_SELECT6 0x15
|
||||
#define SPC_MODE_SENSE6 0x1A
|
||||
#define SPC_SEND_DIAGNOSTIC 0x1D
|
||||
#define SPC_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1E
|
||||
#define SPC_MODE_SENSE10 0x5A
|
||||
#define SPC_REPORT_LUNS 0xA0
|
||||
//@}
|
||||
|
||||
//! \brief May be set in byte 0 of the INQUIRY CDB
|
||||
//@{
|
||||
//! Enable Vital Product Data
|
||||
#define SCSI_INQ_REQ_EVPD 0x01
|
||||
#define SCSI_INQ_REQ_EVPD 0x01
|
||||
//! Command Support Data specified by the PAGE OR OPERATION CODE field
|
||||
#define SCSI_INQ_REQ_CMDT 0x02
|
||||
#define SCSI_INQ_REQ_CMDT 0x02
|
||||
//@}
|
||||
|
||||
COMPILER_PACK_SET(1)
|
||||
@@ -84,110 +84,110 @@ COMPILER_PACK_SET(1)
|
||||
* \brief SCSI Standard Inquiry data structure
|
||||
*/
|
||||
struct scsi_inquiry_data {
|
||||
uint8_t pq_pdt; //!< Peripheral Qual / Peripheral Dev Type
|
||||
#define SCSI_INQ_PQ_CONNECTED 0x00 //!< Peripheral connected
|
||||
#define SCSI_INQ_PQ_NOT_CONN 0x20 //!< Peripheral not connected
|
||||
#define SCSI_INQ_PQ_NOT_SUPP 0x60 //!< Peripheral not supported
|
||||
#define SCSI_INQ_DT_DIR_ACCESS 0x00 //!< Direct Access (SBC)
|
||||
#define SCSI_INQ_DT_SEQ_ACCESS 0x01 //!< Sequential Access
|
||||
#define SCSI_INQ_DT_PRINTER 0x02 //!< Printer
|
||||
#define SCSI_INQ_DT_PROCESSOR 0x03 //!< Processor device
|
||||
#define SCSI_INQ_DT_WRITE_ONCE 0x04 //!< Write-once device
|
||||
#define SCSI_INQ_DT_CD_DVD 0x05 //!< CD/DVD device
|
||||
#define SCSI_INQ_DT_OPTICAL 0x07 //!< Optical Memory
|
||||
#define SCSI_INQ_DT_MC 0x08 //!< Medium Changer
|
||||
#define SCSI_INQ_DT_ARRAY 0x0C //!< Storage Array Controller
|
||||
#define SCSI_INQ_DT_ENCLOSURE 0x0D //!< Enclosure Services
|
||||
#define SCSI_INQ_DT_RBC 0x0E //!< Simplified Direct Access
|
||||
#define SCSI_INQ_DT_OCRW 0x0F //!< Optical card reader/writer
|
||||
#define SCSI_INQ_DT_BCC 0x10 //!< Bridge Controller Commands
|
||||
#define SCSI_INQ_DT_OSD 0x11 //!< Object-based Storage
|
||||
#define SCSI_INQ_DT_NONE 0x1F //!< No Peripheral
|
||||
uint8_t flags1; //!< Flags (byte 1)
|
||||
#define SCSI_INQ_RMB 0x80 //!< Removable Medium
|
||||
uint8_t version; //!< Version
|
||||
#define SCSI_INQ_VER_NONE 0x00 //!< No standards conformance
|
||||
#define SCSI_INQ_VER_SPC 0x03 //!< SCSI Primary Commands (link to SBC)
|
||||
#define SCSI_INQ_VER_SPC2 0x04 //!< SCSI Primary Commands - 2 (link to SBC-2)
|
||||
#define SCSI_INQ_VER_SPC3 0x05 //!< SCSI Primary Commands - 3 (link to SBC-2)
|
||||
#define SCSI_INQ_VER_SPC4 0x06 //!< SCSI Primary Commands - 4 (link to SBC-3)
|
||||
uint8_t flags3; //!< Flags (byte 3)
|
||||
#define SCSI_INQ_NORMACA 0x20 //!< Normal ACA Supported
|
||||
#define SCSI_INQ_HISUP 0x10 //!< Hierarchal LUN addressing
|
||||
#define SCSI_INQ_RSP_SPC2 0x02 //!< SPC-2 / SPC-3 response format
|
||||
uint8_t addl_len; //!< Additional Length (n-4)
|
||||
#define SCSI_INQ_ADDL_LEN(tot) ((tot)-5) //!< Total length is \a tot
|
||||
uint8_t flags5; //!< Flags (byte 5)
|
||||
#define SCSI_INQ_SCCS 0x80
|
||||
uint8_t flags6; //!< Flags (byte 6)
|
||||
#define SCSI_INQ_BQUE 0x80
|
||||
#define SCSI_INQ_ENCSERV 0x40
|
||||
#define SCSI_INQ_MULTIP 0x10
|
||||
#define SCSI_INQ_MCHGR 0x08
|
||||
#define SCSI_INQ_ADDR16 0x01
|
||||
uint8_t flags7; //!< Flags (byte 7)
|
||||
#define SCSI_INQ_WBUS16 0x20
|
||||
#define SCSI_INQ_SYNC 0x10
|
||||
#define SCSI_INQ_LINKED 0x08
|
||||
#define SCSI_INQ_CMDQUE 0x02
|
||||
uint8_t vendor_id[8]; //!< T10 Vendor Identification
|
||||
uint8_t product_id[16]; //!< Product Identification
|
||||
uint8_t product_rev[4]; //!< Product Revision Level
|
||||
uint8_t pq_pdt; //!< Peripheral Qual / Peripheral Dev Type
|
||||
#define SCSI_INQ_PQ_CONNECTED 0x00 //!< Peripheral connected
|
||||
#define SCSI_INQ_PQ_NOT_CONN 0x20 //!< Peripheral not connected
|
||||
#define SCSI_INQ_PQ_NOT_SUPP 0x60 //!< Peripheral not supported
|
||||
#define SCSI_INQ_DT_DIR_ACCESS 0x00 //!< Direct Access (SBC)
|
||||
#define SCSI_INQ_DT_SEQ_ACCESS 0x01 //!< Sequential Access
|
||||
#define SCSI_INQ_DT_PRINTER 0x02 //!< Printer
|
||||
#define SCSI_INQ_DT_PROCESSOR 0x03 //!< Processor device
|
||||
#define SCSI_INQ_DT_WRITE_ONCE 0x04 //!< Write-once device
|
||||
#define SCSI_INQ_DT_CD_DVD 0x05 //!< CD/DVD device
|
||||
#define SCSI_INQ_DT_OPTICAL 0x07 //!< Optical Memory
|
||||
#define SCSI_INQ_DT_MC 0x08 //!< Medium Changer
|
||||
#define SCSI_INQ_DT_ARRAY 0x0C //!< Storage Array Controller
|
||||
#define SCSI_INQ_DT_ENCLOSURE 0x0D //!< Enclosure Services
|
||||
#define SCSI_INQ_DT_RBC 0x0E //!< Simplified Direct Access
|
||||
#define SCSI_INQ_DT_OCRW 0x0F //!< Optical card reader/writer
|
||||
#define SCSI_INQ_DT_BCC 0x10 //!< Bridge Controller Commands
|
||||
#define SCSI_INQ_DT_OSD 0x11 //!< Object-based Storage
|
||||
#define SCSI_INQ_DT_NONE 0x1F //!< No Peripheral
|
||||
uint8_t flags1; //!< Flags (byte 1)
|
||||
#define SCSI_INQ_RMB 0x80 //!< Removable Medium
|
||||
uint8_t version; //!< Version
|
||||
#define SCSI_INQ_VER_NONE 0x00 //!< No standards conformance
|
||||
#define SCSI_INQ_VER_SPC 0x03 //!< SCSI Primary Commands (link to SBC)
|
||||
#define SCSI_INQ_VER_SPC2 0x04 //!< SCSI Primary Commands - 2 (link to SBC-2)
|
||||
#define SCSI_INQ_VER_SPC3 0x05 //!< SCSI Primary Commands - 3 (link to SBC-2)
|
||||
#define SCSI_INQ_VER_SPC4 0x06 //!< SCSI Primary Commands - 4 (link to SBC-3)
|
||||
uint8_t flags3; //!< Flags (byte 3)
|
||||
#define SCSI_INQ_NORMACA 0x20 //!< Normal ACA Supported
|
||||
#define SCSI_INQ_HISUP 0x10 //!< Hierarchal LUN addressing
|
||||
#define SCSI_INQ_RSP_SPC2 0x02 //!< SPC-2 / SPC-3 response format
|
||||
uint8_t addl_len; //!< Additional Length (n-4)
|
||||
#define SCSI_INQ_ADDL_LEN(tot) ((tot)-5) //!< Total length is \a tot
|
||||
uint8_t flags5; //!< Flags (byte 5)
|
||||
#define SCSI_INQ_SCCS 0x80
|
||||
uint8_t flags6; //!< Flags (byte 6)
|
||||
#define SCSI_INQ_BQUE 0x80
|
||||
#define SCSI_INQ_ENCSERV 0x40
|
||||
#define SCSI_INQ_MULTIP 0x10
|
||||
#define SCSI_INQ_MCHGR 0x08
|
||||
#define SCSI_INQ_ADDR16 0x01
|
||||
uint8_t flags7; //!< Flags (byte 7)
|
||||
#define SCSI_INQ_WBUS16 0x20
|
||||
#define SCSI_INQ_SYNC 0x10
|
||||
#define SCSI_INQ_LINKED 0x08
|
||||
#define SCSI_INQ_CMDQUE 0x02
|
||||
uint8_t vendor_id[8]; //!< T10 Vendor Identification
|
||||
uint8_t product_id[16]; //!< Product Identification
|
||||
uint8_t product_rev[4]; //!< Product Revision Level
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief SCSI Standard Request sense data structure
|
||||
*/
|
||||
struct scsi_request_sense_data {
|
||||
/* 1st byte: REQUEST SENSE response flags*/
|
||||
uint8_t valid_reponse_code;
|
||||
#define SCSI_SENSE_VALID 0x80 //!< Indicates the INFORMATION field contains valid information
|
||||
#define SCSI_SENSE_RESPONSE_CODE_MASK 0x7F
|
||||
#define SCSI_SENSE_CURRENT 0x70 //!< Response code 70h (current errors)
|
||||
#define SCSI_SENSE_DEFERRED 0x71
|
||||
/* 1st byte: REQUEST SENSE response flags*/
|
||||
uint8_t valid_reponse_code;
|
||||
#define SCSI_SENSE_VALID 0x80 //!< Indicates the INFORMATION field contains valid information
|
||||
#define SCSI_SENSE_RESPONSE_CODE_MASK 0x7F
|
||||
#define SCSI_SENSE_CURRENT 0x70 //!< Response code 70h (current errors)
|
||||
#define SCSI_SENSE_DEFERRED 0x71
|
||||
|
||||
/* 2nd byte */
|
||||
uint8_t obsolete;
|
||||
/* 2nd byte */
|
||||
uint8_t obsolete;
|
||||
|
||||
/* 3rd byte */
|
||||
uint8_t sense_flag_key;
|
||||
#define SCSI_SENSE_FILEMARK 0x80 //!< Indicates that the current command has read a filemark or setmark.
|
||||
#define SCSI_SENSE_EOM 0x40 //!< Indicates that an end-of-medium condition exists.
|
||||
#define SCSI_SENSE_ILI 0x20 //!< Indicates that the requested logical block length did not match the logical block length of the data on the medium.
|
||||
#define SCSI_SENSE_RESERVED 0x10 //!< Reserved
|
||||
#define SCSI_SENSE_KEY(x) (x&0x0F) //!< Sense Key
|
||||
/* 3rd byte */
|
||||
uint8_t sense_flag_key;
|
||||
#define SCSI_SENSE_FILEMARK 0x80 //!< Indicates that the current command has read a filemark or setmark.
|
||||
#define SCSI_SENSE_EOM 0x40 //!< Indicates that an end-of-medium condition exists.
|
||||
#define SCSI_SENSE_ILI 0x20 //!< Indicates that the requested logical block length did not match the logical block length of the data on the medium.
|
||||
#define SCSI_SENSE_RESERVED 0x10 //!< Reserved
|
||||
#define SCSI_SENSE_KEY(x) (x&0x0F) //!< Sense Key
|
||||
|
||||
/* 4th to 7th bytes - INFORMATION field */
|
||||
uint8_t information[4];
|
||||
/* 4th to 7th bytes - INFORMATION field */
|
||||
uint8_t information[4];
|
||||
|
||||
/* 8th byte - ADDITIONAL SENSE LENGTH field */
|
||||
uint8_t AddSenseLen;
|
||||
#define SCSI_SENSE_ADDL_LEN(total_len) ((total_len) - 8)
|
||||
/* 8th byte - ADDITIONAL SENSE LENGTH field */
|
||||
uint8_t AddSenseLen;
|
||||
#define SCSI_SENSE_ADDL_LEN(total_len) ((total_len) - 8)
|
||||
|
||||
/* 9th to 12th byte - COMMAND-SPECIFIC INFORMATION field */
|
||||
uint8_t CmdSpecINFO[4];
|
||||
/* 9th to 12th byte - COMMAND-SPECIFIC INFORMATION field */
|
||||
uint8_t CmdSpecINFO[4];
|
||||
|
||||
/* 13th byte - ADDITIONAL SENSE CODE field */
|
||||
uint8_t AddSenseCode;
|
||||
/* 13th byte - ADDITIONAL SENSE CODE field */
|
||||
uint8_t AddSenseCode;
|
||||
|
||||
/* 14th byte - ADDITIONAL SENSE CODE QUALIFIER field */
|
||||
uint8_t AddSnsCodeQlfr;
|
||||
/* 14th byte - ADDITIONAL SENSE CODE QUALIFIER field */
|
||||
uint8_t AddSnsCodeQlfr;
|
||||
|
||||
/* 15th byte - FIELD REPLACEABLE UNIT CODE field */
|
||||
uint8_t FldReplUnitCode;
|
||||
/* 15th byte - FIELD REPLACEABLE UNIT CODE field */
|
||||
uint8_t FldReplUnitCode;
|
||||
|
||||
/* 16th byte */
|
||||
uint8_t SenseKeySpec[3];
|
||||
#define SCSI_SENSE_SKSV 0x80 //!< Indicates the SENSE-KEY SPECIFIC field contains valid information
|
||||
/* 16th byte */
|
||||
uint8_t SenseKeySpec[3];
|
||||
#define SCSI_SENSE_SKSV 0x80 //!< Indicates the SENSE-KEY SPECIFIC field contains valid information
|
||||
};
|
||||
|
||||
COMPILER_PACK_RESET()
|
||||
|
||||
/* Vital Product Data page codes */
|
||||
enum scsi_vpd_page_code {
|
||||
SCSI_VPD_SUPPORTED_PAGES = 0x00,
|
||||
SCSI_VPD_UNIT_SERIAL_NUMBER = 0x80,
|
||||
SCSI_VPD_DEVICE_IDENTIFICATION = 0x83,
|
||||
SCSI_VPD_SUPPORTED_PAGES = 0x00,
|
||||
SCSI_VPD_UNIT_SERIAL_NUMBER = 0x80,
|
||||
SCSI_VPD_DEVICE_IDENTIFICATION = 0x83,
|
||||
};
|
||||
#define SCSI_VPD_HEADER_SIZE 4
|
||||
|
||||
@@ -200,37 +200,36 @@ enum scsi_vpd_page_code {
|
||||
|
||||
#define SCSI_VPD_ID_TYPE_T10 1
|
||||
|
||||
|
||||
/* Sense keys */
|
||||
enum scsi_sense_key {
|
||||
SCSI_SK_NO_SENSE = 0x0,
|
||||
SCSI_SK_RECOVERED_ERROR = 0x1,
|
||||
SCSI_SK_NOT_READY = 0x2,
|
||||
SCSI_SK_MEDIUM_ERROR = 0x3,
|
||||
SCSI_SK_HARDWARE_ERROR = 0x4,
|
||||
SCSI_SK_ILLEGAL_REQUEST = 0x5,
|
||||
SCSI_SK_UNIT_ATTENTION = 0x6,
|
||||
SCSI_SK_DATA_PROTECT = 0x7,
|
||||
SCSI_SK_BLANK_CHECK = 0x8,
|
||||
SCSI_SK_VENDOR_SPECIFIC = 0x9,
|
||||
SCSI_SK_COPY_ABORTED = 0xA,
|
||||
SCSI_SK_ABORTED_COMMAND = 0xB,
|
||||
SCSI_SK_VOLUME_OVERFLOW = 0xD,
|
||||
SCSI_SK_MISCOMPARE = 0xE,
|
||||
SCSI_SK_NO_SENSE = 0x0,
|
||||
SCSI_SK_RECOVERED_ERROR = 0x1,
|
||||
SCSI_SK_NOT_READY = 0x2,
|
||||
SCSI_SK_MEDIUM_ERROR = 0x3,
|
||||
SCSI_SK_HARDWARE_ERROR = 0x4,
|
||||
SCSI_SK_ILLEGAL_REQUEST = 0x5,
|
||||
SCSI_SK_UNIT_ATTENTION = 0x6,
|
||||
SCSI_SK_DATA_PROTECT = 0x7,
|
||||
SCSI_SK_BLANK_CHECK = 0x8,
|
||||
SCSI_SK_VENDOR_SPECIFIC = 0x9,
|
||||
SCSI_SK_COPY_ABORTED = 0xA,
|
||||
SCSI_SK_ABORTED_COMMAND = 0xB,
|
||||
SCSI_SK_VOLUME_OVERFLOW = 0xD,
|
||||
SCSI_SK_MISCOMPARE = 0xE,
|
||||
};
|
||||
|
||||
/* Additional Sense Code / Additional Sense Code Qualifier pairs */
|
||||
enum scsi_asc_ascq {
|
||||
SCSI_ASC_NO_ADDITIONAL_SENSE_INFO = 0x0000,
|
||||
SCSI_ASC_LU_NOT_READY_REBUILD_IN_PROGRESS = 0x0405,
|
||||
SCSI_ASC_WRITE_ERROR = 0x0C00,
|
||||
SCSI_ASC_UNRECOVERED_READ_ERROR = 0x1100,
|
||||
SCSI_ASC_INVALID_COMMAND_OPERATION_CODE = 0x2000,
|
||||
SCSI_ASC_INVALID_FIELD_IN_CDB = 0x2400,
|
||||
SCSI_ASC_WRITE_PROTECTED = 0x2700,
|
||||
SCSI_ASC_NOT_READY_TO_READY_CHANGE = 0x2800,
|
||||
SCSI_ASC_MEDIUM_NOT_PRESENT = 0x3A00,
|
||||
SCSI_ASC_INTERNAL_TARGET_FAILURE = 0x4400,
|
||||
SCSI_ASC_NO_ADDITIONAL_SENSE_INFO = 0x0000,
|
||||
SCSI_ASC_LU_NOT_READY_REBUILD_IN_PROGRESS = 0x0405,
|
||||
SCSI_ASC_WRITE_ERROR = 0x0C00,
|
||||
SCSI_ASC_UNRECOVERED_READ_ERROR = 0x1100,
|
||||
SCSI_ASC_INVALID_COMMAND_OPERATION_CODE = 0x2000,
|
||||
SCSI_ASC_INVALID_FIELD_IN_CDB = 0x2400,
|
||||
SCSI_ASC_WRITE_PROTECTED = 0x2700,
|
||||
SCSI_ASC_NOT_READY_TO_READY_CHANGE = 0x2800,
|
||||
SCSI_ASC_MEDIUM_NOT_PRESENT = 0x3A00,
|
||||
SCSI_ASC_INTERNAL_TARGET_FAILURE = 0x4400,
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -240,9 +239,9 @@ enum scsi_asc_ascq {
|
||||
* that are applicable to all SCSI devices.
|
||||
*/
|
||||
enum scsi_spc_mode {
|
||||
SCSI_MS_MODE_VENDOR_SPEC = 0x00,
|
||||
SCSI_MS_MODE_INFEXP = 0x1C, // Informational exceptions control page
|
||||
SCSI_MS_MODE_ALL = 0x3F,
|
||||
SCSI_MS_MODE_VENDOR_SPEC = 0x00,
|
||||
SCSI_MS_MODE_INFEXP = 0x1C, // Informational exceptions control page
|
||||
SCSI_MS_MODE_ALL = 0x3F,
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -250,51 +249,45 @@ enum scsi_spc_mode {
|
||||
* See chapter 8.3.8
|
||||
*/
|
||||
struct spc_control_page_info_execpt {
|
||||
uint8_t page_code;
|
||||
uint8_t page_length;
|
||||
#define SPC_MP_INFEXP_PAGE_LENGTH 0x0A
|
||||
uint8_t flags1;
|
||||
#define SPC_MP_INFEXP_PERF (1<<7) //!< Initiator Control
|
||||
#define SPC_MP_INFEXP_EBF (1<<5) //!< Caching Analysis Permitted
|
||||
#define SPC_MP_INFEXP_EWASC (1<<4) //!< Discontinuity
|
||||
#define SPC_MP_INFEXP_DEXCPT (1<<3) //!< Size enable
|
||||
#define SPC_MP_INFEXP_TEST (1<<2) //!< Writeback Cache Enable
|
||||
#define SPC_MP_INFEXP_LOGERR (1<<0) //!< Log errors bit
|
||||
uint8_t mrie;
|
||||
#define SPC_MP_INFEXP_MRIE_NO_REPORT 0x00
|
||||
#define SPC_MP_INFEXP_MRIE_ASYNC_EVENT 0x01
|
||||
#define SPC_MP_INFEXP_MRIE_GEN_UNIT 0x02
|
||||
#define SPC_MP_INFEXP_MRIE_COND_RECOV_ERROR 0x03
|
||||
#define SPC_MP_INFEXP_MRIE_UNCOND_RECOV_ERROR 0x04
|
||||
#define SPC_MP_INFEXP_MRIE_NO_SENSE 0x05
|
||||
#define SPC_MP_INFEXP_MRIE_ONLY_REPORT 0x06
|
||||
be32_t interval_timer;
|
||||
be32_t report_count;
|
||||
uint8_t page_code;
|
||||
uint8_t page_length;
|
||||
#define SPC_MP_INFEXP_PAGE_LENGTH 0x0A
|
||||
uint8_t flags1;
|
||||
#define SPC_MP_INFEXP_PERF (1<<7) //!< Initiator Control
|
||||
#define SPC_MP_INFEXP_EBF (1<<5) //!< Caching Analysis Permitted
|
||||
#define SPC_MP_INFEXP_EWASC (1<<4) //!< Discontinuity
|
||||
#define SPC_MP_INFEXP_DEXCPT (1<<3) //!< Size enable
|
||||
#define SPC_MP_INFEXP_TEST (1<<2) //!< Writeback Cache Enable
|
||||
#define SPC_MP_INFEXP_LOGERR (1<<0) //!< Log errors bit
|
||||
uint8_t mrie;
|
||||
#define SPC_MP_INFEXP_MRIE_NO_REPORT 0x00
|
||||
#define SPC_MP_INFEXP_MRIE_ASYNC_EVENT 0x01
|
||||
#define SPC_MP_INFEXP_MRIE_GEN_UNIT 0x02
|
||||
#define SPC_MP_INFEXP_MRIE_COND_RECOV_ERROR 0x03
|
||||
#define SPC_MP_INFEXP_MRIE_UNCOND_RECOV_ERROR 0x04
|
||||
#define SPC_MP_INFEXP_MRIE_NO_SENSE 0x05
|
||||
#define SPC_MP_INFEXP_MRIE_ONLY_REPORT 0x06
|
||||
be32_t interval_timer;
|
||||
be32_t report_count;
|
||||
};
|
||||
|
||||
|
||||
enum scsi_spc_mode_sense_pc {
|
||||
SCSI_MS_SENSE_PC_CURRENT = 0,
|
||||
SCSI_MS_SENSE_PC_CHANGEABLE = 1,
|
||||
SCSI_MS_SENSE_PC_DEFAULT = 2,
|
||||
SCSI_MS_SENSE_PC_SAVED = 3,
|
||||
SCSI_MS_SENSE_PC_CURRENT = 0,
|
||||
SCSI_MS_SENSE_PC_CHANGEABLE = 1,
|
||||
SCSI_MS_SENSE_PC_DEFAULT = 2,
|
||||
SCSI_MS_SENSE_PC_SAVED = 3,
|
||||
};
|
||||
|
||||
|
||||
|
||||
static inline bool scsi_mode_sense_dbd_is_set(const uint8_t * cdb)
|
||||
{
|
||||
return (cdb[1] >> 3) & 1;
|
||||
static inline bool scsi_mode_sense_dbd_is_set(const uint8_t * cdb) {
|
||||
return (cdb[1] >> 3) & 1;
|
||||
}
|
||||
|
||||
static inline uint8_t scsi_mode_sense_get_page_code(const uint8_t * cdb)
|
||||
{
|
||||
return cdb[2] & 0x3F;
|
||||
static inline uint8_t scsi_mode_sense_get_page_code(const uint8_t * cdb) {
|
||||
return cdb[2] & 0x3F;
|
||||
}
|
||||
|
||||
static inline uint8_t scsi_mode_sense_get_pc(const uint8_t * cdb)
|
||||
{
|
||||
return cdb[2] >> 6;
|
||||
static inline uint8_t scsi_mode_sense_get_pc(const uint8_t * cdb) {
|
||||
return cdb[2] >> 6;
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -302,10 +295,10 @@ static inline uint8_t scsi_mode_sense_get_pc(const uint8_t * cdb)
|
||||
* SENSE(6)
|
||||
*/
|
||||
struct scsi_mode_param_header6 {
|
||||
uint8_t mode_data_length; //!< Number of bytes after this
|
||||
uint8_t medium_type; //!< Medium Type
|
||||
uint8_t device_specific_parameter; //!< Defined by command set
|
||||
uint8_t block_descriptor_length; //!< Length of block descriptors
|
||||
uint8_t mode_data_length; //!< Number of bytes after this
|
||||
uint8_t medium_type; //!< Medium Type
|
||||
uint8_t device_specific_parameter; //!< Defined by command set
|
||||
uint8_t block_descriptor_length; //!< Length of block descriptors
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -313,23 +306,23 @@ struct scsi_mode_param_header6 {
|
||||
* SENSE(10)
|
||||
*/
|
||||
struct scsi_mode_param_header10 {
|
||||
be16_t mode_data_length; //!< Number of bytes after this
|
||||
uint8_t medium_type; //!< Medium Type
|
||||
uint8_t device_specific_parameter; //!< Defined by command set
|
||||
uint8_t flags4; //!< LONGLBA in bit 0
|
||||
uint8_t reserved;
|
||||
be16_t block_descriptor_length; //!< Length of block descriptors
|
||||
be16_t mode_data_length; //!< Number of bytes after this
|
||||
uint8_t medium_type; //!< Medium Type
|
||||
uint8_t device_specific_parameter; //!< Defined by command set
|
||||
uint8_t flags4; //!< LONGLBA in bit 0
|
||||
uint8_t reserved;
|
||||
be16_t block_descriptor_length; //!< Length of block descriptors
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief SCSI Page_0 Mode Page header (SPF not set)
|
||||
*/
|
||||
struct scsi_mode_page_0_header {
|
||||
uint8_t page_code;
|
||||
#define SCSI_PAGE_CODE_PS (1 << 7) //!< Parameters Saveable
|
||||
#define SCSI_PAGE_CODE_SPF (1 << 6) //!< SubPage Format
|
||||
uint8_t page_length; //!< Number of bytes after this
|
||||
#define SCSI_MS_PAGE_LEN(total) ((total) - 2)
|
||||
uint8_t page_code;
|
||||
#define SCSI_PAGE_CODE_PS (1 << 7) //!< Parameters Saveable
|
||||
#define SCSI_PAGE_CODE_SPF (1 << 6) //!< SubPage Format
|
||||
uint8_t page_length; //!< Number of bytes after this
|
||||
#define SCSI_MS_PAGE_LEN(total) ((total) - 2)
|
||||
};
|
||||
|
||||
//@}
|
||||
|
@@ -71,7 +71,7 @@
|
||||
* \subsection sysclk_quickstart_use_case_1_setup_steps Initialization code
|
||||
* Add to the application initialization code:
|
||||
* \code
|
||||
sysclk_init();
|
||||
sysclk_init();
|
||||
\endcode
|
||||
*
|
||||
* \subsection sysclk_quickstart_use_case_1_setup_steps_workflow Workflow
|
||||
@@ -82,15 +82,15 @@
|
||||
* Add or uncomment the following in your conf_clock.h header file, commenting out all other
|
||||
* definitions of the same symbol(s):
|
||||
* \code
|
||||
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLLACK
|
||||
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLLACK
|
||||
|
||||
// Fpll0 = (Fclk * PLL_mul) / PLL_div
|
||||
#define CONFIG_PLL0_SOURCE PLL_SRC_MAINCK_XTAL
|
||||
#define CONFIG_PLL0_MUL (84000000UL / BOARD_FREQ_MAINCK_XTAL)
|
||||
#define CONFIG_PLL0_DIV 1
|
||||
// Fpll0 = (Fclk * PLL_mul) / PLL_div
|
||||
#define CONFIG_PLL0_SOURCE PLL_SRC_MAINCK_XTAL
|
||||
#define CONFIG_PLL0_MUL (84000000UL / BOARD_FREQ_MAINCK_XTAL)
|
||||
#define CONFIG_PLL0_DIV 1
|
||||
|
||||
// Fbus = Fsys / BUS_div
|
||||
#define CONFIG_SYSCLK_PRES SYSCLK_PRES_1
|
||||
// Fbus = Fsys / BUS_div
|
||||
#define CONFIG_SYSCLK_PRES SYSCLK_PRES_1
|
||||
\endcode
|
||||
*
|
||||
* \subsection sysclk_quickstart_use_case_1_example_workflow Workflow
|
||||
@@ -100,14 +100,14 @@
|
||||
* \code #define CONFIG_PLL0_SOURCE PLL_SRC_MAINCK_XTAL \endcode
|
||||
* -# Configure the PLL module to multiply the external fast crystal oscillator frequency up to 84MHz:
|
||||
* \code
|
||||
#define CONFIG_PLL0_MUL (84000000UL / BOARD_FREQ_MAINCK_XTAL)
|
||||
#define CONFIG_PLL0_DIV 1
|
||||
#define CONFIG_PLL0_MUL (84000000UL / BOARD_FREQ_MAINCK_XTAL)
|
||||
#define CONFIG_PLL0_DIV 1
|
||||
\endcode
|
||||
* \note For user boards, \c BOARD_FREQ_MAINCK_XTAL should be defined in the board \c conf_board.h configuration
|
||||
* file as the frequency of the fast crystal attached to the microcontroller.
|
||||
* -# Configure the main clock to run at the full 84MHz, disable scaling of the main system clock speed:
|
||||
* \code
|
||||
#define CONFIG_SYSCLK_PRES SYSCLK_PRES_1
|
||||
#define CONFIG_SYSCLK_PRES SYSCLK_PRES_1
|
||||
\endcode
|
||||
* \note Some dividers are powers of two, while others are integer division factors. Refer to the
|
||||
* formulas in the conf_clock.h template commented above each division define.
|
||||
@@ -136,7 +136,7 @@ extern "C" {
|
||||
* initialization.
|
||||
*/
|
||||
#ifndef CONFIG_SYSCLK_SOURCE
|
||||
# define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_4M_RC
|
||||
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_4M_RC
|
||||
#endif
|
||||
/**
|
||||
* \def CONFIG_SYSCLK_PRES
|
||||
@@ -149,7 +149,7 @@ extern "C" {
|
||||
* after initialization.
|
||||
*/
|
||||
#ifndef CONFIG_SYSCLK_PRES
|
||||
# define CONFIG_SYSCLK_PRES 0
|
||||
#define CONFIG_SYSCLK_PRES 0
|
||||
#endif
|
||||
|
||||
//@}
|
||||
@@ -197,7 +197,7 @@ extern "C" {
|
||||
* USB is not required.
|
||||
*/
|
||||
#ifdef __DOXYGEN__
|
||||
# define CONFIG_USBCLK_SOURCE
|
||||
#define CONFIG_USBCLK_SOURCE
|
||||
#endif
|
||||
|
||||
/**
|
||||
@@ -209,10 +209,9 @@ extern "C" {
|
||||
* defined.
|
||||
*/
|
||||
#ifdef __DOXYGEN__
|
||||
# define CONFIG_USBCLK_DIV
|
||||
#define CONFIG_USBCLK_DIV
|
||||
#endif
|
||||
|
||||
|
||||
extern void sysclk_enable_usb(void);
|
||||
extern void sysclk_disable_usb(void);
|
||||
|
||||
|
@@ -83,7 +83,6 @@ static usb_iface_desc_t UDC_DESC_STORAGE *udc_ptr_iface;
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
//! \name Internal structure to store the USB device main strings
|
||||
//! @{
|
||||
|
||||
|
@@ -144,15 +144,15 @@ extern "C" {
|
||||
* \code #define USB_DEVICE_ATTACH_AUTO_DISABLE \endcode
|
||||
* User C file contains:
|
||||
* \code
|
||||
// Authorize VBUS monitoring
|
||||
if (!udc_include_vbus_monitoring()) {
|
||||
// Implement custom VBUS monitoring via GPIO or other
|
||||
}
|
||||
Event_VBUS_present() // VBUS interrupt or GPIO interrupt or other
|
||||
{
|
||||
// Attach USB Device
|
||||
udc_attach();
|
||||
}
|
||||
// Authorize VBUS monitoring
|
||||
if (!udc_include_vbus_monitoring()) {
|
||||
// Implement custom VBUS monitoring via GPIO or other
|
||||
}
|
||||
Event_VBUS_present() // VBUS interrupt or GPIO interrupt or other
|
||||
{
|
||||
// Attach USB Device
|
||||
udc_attach();
|
||||
}
|
||||
\endcode
|
||||
*
|
||||
* - Case of battery charging. conf_usb.h file contains define
|
||||
@@ -160,21 +160,20 @@ extern "C" {
|
||||
* \code #define USB_DEVICE_ATTACH_AUTO_DISABLE \endcode
|
||||
* User C file contains:
|
||||
* \code
|
||||
Event VBUS present() // VBUS interrupt or GPIO interrupt or ..
|
||||
{
|
||||
// Authorize battery charging, but wait key press to start USB.
|
||||
}
|
||||
Event Key press()
|
||||
{
|
||||
// Stop batteries charging
|
||||
// Start USB
|
||||
udc_attach();
|
||||
}
|
||||
Event VBUS present() // VBUS interrupt or GPIO interrupt or ..
|
||||
{
|
||||
// Authorize battery charging, but wait key press to start USB.
|
||||
}
|
||||
Event Key press()
|
||||
{
|
||||
// Stop batteries charging
|
||||
// Start USB
|
||||
udc_attach();
|
||||
}
|
||||
\endcode
|
||||
*/
|
||||
static inline bool udc_include_vbus_monitoring(void)
|
||||
{
|
||||
return udd_include_vbus_monitoring();
|
||||
static inline bool udc_include_vbus_monitoring(void) {
|
||||
return udd_include_vbus_monitoring();
|
||||
}
|
||||
|
||||
/*! \brief Start the USB Device stack
|
||||
@@ -192,32 +191,26 @@ void udc_stop(void);
|
||||
* then it will attach device when an acceptable Vbus
|
||||
* level from the host is detected.
|
||||
*/
|
||||
static inline void udc_attach(void)
|
||||
{
|
||||
udd_attach();
|
||||
static inline void udc_attach(void) {
|
||||
udd_attach();
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* \brief Detaches the device from the bus
|
||||
*
|
||||
* The driver must remove pull-up on USB line D- or D+.
|
||||
*/
|
||||
static inline void udc_detach(void)
|
||||
{
|
||||
udd_detach();
|
||||
static inline void udc_detach(void) {
|
||||
udd_detach();
|
||||
}
|
||||
|
||||
|
||||
/*! \brief The USB driver sends a resume signal called \e "Upstream Resume"
|
||||
* This is authorized only when the remote wakeup feature is enabled by host.
|
||||
*/
|
||||
static inline void udc_remotewakeup(void)
|
||||
{
|
||||
udd_send_remotewakeup();
|
||||
static inline void udc_remotewakeup(void) {
|
||||
udd_send_remotewakeup();
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* \brief Returns a pointer on the current interface descriptor
|
||||
*
|
||||
@@ -296,23 +289,23 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
|
||||
*
|
||||
* for AVR and SAM3/4 devices, add to the initialization code:
|
||||
* \code
|
||||
sysclk_init();
|
||||
irq_initialize_vectors();
|
||||
cpu_irq_enable();
|
||||
board_init();
|
||||
sleepmgr_init(); // Optional
|
||||
sysclk_init();
|
||||
irq_initialize_vectors();
|
||||
cpu_irq_enable();
|
||||
board_init();
|
||||
sleepmgr_init(); // Optional
|
||||
\endcode
|
||||
*
|
||||
* For SAMD devices, add to the initialization code:
|
||||
* \code
|
||||
system_init();
|
||||
irq_initialize_vectors();
|
||||
cpu_irq_enable();
|
||||
sleepmgr_init(); // Optional
|
||||
system_init();
|
||||
irq_initialize_vectors();
|
||||
cpu_irq_enable();
|
||||
sleepmgr_init(); // Optional
|
||||
\endcode
|
||||
* Add to the main IDLE loop:
|
||||
* \code
|
||||
sleepmgr_enter_sleep(); // Optional
|
||||
sleepmgr_enter_sleep(); // Optional
|
||||
\endcode
|
||||
*
|
||||
*/
|
||||
@@ -324,20 +317,20 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
|
||||
*
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#define USB_DEVICE_VENDOR_ID 0x03EB
|
||||
#define USB_DEVICE_PRODUCT_ID 0xXXXX
|
||||
#define USB_DEVICE_MAJOR_VERSION 1
|
||||
#define USB_DEVICE_MINOR_VERSION 0
|
||||
#define USB_DEVICE_POWER 100
|
||||
#define USB_DEVICE_ATTR USB_CONFIG_ATTR_BUS_POWERED
|
||||
#define USB_DEVICE_VENDOR_ID 0x03EB
|
||||
#define USB_DEVICE_PRODUCT_ID 0xXXXX
|
||||
#define USB_DEVICE_MAJOR_VERSION 1
|
||||
#define USB_DEVICE_MINOR_VERSION 0
|
||||
#define USB_DEVICE_POWER 100
|
||||
#define USB_DEVICE_ATTR USB_CONFIG_ATTR_BUS_POWERED
|
||||
\endcode
|
||||
*
|
||||
* Add to application C-file:
|
||||
* \code
|
||||
void usb_init(void)
|
||||
{
|
||||
udc_start();
|
||||
}
|
||||
void usb_init(void)
|
||||
{
|
||||
udc_start();
|
||||
}
|
||||
\endcode
|
||||
*/
|
||||
|
||||
@@ -349,17 +342,17 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
|
||||
* -# Ensure that conf_usb.h is available and contains the following configuration
|
||||
* which is the main USB device configuration:
|
||||
* - \code // Vendor ID provided by USB org (ATMEL 0x03EB)
|
||||
#define USB_DEVICE_VENDOR_ID 0x03EB // Type Word
|
||||
// Product ID (Atmel PID referenced in usb_atmel.h)
|
||||
#define USB_DEVICE_PRODUCT_ID 0xXXXX // Type Word
|
||||
// Major version of the device
|
||||
#define USB_DEVICE_MAJOR_VERSION 1 // Type Byte
|
||||
// Minor version of the device
|
||||
#define USB_DEVICE_MINOR_VERSION 0 // Type Byte
|
||||
// Maximum device power (mA)
|
||||
#define USB_DEVICE_POWER 100 // Type 9-bits
|
||||
// USB attributes to enable features
|
||||
#define USB_DEVICE_ATTR USB_CONFIG_ATTR_BUS_POWERED // Flags \endcode
|
||||
#define USB_DEVICE_VENDOR_ID 0x03EB // Type Word
|
||||
// Product ID (Atmel PID referenced in usb_atmel.h)
|
||||
#define USB_DEVICE_PRODUCT_ID 0xXXXX // Type Word
|
||||
// Major version of the device
|
||||
#define USB_DEVICE_MAJOR_VERSION 1 // Type Byte
|
||||
// Minor version of the device
|
||||
#define USB_DEVICE_MINOR_VERSION 0 // Type Byte
|
||||
// Maximum device power (mA)
|
||||
#define USB_DEVICE_POWER 100 // Type 9-bits
|
||||
// USB attributes to enable features
|
||||
#define USB_DEVICE_ATTR USB_CONFIG_ATTR_BUS_POWERED // Flags \endcode
|
||||
* -# Call the USB device stack start function to enable stack and start USB:
|
||||
* - \code udc_start(); \endcode
|
||||
* \note In case of USB dual roles (Device and Host) managed through USB OTG connector
|
||||
@@ -372,90 +365,90 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
|
||||
*
|
||||
* Content of XMEGA conf_clock.h:
|
||||
* \code
|
||||
// Configuration based on internal RC:
|
||||
// USB clock need of 48Mhz
|
||||
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC
|
||||
#define CONFIG_OSC_RC32_CAL 48000000UL
|
||||
#define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC OSC_ID_USBSOF
|
||||
// CPU clock need of clock > 12MHz to run with USB (Here 24MHz)
|
||||
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC32MHZ
|
||||
#define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_2
|
||||
#define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_1
|
||||
// Configuration based on internal RC:
|
||||
// USB clock need of 48Mhz
|
||||
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC
|
||||
#define CONFIG_OSC_RC32_CAL 48000000UL
|
||||
#define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC OSC_ID_USBSOF
|
||||
// CPU clock need of clock > 12MHz to run with USB (Here 24MHz)
|
||||
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC32MHZ
|
||||
#define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_2
|
||||
#define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_1
|
||||
\endcode
|
||||
*
|
||||
* Content of conf_clock.h for AT32UC3A0, AT32UC3A1, AT32UC3B devices (USBB):
|
||||
* \code
|
||||
// Configuration based on 12MHz external OSC:
|
||||
#define CONFIG_PLL1_SOURCE PLL_SRC_OSC0
|
||||
#define CONFIG_PLL1_MUL 8
|
||||
#define CONFIG_PLL1_DIV 2
|
||||
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1
|
||||
#define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div)
|
||||
// Configuration based on 12MHz external OSC:
|
||||
#define CONFIG_PLL1_SOURCE PLL_SRC_OSC0
|
||||
#define CONFIG_PLL1_MUL 8
|
||||
#define CONFIG_PLL1_DIV 2
|
||||
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1
|
||||
#define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div)
|
||||
\endcode
|
||||
*
|
||||
* Content of conf_clock.h for AT32UC3A3, AT32UC3A4 devices (USBB with high speed support):
|
||||
* \code
|
||||
// Configuration based on 12MHz external OSC:
|
||||
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_OSC0
|
||||
#define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div)
|
||||
// Configuration based on 12MHz external OSC:
|
||||
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_OSC0
|
||||
#define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div)
|
||||
\endcode
|
||||
*
|
||||
* Content of conf_clock.h for AT32UC3C, ATUCXXD, ATUCXXL3U, ATUCXXL4U devices (USBC):
|
||||
* \code
|
||||
// Configuration based on 12MHz external OSC:
|
||||
#define CONFIG_PLL1_SOURCE PLL_SRC_OSC0
|
||||
#define CONFIG_PLL1_MUL 8
|
||||
#define CONFIG_PLL1_DIV 2
|
||||
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1
|
||||
#define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div)
|
||||
// CPU clock need of clock > 25MHz to run with USBC
|
||||
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL1
|
||||
// Configuration based on 12MHz external OSC:
|
||||
#define CONFIG_PLL1_SOURCE PLL_SRC_OSC0
|
||||
#define CONFIG_PLL1_MUL 8
|
||||
#define CONFIG_PLL1_DIV 2
|
||||
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1
|
||||
#define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div)
|
||||
// CPU clock need of clock > 25MHz to run with USBC
|
||||
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL1
|
||||
\endcode
|
||||
*
|
||||
* Content of conf_clock.h for SAM3S, SAM3SD, SAM4S devices (UPD: USB Peripheral Device):
|
||||
* \code
|
||||
// PLL1 (B) Options (Fpll = (Fclk * PLL_mul) / PLL_div)
|
||||
#define CONFIG_PLL1_SOURCE PLL_SRC_MAINCK_XTAL
|
||||
#define CONFIG_PLL1_MUL 16
|
||||
#define CONFIG_PLL1_DIV 2
|
||||
// USB Clock Source Options (Fusb = FpllX / USB_div)
|
||||
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1
|
||||
#define CONFIG_USBCLK_DIV 2
|
||||
// PLL1 (B) Options (Fpll = (Fclk * PLL_mul) / PLL_div)
|
||||
#define CONFIG_PLL1_SOURCE PLL_SRC_MAINCK_XTAL
|
||||
#define CONFIG_PLL1_MUL 16
|
||||
#define CONFIG_PLL1_DIV 2
|
||||
// USB Clock Source Options (Fusb = FpllX / USB_div)
|
||||
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1
|
||||
#define CONFIG_USBCLK_DIV 2
|
||||
\endcode
|
||||
*
|
||||
* Content of conf_clock.h for SAM3U device (UPDHS: USB Peripheral Device High Speed):
|
||||
* \code
|
||||
// USB Clock Source fixed at UPLL.
|
||||
// USB Clock Source fixed at UPLL.
|
||||
\endcode
|
||||
*
|
||||
* Content of conf_clock.h for SAM3X, SAM3A devices (UOTGHS: USB OTG High Speed):
|
||||
* \code
|
||||
// USB Clock Source fixed at UPLL.
|
||||
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_UPLL
|
||||
#define CONFIG_USBCLK_DIV 1
|
||||
// USB Clock Source fixed at UPLL.
|
||||
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_UPLL
|
||||
#define CONFIG_USBCLK_DIV 1
|
||||
\endcode
|
||||
*
|
||||
* Content of conf_clocks.h for SAMD devices (USB):
|
||||
* \code
|
||||
// System clock bus configuration
|
||||
# define CONF_CLOCK_FLASH_WAIT_STATES 2
|
||||
// System clock bus configuration
|
||||
# define CONF_CLOCK_FLASH_WAIT_STATES 2
|
||||
|
||||
// USB Clock Source fixed at DFLL.
|
||||
// SYSTEM_CLOCK_SOURCE_DFLL configuration - Digital Frequency Locked Loop
|
||||
# define CONF_CLOCK_DFLL_ENABLE true
|
||||
# define CONF_CLOCK_DFLL_LOOP_MODE SYSTEM_CLOCK_DFLL_LOOP_MODE_USB_RECOVERY
|
||||
# define CONF_CLOCK_DFLL_ON_DEMAND true
|
||||
// USB Clock Source fixed at DFLL.
|
||||
// SYSTEM_CLOCK_SOURCE_DFLL configuration - Digital Frequency Locked Loop
|
||||
# define CONF_CLOCK_DFLL_ENABLE true
|
||||
# define CONF_CLOCK_DFLL_LOOP_MODE SYSTEM_CLOCK_DFLL_LOOP_MODE_USB_RECOVERY
|
||||
# define CONF_CLOCK_DFLL_ON_DEMAND true
|
||||
|
||||
// Set this to true to configure the GCLK when running clocks_init.
|
||||
// If set to false, none of the GCLK generators will be configured in clocks_init().
|
||||
# define CONF_CLOCK_CONFIGURE_GCLK true
|
||||
// Set this to true to configure the GCLK when running clocks_init.
|
||||
// If set to false, none of the GCLK generators will be configured in clocks_init().
|
||||
# define CONF_CLOCK_CONFIGURE_GCLK true
|
||||
|
||||
// Configure GCLK generator 0 (Main Clock)
|
||||
# define CONF_CLOCK_GCLK_0_ENABLE true
|
||||
# define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY true
|
||||
# define CONF_CLOCK_GCLK_0_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_DFLL
|
||||
# define CONF_CLOCK_GCLK_0_PRESCALER 1
|
||||
# define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE false
|
||||
// Configure GCLK generator 0 (Main Clock)
|
||||
# define CONF_CLOCK_GCLK_0_ENABLE true
|
||||
# define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY true
|
||||
# define CONF_CLOCK_GCLK_0_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_DFLL
|
||||
# define CONF_CLOCK_GCLK_0_PRESCALER 1
|
||||
# define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE false
|
||||
\endcode
|
||||
*/
|
||||
|
||||
@@ -474,34 +467,34 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
|
||||
* \subsection udc_use_case_1_usage_code Example code
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#if // Low speed
|
||||
#define USB_DEVICE_LOW_SPEED
|
||||
// #define USB_DEVICE_HS_SUPPORT
|
||||
#if // Low speed
|
||||
#define USB_DEVICE_LOW_SPEED
|
||||
// #define USB_DEVICE_HS_SUPPORT
|
||||
|
||||
#elif // Full speed
|
||||
// #define USB_DEVICE_LOW_SPEED
|
||||
// #define USB_DEVICE_HS_SUPPORT
|
||||
#elif // Full speed
|
||||
// #define USB_DEVICE_LOW_SPEED
|
||||
// #define USB_DEVICE_HS_SUPPORT
|
||||
|
||||
#elif // High speed
|
||||
// #define USB_DEVICE_LOW_SPEED
|
||||
#define USB_DEVICE_HS_SUPPORT
|
||||
#elif // High speed
|
||||
// #define USB_DEVICE_LOW_SPEED
|
||||
#define USB_DEVICE_HS_SUPPORT
|
||||
|
||||
#endif
|
||||
#endif
|
||||
\endcode
|
||||
*
|
||||
* \subsection udc_use_case_1_usage_flow Workflow
|
||||
* -# Ensure that conf_usb.h is available and contains the following parameters
|
||||
* required for a USB device low speed (1.5Mbit/s):
|
||||
* - \code #define USB_DEVICE_LOW_SPEED
|
||||
//#define USB_DEVICE_HS_SUPPORT \endcode
|
||||
//#define USB_DEVICE_HS_SUPPORT \endcode
|
||||
* -# Ensure that conf_usb.h contains the following parameters
|
||||
* required for a USB device full speed (12Mbit/s):
|
||||
* - \code //#define USB_DEVICE_LOW_SPEED
|
||||
//#define USB_DEVICE_HS_SUPPORT \endcode
|
||||
//#define USB_DEVICE_HS_SUPPORT \endcode
|
||||
* -# Ensure that conf_usb.h contains the following parameters
|
||||
* required for a USB device high speed (480Mbit/s):
|
||||
* - \code //#define USB_DEVICE_LOW_SPEED
|
||||
#define USB_DEVICE_HS_SUPPORT \endcode
|
||||
#define USB_DEVICE_HS_SUPPORT \endcode
|
||||
*/
|
||||
|
||||
/**
|
||||
@@ -518,20 +511,20 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
|
||||
* \subsection udc_use_case_2_usage_code Example code
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#define USB_DEVICE_MANUFACTURE_NAME "Manufacture name"
|
||||
#define USB_DEVICE_PRODUCT_NAME "Product name"
|
||||
#define USB_DEVICE_SERIAL_NAME "12...EF"
|
||||
#define USB_DEVICE_MANUFACTURE_NAME "Manufacture name"
|
||||
#define USB_DEVICE_PRODUCT_NAME "Product name"
|
||||
#define USB_DEVICE_SERIAL_NAME "12...EF"
|
||||
\endcode
|
||||
*
|
||||
* \subsection udc_use_case_2_usage_flow Workflow
|
||||
* -# Ensure that conf_usb.h is available and contains the following parameters
|
||||
* required to enable different USB strings:
|
||||
* - \code // Static ASCII name for the manufacture
|
||||
#define USB_DEVICE_MANUFACTURE_NAME "Manufacture name" \endcode
|
||||
#define USB_DEVICE_MANUFACTURE_NAME "Manufacture name" \endcode
|
||||
* - \code // Static ASCII name for the product
|
||||
#define USB_DEVICE_PRODUCT_NAME "Product name" \endcode
|
||||
#define USB_DEVICE_PRODUCT_NAME "Product name" \endcode
|
||||
* - \code // Static ASCII name to enable and set a serial number
|
||||
#define USB_DEVICE_SERIAL_NAME "12...EF" \endcode
|
||||
#define USB_DEVICE_SERIAL_NAME "12...EF" \endcode
|
||||
*/
|
||||
|
||||
/**
|
||||
@@ -548,42 +541,42 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
|
||||
* \subsection udc_use_case_3_usage_code Example code
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#define USB_DEVICE_ATTR \
|
||||
(USB_CONFIG_ATTR_REMOTE_WAKEUP | USB_CONFIG_ATTR_..._POWERED)
|
||||
#define UDC_REMOTEWAKEUP_ENABLE() my_callback_remotewakeup_enable()
|
||||
extern void my_callback_remotewakeup_enable(void);
|
||||
#define UDC_REMOTEWAKEUP_DISABLE() my_callback_remotewakeup_disable()
|
||||
extern void my_callback_remotewakeup_disable(void);
|
||||
#define USB_DEVICE_ATTR \
|
||||
(USB_CONFIG_ATTR_REMOTE_WAKEUP | USB_CONFIG_ATTR_..._POWERED)
|
||||
#define UDC_REMOTEWAKEUP_ENABLE() my_callback_remotewakeup_enable()
|
||||
extern void my_callback_remotewakeup_enable(void);
|
||||
#define UDC_REMOTEWAKEUP_DISABLE() my_callback_remotewakeup_disable()
|
||||
extern void my_callback_remotewakeup_disable(void);
|
||||
\endcode
|
||||
*
|
||||
* Add to application C-file:
|
||||
* \code
|
||||
void my_callback_remotewakeup_enable(void)
|
||||
{
|
||||
// Enable application wakeup events (e.g. enable GPIO interrupt)
|
||||
}
|
||||
void my_callback_remotewakeup_disable(void)
|
||||
{
|
||||
// Disable application wakeup events (e.g. disable GPIO interrupt)
|
||||
}
|
||||
void my_callback_remotewakeup_enable(void)
|
||||
{
|
||||
// Enable application wakeup events (e.g. enable GPIO interrupt)
|
||||
}
|
||||
void my_callback_remotewakeup_disable(void)
|
||||
{
|
||||
// Disable application wakeup events (e.g. disable GPIO interrupt)
|
||||
}
|
||||
|
||||
void my_interrupt_event(void)
|
||||
{
|
||||
udc_remotewakeup();
|
||||
}
|
||||
void my_interrupt_event(void)
|
||||
{
|
||||
udc_remotewakeup();
|
||||
}
|
||||
\endcode
|
||||
*
|
||||
* \subsection udc_use_case_3_usage_flow Workflow
|
||||
* -# Ensure that conf_usb.h is available and contains the following parameters
|
||||
* required to enable remote wakeup feature:
|
||||
* - \code // Authorizes the remote wakeup feature
|
||||
#define USB_DEVICE_ATTR (USB_CONFIG_ATTR_REMOTE_WAKEUP | USB_CONFIG_ATTR_..._POWERED) \endcode
|
||||
#define USB_DEVICE_ATTR (USB_CONFIG_ATTR_REMOTE_WAKEUP | USB_CONFIG_ATTR_..._POWERED) \endcode
|
||||
* - \code // Define callback called when the host enables the remotewakeup feature
|
||||
#define UDC_REMOTEWAKEUP_ENABLE() my_callback_remotewakeup_enable()
|
||||
extern void my_callback_remotewakeup_enable(void); \endcode
|
||||
#define UDC_REMOTEWAKEUP_ENABLE() my_callback_remotewakeup_enable()
|
||||
extern void my_callback_remotewakeup_enable(void); \endcode
|
||||
* - \code // Define callback called when the host disables the remotewakeup feature
|
||||
#define UDC_REMOTEWAKEUP_DISABLE() my_callback_remotewakeup_disable()
|
||||
extern void my_callback_remotewakeup_disable(void); \endcode
|
||||
#define UDC_REMOTEWAKEUP_DISABLE() my_callback_remotewakeup_disable()
|
||||
extern void my_callback_remotewakeup_disable(void); \endcode
|
||||
* -# Send a remote wakeup (USB upstream):
|
||||
* - \code udc_remotewakeup(); \endcode
|
||||
*/
|
||||
@@ -603,40 +596,40 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
|
||||
* \subsection udc_use_case_5_usage_code Example code
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#define USB_DEVICE_ATTR (USB_CONFIG_ATTR_BUS_POWERED)
|
||||
#define UDC_SUSPEND_EVENT() user_callback_suspend_action()
|
||||
extern void user_callback_suspend_action(void)
|
||||
#define UDC_RESUME_EVENT() user_callback_resume_action()
|
||||
extern void user_callback_resume_action(void)
|
||||
#define USB_DEVICE_ATTR (USB_CONFIG_ATTR_BUS_POWERED)
|
||||
#define UDC_SUSPEND_EVENT() user_callback_suspend_action()
|
||||
extern void user_callback_suspend_action(void)
|
||||
#define UDC_RESUME_EVENT() user_callback_resume_action()
|
||||
extern void user_callback_resume_action(void)
|
||||
\endcode
|
||||
*
|
||||
* Add to application C-file:
|
||||
* \code
|
||||
void user_callback_suspend_action(void)
|
||||
{
|
||||
// Disable hardware component to reduce power consumption
|
||||
}
|
||||
void user_callback_resume_action(void)
|
||||
{
|
||||
// Re-enable hardware component
|
||||
}
|
||||
void user_callback_suspend_action(void)
|
||||
{
|
||||
// Disable hardware component to reduce power consumption
|
||||
}
|
||||
void user_callback_resume_action(void)
|
||||
{
|
||||
// Re-enable hardware component
|
||||
}
|
||||
\endcode
|
||||
*
|
||||
* \subsection udc_use_case_5_usage_flow Workflow
|
||||
* -# Ensure that conf_usb.h is available and contains the following parameters:
|
||||
* - \code // Authorizes the BUS power feature
|
||||
#define USB_DEVICE_ATTR (USB_CONFIG_ATTR_BUS_POWERED) \endcode
|
||||
#define USB_DEVICE_ATTR (USB_CONFIG_ATTR_BUS_POWERED) \endcode
|
||||
* - \code // Define callback called when the host suspend the USB line
|
||||
#define UDC_SUSPEND_EVENT() user_callback_suspend_action()
|
||||
extern void user_callback_suspend_action(void); \endcode
|
||||
#define UDC_SUSPEND_EVENT() user_callback_suspend_action()
|
||||
extern void user_callback_suspend_action(void); \endcode
|
||||
* - \code // Define callback called when the host or device resume the USB line
|
||||
#define UDC_RESUME_EVENT() user_callback_resume_action()
|
||||
extern void user_callback_resume_action(void); \endcode
|
||||
#define UDC_RESUME_EVENT() user_callback_resume_action()
|
||||
extern void user_callback_resume_action(void); \endcode
|
||||
* -# Reduce power consumption in suspend mode (max. 2.5mA on Vbus):
|
||||
* - \code void user_callback_suspend_action(void)
|
||||
{
|
||||
turn_off_components();
|
||||
} \endcode
|
||||
{
|
||||
turn_off_components();
|
||||
} \endcode
|
||||
*/
|
||||
|
||||
/**
|
||||
@@ -654,44 +647,42 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
|
||||
* \subsection udc_use_case_6_usage_code Example code
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#define USB_DEVICE_SERIAL_NAME
|
||||
#define USB_DEVICE_GET_SERIAL_NAME_POINTER serial_number
|
||||
#define USB_DEVICE_GET_SERIAL_NAME_LENGTH 12
|
||||
extern uint8_t serial_number[];
|
||||
#define USB_DEVICE_SERIAL_NAME
|
||||
#define USB_DEVICE_GET_SERIAL_NAME_POINTER serial_number
|
||||
#define USB_DEVICE_GET_SERIAL_NAME_LENGTH 12
|
||||
extern uint8_t serial_number[];
|
||||
\endcode
|
||||
*
|
||||
* Add to application C-file:
|
||||
* \code
|
||||
uint8_t serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH];
|
||||
uint8_t serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH];
|
||||
|
||||
void init_build_usb_serial_number(void)
|
||||
{
|
||||
serial_number[0] = 'A';
|
||||
serial_number[1] = 'B';
|
||||
...
|
||||
serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH-1] = 'C';
|
||||
} \endcode
|
||||
void init_build_usb_serial_number(void)
|
||||
{
|
||||
serial_number[0] = 'A';
|
||||
serial_number[1] = 'B';
|
||||
...
|
||||
serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH-1] = 'C';
|
||||
} \endcode
|
||||
*
|
||||
* \subsection udc_use_case_6_usage_flow Workflow
|
||||
* -# Ensure that conf_usb.h is available and contains the following parameters
|
||||
* required to enable a USB serial number strings dynamically:
|
||||
* - \code #define USB_DEVICE_SERIAL_NAME // Define this empty
|
||||
#define USB_DEVICE_GET_SERIAL_NAME_POINTER serial_number // Give serial array pointer
|
||||
#define USB_DEVICE_GET_SERIAL_NAME_LENGTH 12 // Give size of serial array
|
||||
extern uint8_t serial_number[]; // Declare external serial array \endcode
|
||||
#define USB_DEVICE_GET_SERIAL_NAME_POINTER serial_number // Give serial array pointer
|
||||
#define USB_DEVICE_GET_SERIAL_NAME_LENGTH 12 // Give size of serial array
|
||||
extern uint8_t serial_number[]; // Declare external serial array \endcode
|
||||
* -# Before start USB stack, initialize the serial array
|
||||
* - \code
|
||||
uint8_t serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH];
|
||||
uint8_t serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH];
|
||||
|
||||
void init_build_usb_serial_number(void)
|
||||
{
|
||||
serial_number[0] = 'A';
|
||||
serial_number[1] = 'B';
|
||||
...
|
||||
serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH-1] = 'C';
|
||||
} \endcode
|
||||
void init_build_usb_serial_number(void)
|
||||
{
|
||||
serial_number[0] = 'A';
|
||||
serial_number[1] = 'B';
|
||||
...
|
||||
serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH-1] = 'C';
|
||||
} \endcode
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#endif // _UDC_H_
|
||||
|
@@ -78,50 +78,47 @@ extern "C" {
|
||||
* For Mega application used "code".
|
||||
*/
|
||||
#define UDC_DESC_STORAGE
|
||||
// Descriptor storage in internal RAM
|
||||
// Descriptor storage in internal RAM
|
||||
#if (defined UDC_DATA_USE_HRAM_SUPPORT)
|
||||
# if defined(__GNUC__)
|
||||
# define UDC_DATA(x) COMPILER_WORD_ALIGNED __attribute__((__section__(".data_hram0")))
|
||||
# define UDC_BSS(x) COMPILER_ALIGNED(x) __attribute__((__section__(".bss_hram0")))
|
||||
# elif defined(__ICCAVR32__)
|
||||
# define UDC_DATA(x) COMPILER_ALIGNED(x) __data32
|
||||
# define UDC_BSS(x) COMPILER_ALIGNED(x) __data32
|
||||
# endif
|
||||
#else
|
||||
# define UDC_DATA(x) COMPILER_ALIGNED(x)
|
||||
# define UDC_BSS(x) COMPILER_ALIGNED(x)
|
||||
#if defined(__GNUC__)
|
||||
#define UDC_DATA(x) COMPILER_WORD_ALIGNED __attribute__((__section__(".data_hram0")))
|
||||
#define UDC_BSS(x) COMPILER_ALIGNED(x) __attribute__((__section__(".bss_hram0")))
|
||||
#elif defined(__ICCAVR32__)
|
||||
#define UDC_DATA(x) COMPILER_ALIGNED(x) __data32
|
||||
#define UDC_BSS(x) COMPILER_ALIGNED(x) __data32
|
||||
#endif
|
||||
#else
|
||||
#define UDC_DATA(x) COMPILER_ALIGNED(x)
|
||||
#define UDC_BSS(x) COMPILER_ALIGNED(x)
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* \brief Configuration descriptor and UDI link for one USB speed
|
||||
*/
|
||||
typedef struct {
|
||||
//! USB configuration descriptor
|
||||
usb_conf_desc_t UDC_DESC_STORAGE *desc;
|
||||
//! Array of UDI API pointer
|
||||
udi_api_t UDC_DESC_STORAGE *UDC_DESC_STORAGE * udi_apis;
|
||||
//! USB configuration descriptor
|
||||
usb_conf_desc_t UDC_DESC_STORAGE *desc;
|
||||
//! Array of UDI API pointer
|
||||
udi_api_t UDC_DESC_STORAGE *UDC_DESC_STORAGE * udi_apis;
|
||||
} udc_config_speed_t;
|
||||
|
||||
|
||||
/**
|
||||
* \brief All information about the USB Device
|
||||
*/
|
||||
typedef struct {
|
||||
//! USB device descriptor for low or full speed
|
||||
usb_dev_desc_t UDC_DESC_STORAGE *confdev_lsfs;
|
||||
//! USB configuration descriptor and UDI API pointers for low or full speed
|
||||
udc_config_speed_t UDC_DESC_STORAGE *conf_lsfs;
|
||||
#ifdef USB_DEVICE_HS_SUPPORT
|
||||
//! USB device descriptor for high speed
|
||||
usb_dev_desc_t UDC_DESC_STORAGE *confdev_hs;
|
||||
//! USB device qualifier, only use in high speed mode
|
||||
usb_dev_qual_desc_t UDC_DESC_STORAGE *qualifier;
|
||||
//! USB configuration descriptor and UDI API pointers for high speed
|
||||
udc_config_speed_t UDC_DESC_STORAGE *conf_hs;
|
||||
#endif
|
||||
usb_dev_bos_desc_t UDC_DESC_STORAGE *conf_bos;
|
||||
//! USB device descriptor for low or full speed
|
||||
usb_dev_desc_t UDC_DESC_STORAGE *confdev_lsfs;
|
||||
//! USB configuration descriptor and UDI API pointers for low or full speed
|
||||
udc_config_speed_t UDC_DESC_STORAGE *conf_lsfs;
|
||||
#ifdef USB_DEVICE_HS_SUPPORT
|
||||
//! USB device descriptor for high speed
|
||||
usb_dev_desc_t UDC_DESC_STORAGE *confdev_hs;
|
||||
//! USB device qualifier, only use in high speed mode
|
||||
usb_dev_qual_desc_t UDC_DESC_STORAGE *qualifier;
|
||||
//! USB configuration descriptor and UDI API pointers for high speed
|
||||
udc_config_speed_t UDC_DESC_STORAGE *conf_hs;
|
||||
#endif
|
||||
usb_dev_bos_desc_t UDC_DESC_STORAGE *conf_bos;
|
||||
} udc_config_t;
|
||||
|
||||
//! Global variables of USB Device Descriptor and UDI links
|
||||
|
@@ -71,8 +71,8 @@ typedef uint8_t udd_ep_id_t;
|
||||
//! \brief Endpoint transfer status
|
||||
//! Returned in parameters of callback register via udd_ep_run routine.
|
||||
typedef enum {
|
||||
UDD_EP_TRANSFER_OK = 0,
|
||||
UDD_EP_TRANSFER_ABORT = 1,
|
||||
UDD_EP_TRANSFER_OK = 0,
|
||||
UDD_EP_TRANSFER_ABORT = 1,
|
||||
} udd_ep_status_t;
|
||||
|
||||
/**
|
||||
@@ -82,41 +82,37 @@ typedef enum {
|
||||
* It can be updated by udc_process_setup() from UDC or *setup() from UDIs.
|
||||
*/
|
||||
typedef struct {
|
||||
//! Data received in USB SETUP packet
|
||||
//! Note: The swap of "req.wValues" from uin16_t to le16_t is done by UDD.
|
||||
usb_setup_req_t req;
|
||||
//! Data received in USB SETUP packet
|
||||
//! Note: The swap of "req.wValues" from uin16_t to le16_t is done by UDD.
|
||||
usb_setup_req_t req;
|
||||
|
||||
//! Point to buffer to send or fill with data following SETUP packet
|
||||
//! This buffer must be word align for DATA IN phase (use prefix COMPILER_WORD_ALIGNED for buffer)
|
||||
uint8_t *payload;
|
||||
//! Point to buffer to send or fill with data following SETUP packet
|
||||
//! This buffer must be word align for DATA IN phase (use prefix COMPILER_WORD_ALIGNED for buffer)
|
||||
uint8_t *payload;
|
||||
|
||||
//! Size of buffer to send or fill, and content the number of byte transferred
|
||||
uint16_t payload_size;
|
||||
//! Size of buffer to send or fill, and content the number of byte transferred
|
||||
uint16_t payload_size;
|
||||
|
||||
//! Callback called after reception of ZLP from setup request
|
||||
void (*callback)(void);
|
||||
//! Callback called after reception of ZLP from setup request
|
||||
void (*callback)(void);
|
||||
|
||||
//! Callback called when the buffer given (.payload) is full or empty.
|
||||
//! This one return false to abort data transfer, or true with a new buffer in .payload.
|
||||
bool (*over_under_run)(void);
|
||||
//! Callback called when the buffer given (.payload) is full or empty.
|
||||
//! This one return false to abort data transfer, or true with a new buffer in .payload.
|
||||
bool (*over_under_run)(void);
|
||||
} udd_ctrl_request_t;
|
||||
extern udd_ctrl_request_t udd_g_ctrlreq;
|
||||
|
||||
//! Return true if the setup request \a udd_g_ctrlreq indicates IN data transfer
|
||||
#define Udd_setup_is_in() \
|
||||
(USB_REQ_DIR_IN == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))
|
||||
#define Udd_setup_is_in() (USB_REQ_DIR_IN == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))
|
||||
|
||||
//! Return true if the setup request \a udd_g_ctrlreq indicates OUT data transfer
|
||||
#define Udd_setup_is_out() \
|
||||
(USB_REQ_DIR_OUT == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))
|
||||
#define Udd_setup_is_out() (USB_REQ_DIR_OUT == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))
|
||||
|
||||
//! Return the type of the SETUP request \a udd_g_ctrlreq. \see usb_reqtype.
|
||||
#define Udd_setup_type() \
|
||||
(udd_g_ctrlreq.req.bmRequestType & USB_REQ_TYPE_MASK)
|
||||
#define Udd_setup_type() (udd_g_ctrlreq.req.bmRequestType & USB_REQ_TYPE_MASK)
|
||||
|
||||
//! Return the recipient of the SETUP request \a udd_g_ctrlreq. \see usb_recipient
|
||||
#define Udd_setup_recipient() \
|
||||
(udd_g_ctrlreq.req.bmRequestType & USB_REQ_RECIP_MASK)
|
||||
#define Udd_setup_recipient() (udd_g_ctrlreq.req.bmRequestType & USB_REQ_RECIP_MASK)
|
||||
|
||||
/**
|
||||
* \brief End of halt callback function type.
|
||||
@@ -134,8 +130,7 @@ typedef void (*udd_callback_halt_cleared_t)(void);
|
||||
* \param status UDD_EP_TRANSFER_ABORT, if transfer is aborted
|
||||
* \param n number of data transferred
|
||||
*/
|
||||
typedef void (*udd_callback_trans_t) (udd_ep_status_t status,
|
||||
iram_size_t nb_transferred, udd_ep_id_t ep);
|
||||
typedef void (*udd_callback_trans_t) (udd_ep_status_t status, iram_size_t nb_transferred, udd_ep_id_t ep);
|
||||
|
||||
/**
|
||||
* \brief Authorizes the VBUS event
|
||||
@@ -218,7 +213,6 @@ void udd_send_remotewakeup(void);
|
||||
*/
|
||||
void udd_set_setup_payload( uint8_t *payload, uint16_t payload_size );
|
||||
|
||||
|
||||
/**
|
||||
* \name Endpoint Management
|
||||
*
|
||||
@@ -239,8 +233,7 @@ void udd_set_setup_payload( uint8_t *payload, uint16_t payload_size );
|
||||
*
|
||||
* \return \c 1 if the endpoint is enabled, otherwise \c 0.
|
||||
*/
|
||||
bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes,
|
||||
uint16_t MaxEndpointSize);
|
||||
bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes, uint16_t MaxEndpointSize);
|
||||
|
||||
/**
|
||||
* \brief Disables an endpoint
|
||||
@@ -294,8 +287,7 @@ bool udd_ep_clear_halt(udd_ep_id_t ep);
|
||||
*
|
||||
* \return \c 1 if the register is accepted, otherwise \c 0.
|
||||
*/
|
||||
bool udd_ep_wait_stall_clear(udd_ep_id_t ep,
|
||||
udd_callback_halt_cleared_t callback);
|
||||
bool udd_ep_wait_stall_clear(udd_ep_id_t ep, udd_callback_halt_cleared_t callback);
|
||||
|
||||
/**
|
||||
* \brief Allows to receive or send data on an endpoint
|
||||
@@ -321,9 +313,8 @@ bool udd_ep_wait_stall_clear(udd_ep_id_t ep,
|
||||
*
|
||||
* \return \c 1 if function was successfully done, otherwise \c 0.
|
||||
*/
|
||||
bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket,
|
||||
uint8_t * buf, iram_size_t buf_size,
|
||||
udd_callback_trans_t callback);
|
||||
bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket, uint8_t * buf, iram_size_t buf_size, udd_callback_trans_t callback);
|
||||
|
||||
/**
|
||||
* \brief Aborts transfer on going on endpoint
|
||||
*
|
||||
@@ -339,7 +330,6 @@ void udd_ep_abort(udd_ep_id_t ep);
|
||||
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \name High speed test mode management
|
||||
*
|
||||
@@ -352,7 +342,6 @@ void udd_test_mode_se0_nak(void);
|
||||
void udd_test_mode_packet(void);
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \name UDC callbacks to provide for UDD
|
||||
*
|
||||
|
@@ -72,57 +72,57 @@ extern "C" {
|
||||
* selected by UDC.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* \brief Enable the interface.
|
||||
*
|
||||
* This function is called when the host selects a configuration
|
||||
* to which this interface belongs through a Set Configuration
|
||||
* request, and when the host selects an alternate setting of
|
||||
* this interface through a Set Interface request.
|
||||
*
|
||||
* \return \c 1 if function was successfully done, otherwise \c 0.
|
||||
*/
|
||||
bool (*enable)(void);
|
||||
/**
|
||||
* \brief Enable the interface.
|
||||
*
|
||||
* This function is called when the host selects a configuration
|
||||
* to which this interface belongs through a Set Configuration
|
||||
* request, and when the host selects an alternate setting of
|
||||
* this interface through a Set Interface request.
|
||||
*
|
||||
* \return \c 1 if function was successfully done, otherwise \c 0.
|
||||
*/
|
||||
bool (*enable)(void);
|
||||
|
||||
/**
|
||||
* \brief Disable the interface.
|
||||
*
|
||||
* This function is called when this interface is currently
|
||||
* active, and
|
||||
* - the host selects any configuration through a Set
|
||||
* Configuration request, or
|
||||
* - the host issues a USB reset, or
|
||||
* - the device is detached from the host (i.e. Vbus is no
|
||||
* longer present)
|
||||
*/
|
||||
void (*disable)(void);
|
||||
/**
|
||||
* \brief Disable the interface.
|
||||
*
|
||||
* This function is called when this interface is currently
|
||||
* active, and
|
||||
* - the host selects any configuration through a Set
|
||||
* Configuration request, or
|
||||
* - the host issues a USB reset, or
|
||||
* - the device is detached from the host (i.e. Vbus is no
|
||||
* longer present)
|
||||
*/
|
||||
void (*disable)(void);
|
||||
|
||||
/**
|
||||
* \brief Handle a control request directed at an interface.
|
||||
*
|
||||
* This function is called when this interface is currently
|
||||
* active and the host sends a SETUP request
|
||||
* with this interface as the recipient.
|
||||
*
|
||||
* Use udd_g_ctrlreq to decode and response to SETUP request.
|
||||
*
|
||||
* \return \c 1 if this interface supports the SETUP request, otherwise \c 0.
|
||||
*/
|
||||
bool (*setup)(void);
|
||||
/**
|
||||
* \brief Handle a control request directed at an interface.
|
||||
*
|
||||
* This function is called when this interface is currently
|
||||
* active and the host sends a SETUP request
|
||||
* with this interface as the recipient.
|
||||
*
|
||||
* Use udd_g_ctrlreq to decode and response to SETUP request.
|
||||
*
|
||||
* \return \c 1 if this interface supports the SETUP request, otherwise \c 0.
|
||||
*/
|
||||
bool (*setup)(void);
|
||||
|
||||
/**
|
||||
* \brief Returns the current setting of the selected interface.
|
||||
*
|
||||
* This function is called when UDC when know alternate setting of selected interface.
|
||||
*
|
||||
* \return alternate setting of selected interface
|
||||
*/
|
||||
uint8_t (*getsetting)(void);
|
||||
/**
|
||||
* \brief Returns the current setting of the selected interface.
|
||||
*
|
||||
* This function is called when UDC when know alternate setting of selected interface.
|
||||
*
|
||||
* \return alternate setting of selected interface
|
||||
*/
|
||||
uint8_t (*getsetting)(void);
|
||||
|
||||
/**
|
||||
* \brief To signal that a SOF is occurred
|
||||
*/
|
||||
void (*sof_notify)(void);
|
||||
/**
|
||||
* \brief To signal that a SOF is occurred
|
||||
*/
|
||||
void (*sof_notify)(void);
|
||||
} udi_api_t;
|
||||
|
||||
//@}
|
||||
|
@@ -457,7 +457,6 @@ void udi_cdc_data_sof_notify(void)
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
// ------------------------
|
||||
//------- Internal routines to control serial line
|
||||
|
||||
@@ -520,7 +519,6 @@ static void udi_cdc_ctrl_state_change(uint8_t port, bool b_set, le16_t bit_mask)
|
||||
udi_cdc_ctrl_state_notify(port, ep_comm);
|
||||
}
|
||||
|
||||
|
||||
static void udi_cdc_ctrl_state_notify(uint8_t port, udd_ep_id_t ep)
|
||||
{
|
||||
#if UDI_CDC_PORT_NB == 1 // To optimize code
|
||||
@@ -542,7 +540,6 @@ static void udi_cdc_ctrl_state_notify(uint8_t port, udd_ep_id_t ep)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void udi_cdc_serial_state_msg_sent(udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep)
|
||||
{
|
||||
uint8_t port;
|
||||
@@ -578,11 +575,9 @@ static void udi_cdc_serial_state_msg_sent(udd_ep_status_t status, iram_size_t n,
|
||||
udi_cdc_ctrl_state_notify(port, ep);
|
||||
}
|
||||
|
||||
|
||||
// ------------------------
|
||||
//------- Internal routines to process data transfer
|
||||
|
||||
|
||||
static bool udi_cdc_rx_start(uint8_t port)
|
||||
{
|
||||
irqflags_t flags;
|
||||
@@ -632,7 +627,6 @@ static bool udi_cdc_rx_start(uint8_t port)
|
||||
udi_cdc_data_received);
|
||||
}
|
||||
|
||||
|
||||
static void udi_cdc_data_received(udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep)
|
||||
{
|
||||
uint8_t buf_sel_trans;
|
||||
@@ -668,7 +662,6 @@ static void udi_cdc_data_received(udd_ep_status_t status, iram_size_t n, udd_ep_
|
||||
udi_cdc_rx_start(port);
|
||||
}
|
||||
|
||||
|
||||
static void udi_cdc_data_sent(udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep)
|
||||
{
|
||||
uint8_t port;
|
||||
@@ -700,7 +693,6 @@ static void udi_cdc_data_sent(udd_ep_status_t status, iram_size_t n, udd_ep_id_t
|
||||
udi_cdc_tx_send(port);
|
||||
}
|
||||
|
||||
|
||||
static void udi_cdc_tx_send(uint8_t port)
|
||||
{
|
||||
irqflags_t flags;
|
||||
@@ -780,11 +772,9 @@ static void udi_cdc_tx_send(uint8_t port)
|
||||
udi_cdc_data_sent);
|
||||
}
|
||||
|
||||
|
||||
// ------------------------
|
||||
//------- Application interface
|
||||
|
||||
|
||||
//------- Application interface
|
||||
|
||||
void udi_cdc_ctrl_signal_dcd(bool b_set)
|
||||
|
@@ -92,21 +92,20 @@ extern UDC_DESC_STORAGE udi_api_t udi_api_cdc_data;
|
||||
* descriptors for the CDC Communication Class interface.
|
||||
*/
|
||||
typedef struct {
|
||||
//! Standard interface descriptor
|
||||
usb_iface_desc_t iface;
|
||||
//! CDC Header functional descriptor
|
||||
usb_cdc_hdr_desc_t header;
|
||||
//! CDC Abstract Control Model functional descriptor
|
||||
usb_cdc_acm_desc_t acm;
|
||||
//! CDC Union functional descriptor
|
||||
usb_cdc_union_desc_t union_desc;
|
||||
//! CDC Call Management functional descriptor
|
||||
usb_cdc_call_mgmt_desc_t call_mgmt;
|
||||
//! Notification endpoint descriptor
|
||||
usb_ep_desc_t ep_notify;
|
||||
//! Standard interface descriptor
|
||||
usb_iface_desc_t iface;
|
||||
//! CDC Header functional descriptor
|
||||
usb_cdc_hdr_desc_t header;
|
||||
//! CDC Abstract Control Model functional descriptor
|
||||
usb_cdc_acm_desc_t acm;
|
||||
//! CDC Union functional descriptor
|
||||
usb_cdc_union_desc_t union_desc;
|
||||
//! CDC Call Management functional descriptor
|
||||
usb_cdc_call_mgmt_desc_t call_mgmt;
|
||||
//! Notification endpoint descriptor
|
||||
usb_ep_desc_t ep_notify;
|
||||
} udi_cdc_comm_desc_t;
|
||||
|
||||
|
||||
/**
|
||||
* \brief Data Class interface descriptor
|
||||
*
|
||||
@@ -114,14 +113,13 @@ typedef struct {
|
||||
* CDC Data Class interface.
|
||||
*/
|
||||
typedef struct {
|
||||
//! Standard interface descriptor
|
||||
usb_iface_desc_t iface;
|
||||
//! Data IN/OUT endpoint descriptors
|
||||
usb_ep_desc_t ep_in;
|
||||
usb_ep_desc_t ep_out;
|
||||
//! Standard interface descriptor
|
||||
usb_iface_desc_t iface;
|
||||
//! Data IN/OUT endpoint descriptors
|
||||
usb_ep_desc_t ep_in;
|
||||
usb_ep_desc_t ep_out;
|
||||
} udi_cdc_data_desc_t;
|
||||
|
||||
|
||||
//! CDC communication endpoints size for all speeds
|
||||
#define UDI_CDC_COMM_EP_SIZE 64
|
||||
//! CDC data endpoints size for FS speed (8B, 16B, 32B, 64B)
|
||||
@@ -136,13 +134,13 @@ typedef struct {
|
||||
//@{
|
||||
//! By default no string associated to these interfaces
|
||||
#ifndef UDI_CDC_IAD_STRING_ID_0
|
||||
#define UDI_CDC_IAD_STRING_ID_0 0
|
||||
#define UDI_CDC_IAD_STRING_ID_0 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_COMM_STRING_ID_0
|
||||
#define UDI_CDC_COMM_STRING_ID_0 0
|
||||
#define UDI_CDC_COMM_STRING_ID_0 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_DATA_STRING_ID_0
|
||||
#define UDI_CDC_DATA_STRING_ID_0 0
|
||||
#define UDI_CDC_DATA_STRING_ID_0 0
|
||||
#endif
|
||||
#define UDI_CDC_IAD_DESC_0 UDI_CDC_IAD_DESC(0)
|
||||
#define UDI_CDC_COMM_DESC_0 UDI_CDC_COMM_DESC(0)
|
||||
@@ -151,13 +149,13 @@ typedef struct {
|
||||
|
||||
//! By default no string associated to these interfaces
|
||||
#ifndef UDI_CDC_IAD_STRING_ID_1
|
||||
#define UDI_CDC_IAD_STRING_ID_1 0
|
||||
#define UDI_CDC_IAD_STRING_ID_1 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_COMM_STRING_ID_1
|
||||
#define UDI_CDC_COMM_STRING_ID_1 0
|
||||
#define UDI_CDC_COMM_STRING_ID_1 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_DATA_STRING_ID_1
|
||||
#define UDI_CDC_DATA_STRING_ID_1 0
|
||||
#define UDI_CDC_DATA_STRING_ID_1 0
|
||||
#endif
|
||||
#define UDI_CDC_IAD_DESC_1 UDI_CDC_IAD_DESC(1)
|
||||
#define UDI_CDC_COMM_DESC_1 UDI_CDC_COMM_DESC(1)
|
||||
@@ -166,13 +164,13 @@ typedef struct {
|
||||
|
||||
//! By default no string associated to these interfaces
|
||||
#ifndef UDI_CDC_IAD_STRING_ID_2
|
||||
#define UDI_CDC_IAD_STRING_ID_2 0
|
||||
#define UDI_CDC_IAD_STRING_ID_2 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_COMM_STRING_ID_2
|
||||
#define UDI_CDC_COMM_STRING_ID_2 0
|
||||
#define UDI_CDC_COMM_STRING_ID_2 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_DATA_STRING_ID_2
|
||||
#define UDI_CDC_DATA_STRING_ID_2 0
|
||||
#define UDI_CDC_DATA_STRING_ID_2 0
|
||||
#endif
|
||||
#define UDI_CDC_IAD_DESC_2 UDI_CDC_IAD_DESC(2)
|
||||
#define UDI_CDC_COMM_DESC_2 UDI_CDC_COMM_DESC(2)
|
||||
@@ -181,13 +179,13 @@ typedef struct {
|
||||
|
||||
//! By default no string associated to these interfaces
|
||||
#ifndef UDI_CDC_IAD_STRING_ID_3
|
||||
#define UDI_CDC_IAD_STRING_ID_3 0
|
||||
#define UDI_CDC_IAD_STRING_ID_3 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_COMM_STRING_ID_3
|
||||
#define UDI_CDC_COMM_STRING_ID_3 0
|
||||
#define UDI_CDC_COMM_STRING_ID_3 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_DATA_STRING_ID_3
|
||||
#define UDI_CDC_DATA_STRING_ID_3 0
|
||||
#define UDI_CDC_DATA_STRING_ID_3 0
|
||||
#endif
|
||||
#define UDI_CDC_IAD_DESC_3 UDI_CDC_IAD_DESC(3)
|
||||
#define UDI_CDC_COMM_DESC_3 UDI_CDC_COMM_DESC(3)
|
||||
@@ -196,13 +194,13 @@ typedef struct {
|
||||
|
||||
//! By default no string associated to these interfaces
|
||||
#ifndef UDI_CDC_IAD_STRING_ID_4
|
||||
#define UDI_CDC_IAD_STRING_ID_4 0
|
||||
#define UDI_CDC_IAD_STRING_ID_4 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_COMM_STRING_ID_4
|
||||
#define UDI_CDC_COMM_STRING_ID_4 0
|
||||
#define UDI_CDC_COMM_STRING_ID_4 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_DATA_STRING_ID_4
|
||||
#define UDI_CDC_DATA_STRING_ID_4 0
|
||||
#define UDI_CDC_DATA_STRING_ID_4 0
|
||||
#endif
|
||||
#define UDI_CDC_IAD_DESC_4 UDI_CDC_IAD_DESC(4)
|
||||
#define UDI_CDC_COMM_DESC_4 UDI_CDC_COMM_DESC(4)
|
||||
@@ -211,13 +209,13 @@ typedef struct {
|
||||
|
||||
//! By default no string associated to these interfaces
|
||||
#ifndef UDI_CDC_IAD_STRING_ID_5
|
||||
#define UDI_CDC_IAD_STRING_ID_5 0
|
||||
#define UDI_CDC_IAD_STRING_ID_5 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_COMM_STRING_ID_5
|
||||
#define UDI_CDC_COMM_STRING_ID_5 0
|
||||
#define UDI_CDC_COMM_STRING_ID_5 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_DATA_STRING_ID_5
|
||||
#define UDI_CDC_DATA_STRING_ID_5 0
|
||||
#define UDI_CDC_DATA_STRING_ID_5 0
|
||||
#endif
|
||||
#define UDI_CDC_IAD_DESC_5 UDI_CDC_IAD_DESC(5)
|
||||
#define UDI_CDC_COMM_DESC_5 UDI_CDC_COMM_DESC(5)
|
||||
@@ -226,13 +224,13 @@ typedef struct {
|
||||
|
||||
//! By default no string associated to these interfaces
|
||||
#ifndef UDI_CDC_IAD_STRING_ID_6
|
||||
#define UDI_CDC_IAD_STRING_ID_6 0
|
||||
#define UDI_CDC_IAD_STRING_ID_6 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_COMM_STRING_ID_6
|
||||
#define UDI_CDC_COMM_STRING_ID_6 0
|
||||
#define UDI_CDC_COMM_STRING_ID_6 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_DATA_STRING_ID_6
|
||||
#define UDI_CDC_DATA_STRING_ID_6 0
|
||||
#define UDI_CDC_DATA_STRING_ID_6 0
|
||||
#endif
|
||||
#define UDI_CDC_IAD_DESC_6 UDI_CDC_IAD_DESC(6)
|
||||
#define UDI_CDC_COMM_DESC_6 UDI_CDC_COMM_DESC(6)
|
||||
@@ -240,7 +238,6 @@ typedef struct {
|
||||
#define UDI_CDC_DATA_DESC_6_HS UDI_CDC_DATA_DESC_HS(6)
|
||||
//@}
|
||||
|
||||
|
||||
//! Content of CDC IAD interface descriptor for all speeds
|
||||
#define UDI_CDC_IAD_DESC(port) { \
|
||||
.bLength = sizeof(usb_iad_desc_t),\
|
||||
@@ -270,7 +267,7 @@ typedef struct {
|
||||
.call_mgmt.bDescriptorType = CDC_CS_INTERFACE,\
|
||||
.call_mgmt.bDescriptorSubtype = CDC_SCS_CALL_MGMT,\
|
||||
.call_mgmt.bmCapabilities = \
|
||||
CDC_CALL_MGMT_SUPPORTED | CDC_CALL_MGMT_OVER_DCI,\
|
||||
CDC_CALL_MGMT_SUPPORTED | CDC_CALL_MGMT_OVER_DCI,\
|
||||
.acm.bFunctionLength = sizeof(usb_cdc_acm_desc_t),\
|
||||
.acm.bDescriptorType = CDC_CS_INTERFACE,\
|
||||
.acm.bDescriptorSubtype = CDC_SCS_ACM,\
|
||||
@@ -610,40 +607,37 @@ iram_size_t udi_cdc_multi_write_buf(uint8_t port, const void* buf, iram_size_t s
|
||||
* \subsection udi_cdc_basic_use_case_usage_code Example code
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#define UDI_CDC_ENABLE_EXT(port) my_callback_cdc_enable()
|
||||
extern bool my_callback_cdc_enable(void);
|
||||
#define UDI_CDC_DISABLE_EXT(port) my_callback_cdc_disable()
|
||||
extern void my_callback_cdc_disable(void);
|
||||
#define UDI_CDC_LOW_RATE
|
||||
#define UDI_CDC_ENABLE_EXT(port) my_callback_cdc_enable()
|
||||
extern bool my_callback_cdc_enable(void);
|
||||
#define UDI_CDC_DISABLE_EXT(port) my_callback_cdc_disable()
|
||||
extern void my_callback_cdc_disable(void);
|
||||
#define UDI_CDC_LOW_RATE
|
||||
|
||||
#define UDI_CDC_DEFAULT_RATE 115200
|
||||
#define UDI_CDC_DEFAULT_STOPBITS CDC_STOP_BITS_1
|
||||
#define UDI_CDC_DEFAULT_PARITY CDC_PAR_NONE
|
||||
#define UDI_CDC_DEFAULT_DATABITS 8
|
||||
#define UDI_CDC_DEFAULT_RATE 115200
|
||||
#define UDI_CDC_DEFAULT_STOPBITS CDC_STOP_BITS_1
|
||||
#define UDI_CDC_DEFAULT_PARITY CDC_PAR_NONE
|
||||
#define UDI_CDC_DEFAULT_DATABITS 8
|
||||
|
||||
#include "udi_cdc_conf.h" // At the end of conf_usb.h file
|
||||
#include "udi_cdc_conf.h" // At the end of conf_usb.h file
|
||||
\endcode
|
||||
*
|
||||
* Add to application C-file:
|
||||
* \code
|
||||
static bool my_flag_autorize_cdc_transfert = false;
|
||||
bool my_callback_cdc_enable(void)
|
||||
{
|
||||
my_flag_autorize_cdc_transfert = true;
|
||||
return true;
|
||||
}
|
||||
void my_callback_cdc_disable(void)
|
||||
{
|
||||
my_flag_autorize_cdc_transfert = false;
|
||||
}
|
||||
static bool my_flag_autorize_cdc_transfert = false;
|
||||
bool my_callback_cdc_enable(void) {
|
||||
my_flag_autorize_cdc_transfert = true;
|
||||
return true;
|
||||
}
|
||||
void my_callback_cdc_disable(void) {
|
||||
my_flag_autorize_cdc_transfert = false;
|
||||
}
|
||||
|
||||
void task(void)
|
||||
{
|
||||
if (my_flag_autorize_cdc_transfert) {
|
||||
udi_cdc_putc('A');
|
||||
udi_cdc_getc();
|
||||
}
|
||||
}
|
||||
void task(void) {
|
||||
if (my_flag_autorize_cdc_transfert) {
|
||||
udi_cdc_putc('A');
|
||||
udi_cdc_getc();
|
||||
}
|
||||
}
|
||||
\endcode
|
||||
*
|
||||
* \subsection udi_cdc_basic_use_case_setup_flow Workflow
|
||||
@@ -652,14 +646,14 @@ iram_size_t udi_cdc_multi_write_buf(uint8_t port, const void* buf, iram_size_t s
|
||||
* - \code #define USB_DEVICE_SERIAL_NAME "12...EF" // Disk SN for CDC \endcode
|
||||
* \note The USB serial number is mandatory when a CDC interface is used.
|
||||
* - \code #define UDI_CDC_ENABLE_EXT(port) my_callback_cdc_enable()
|
||||
extern bool my_callback_cdc_enable(void); \endcode
|
||||
extern bool my_callback_cdc_enable(void); \endcode
|
||||
* \note After the device enumeration (detecting and identifying USB devices),
|
||||
* the USB host starts the device configuration. When the USB CDC interface
|
||||
* from the device is accepted by the host, the USB host enables this interface and the
|
||||
* UDI_CDC_ENABLE_EXT() callback function is called and return true.
|
||||
* Thus, when this event is received, the data transfer on CDC interface are authorized.
|
||||
* - \code #define UDI_CDC_DISABLE_EXT(port) my_callback_cdc_disable()
|
||||
extern void my_callback_cdc_disable(void); \endcode
|
||||
extern void my_callback_cdc_disable(void); \endcode
|
||||
* \note When the USB device is unplugged or is reset by the USB host, the USB
|
||||
* interface is disabled and the UDI_CDC_DISABLE_EXT() callback function
|
||||
* is called. Thus, the data transfer must be stopped on CDC interface.
|
||||
@@ -667,19 +661,19 @@ iram_size_t udi_cdc_multi_write_buf(uint8_t port, const void* buf, iram_size_t s
|
||||
* \note Define it when the transfer CDC Device to Host is a low rate
|
||||
* (<512000 bauds) to reduce CDC buffers size.
|
||||
* - \code #define UDI_CDC_DEFAULT_RATE 115200
|
||||
#define UDI_CDC_DEFAULT_STOPBITS CDC_STOP_BITS_1
|
||||
#define UDI_CDC_DEFAULT_PARITY CDC_PAR_NONE
|
||||
#define UDI_CDC_DEFAULT_DATABITS 8 \endcode
|
||||
#define UDI_CDC_DEFAULT_STOPBITS CDC_STOP_BITS_1
|
||||
#define UDI_CDC_DEFAULT_PARITY CDC_PAR_NONE
|
||||
#define UDI_CDC_DEFAULT_DATABITS 8 \endcode
|
||||
* \note Default configuration of communication port at startup.
|
||||
* -# Send or wait data on CDC line:
|
||||
* - \code // Waits and gets a value on CDC line
|
||||
int udi_cdc_getc(void);
|
||||
// Reads a RAM buffer on CDC line
|
||||
iram_size_t udi_cdc_read_buf(int *buf, iram_size_t size);
|
||||
// Puts a byte on CDC line
|
||||
int udi_cdc_putc(int value);
|
||||
// Writes a RAM buffer on CDC line
|
||||
iram_size_t udi_cdc_write_buf(const int *buf, iram_size_t size); \endcode
|
||||
int udi_cdc_getc(void);
|
||||
// Reads a RAM buffer on CDC line
|
||||
iram_size_t udi_cdc_read_buf(int *buf, iram_size_t size);
|
||||
// Puts a byte on CDC line
|
||||
int udi_cdc_putc(int value);
|
||||
// Writes a RAM buffer on CDC line
|
||||
iram_size_t udi_cdc_write_buf(const int *buf, iram_size_t size); \endcode
|
||||
*
|
||||
* \section udi_cdc_use_cases Advanced use cases
|
||||
* For more advanced use of the UDI CDC module, see the following use cases:
|
||||
@@ -713,90 +707,90 @@ iram_size_t udi_cdc_multi_write_buf(uint8_t port, const void* buf, iram_size_t s
|
||||
* \subsection udi_cdc_use_case_composite_usage_code Example code
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#define USB_DEVICE_EP_CTRL_SIZE 64
|
||||
#define USB_DEVICE_NB_INTERFACE (X+2)
|
||||
#define USB_DEVICE_MAX_EP (X+3)
|
||||
#define USB_DEVICE_EP_CTRL_SIZE 64
|
||||
#define USB_DEVICE_NB_INTERFACE (X+2)
|
||||
#define USB_DEVICE_MAX_EP (X+3)
|
||||
|
||||
#define UDI_CDC_DATA_EP_IN_0 (1 | USB_EP_DIR_IN) // TX
|
||||
#define UDI_CDC_DATA_EP_OUT_0 (2 | USB_EP_DIR_OUT) // RX
|
||||
#define UDI_CDC_COMM_EP_0 (3 | USB_EP_DIR_IN) // Notify endpoint
|
||||
#define UDI_CDC_COMM_IFACE_NUMBER_0 X+0
|
||||
#define UDI_CDC_DATA_IFACE_NUMBER_0 X+1
|
||||
#define UDI_CDC_DATA_EP_IN_0 (1 | USB_EP_DIR_IN) // TX
|
||||
#define UDI_CDC_DATA_EP_OUT_0 (2 | USB_EP_DIR_OUT) // RX
|
||||
#define UDI_CDC_COMM_EP_0 (3 | USB_EP_DIR_IN) // Notify endpoint
|
||||
#define UDI_CDC_COMM_IFACE_NUMBER_0 X+0
|
||||
#define UDI_CDC_DATA_IFACE_NUMBER_0 X+1
|
||||
|
||||
#define UDI_COMPOSITE_DESC_T \
|
||||
usb_iad_desc_t udi_cdc_iad; \
|
||||
udi_cdc_comm_desc_t udi_cdc_comm; \
|
||||
udi_cdc_data_desc_t udi_cdc_data; \
|
||||
...
|
||||
#define UDI_COMPOSITE_DESC_FS \
|
||||
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
|
||||
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
|
||||
.udi_cdc_data = UDI_CDC_DATA_DESC_0_FS, \
|
||||
...
|
||||
#define UDI_COMPOSITE_DESC_HS \
|
||||
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
|
||||
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
|
||||
.udi_cdc_data = UDI_CDC_DATA_DESC_0_HS, \
|
||||
...
|
||||
#define UDI_COMPOSITE_API \
|
||||
&udi_api_cdc_comm, \
|
||||
&udi_api_cdc_data, \
|
||||
...
|
||||
#define UDI_COMPOSITE_DESC_T \
|
||||
usb_iad_desc_t udi_cdc_iad; \
|
||||
udi_cdc_comm_desc_t udi_cdc_comm; \
|
||||
udi_cdc_data_desc_t udi_cdc_data; \
|
||||
...
|
||||
#define UDI_COMPOSITE_DESC_FS \
|
||||
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
|
||||
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
|
||||
.udi_cdc_data = UDI_CDC_DATA_DESC_0_FS, \
|
||||
...
|
||||
#define UDI_COMPOSITE_DESC_HS \
|
||||
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
|
||||
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
|
||||
.udi_cdc_data = UDI_CDC_DATA_DESC_0_HS, \
|
||||
...
|
||||
#define UDI_COMPOSITE_API \
|
||||
&udi_api_cdc_comm, \
|
||||
&udi_api_cdc_data, \
|
||||
...
|
||||
\endcode
|
||||
*
|
||||
* \subsection udi_cdc_use_case_composite_usage_flow Workflow
|
||||
* -# Ensure that conf_usb.h is available and contains the following parameters
|
||||
* required for a USB composite device configuration:
|
||||
* - \code // Endpoint control size, This must be:
|
||||
// - 8, 16, 32 or 64 for full speed device (8 is recommended to save RAM)
|
||||
// - 64 for a high speed device
|
||||
#define USB_DEVICE_EP_CTRL_SIZE 64
|
||||
// Total Number of interfaces on this USB device.
|
||||
// Add 2 for CDC.
|
||||
#define USB_DEVICE_NB_INTERFACE (X+2)
|
||||
// Total number of endpoints on this USB device.
|
||||
// This must include each endpoint for each interface.
|
||||
// Add 3 for CDC.
|
||||
#define USB_DEVICE_MAX_EP (X+3) \endcode
|
||||
// - 8, 16, 32 or 64 for full speed device (8 is recommended to save RAM)
|
||||
// - 64 for a high speed device
|
||||
#define USB_DEVICE_EP_CTRL_SIZE 64
|
||||
// Total Number of interfaces on this USB device.
|
||||
// Add 2 for CDC.
|
||||
#define USB_DEVICE_NB_INTERFACE (X+2)
|
||||
// Total number of endpoints on this USB device.
|
||||
// This must include each endpoint for each interface.
|
||||
// Add 3 for CDC.
|
||||
#define USB_DEVICE_MAX_EP (X+3) \endcode
|
||||
* -# Ensure that conf_usb.h contains the description of
|
||||
* composite device:
|
||||
* - \code // The endpoint numbers chosen by you for the CDC.
|
||||
// The endpoint numbers starting from 1.
|
||||
#define UDI_CDC_DATA_EP_IN_0 (1 | USB_EP_DIR_IN) // TX
|
||||
#define UDI_CDC_DATA_EP_OUT_0 (2 | USB_EP_DIR_OUT) // RX
|
||||
#define UDI_CDC_COMM_EP_0 (3 | USB_EP_DIR_IN) // Notify endpoint
|
||||
// The interface index of an interface starting from 0
|
||||
#define UDI_CDC_COMM_IFACE_NUMBER_0 X+0
|
||||
#define UDI_CDC_DATA_IFACE_NUMBER_0 X+1 \endcode
|
||||
// The endpoint numbers starting from 1.
|
||||
#define UDI_CDC_DATA_EP_IN_0 (1 | USB_EP_DIR_IN) // TX
|
||||
#define UDI_CDC_DATA_EP_OUT_0 (2 | USB_EP_DIR_OUT) // RX
|
||||
#define UDI_CDC_COMM_EP_0 (3 | USB_EP_DIR_IN) // Notify endpoint
|
||||
// The interface index of an interface starting from 0
|
||||
#define UDI_CDC_COMM_IFACE_NUMBER_0 X+0
|
||||
#define UDI_CDC_DATA_IFACE_NUMBER_0 X+1 \endcode
|
||||
* -# Ensure that conf_usb.h contains the following parameters
|
||||
* required for a USB composite device configuration:
|
||||
* - \code // USB Interfaces descriptor structure
|
||||
#define UDI_COMPOSITE_DESC_T \
|
||||
...
|
||||
usb_iad_desc_t udi_cdc_iad; \
|
||||
udi_cdc_comm_desc_t udi_cdc_comm; \
|
||||
udi_cdc_data_desc_t udi_cdc_data; \
|
||||
...
|
||||
// USB Interfaces descriptor value for Full Speed
|
||||
#define UDI_COMPOSITE_DESC_FS \
|
||||
...
|
||||
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
|
||||
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
|
||||
.udi_cdc_data = UDI_CDC_DATA_DESC_0_FS, \
|
||||
...
|
||||
// USB Interfaces descriptor value for High Speed
|
||||
#define UDI_COMPOSITE_DESC_HS \
|
||||
...
|
||||
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
|
||||
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
|
||||
.udi_cdc_data = UDI_CDC_DATA_DESC_0_HS, \
|
||||
...
|
||||
// USB Interface APIs
|
||||
#define UDI_COMPOSITE_API \
|
||||
...
|
||||
&udi_api_cdc_comm, \
|
||||
&udi_api_cdc_data, \
|
||||
... \endcode
|
||||
#define UDI_COMPOSITE_DESC_T \
|
||||
...
|
||||
usb_iad_desc_t udi_cdc_iad; \
|
||||
udi_cdc_comm_desc_t udi_cdc_comm; \
|
||||
udi_cdc_data_desc_t udi_cdc_data; \
|
||||
...
|
||||
// USB Interfaces descriptor value for Full Speed
|
||||
#define UDI_COMPOSITE_DESC_FS \
|
||||
...
|
||||
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
|
||||
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
|
||||
.udi_cdc_data = UDI_CDC_DATA_DESC_0_FS, \
|
||||
...
|
||||
// USB Interfaces descriptor value for High Speed
|
||||
#define UDI_COMPOSITE_DESC_HS \
|
||||
...
|
||||
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
|
||||
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
|
||||
.udi_cdc_data = UDI_CDC_DATA_DESC_0_HS, \
|
||||
...
|
||||
// USB Interface APIs
|
||||
#define UDI_COMPOSITE_API \
|
||||
...
|
||||
&udi_api_cdc_comm, \
|
||||
&udi_api_cdc_data, \
|
||||
... \endcode
|
||||
* - \note The descriptors order given in the four lists above must be the
|
||||
* same as the order defined by all interface indexes. The interface index
|
||||
* orders are defined through UDI_X_IFACE_NUMBER defines.\n
|
||||
|
@@ -51,7 +51,7 @@
|
||||
#include "udc_desc.h"
|
||||
#include "udi_cdc.h"
|
||||
|
||||
#if DISABLED(SDSUPPORT)
|
||||
#if !HAS_MEDIA
|
||||
|
||||
/**
|
||||
* \defgroup udi_cdc_group_single_desc USB device descriptors for a single interface
|
||||
@@ -109,7 +109,6 @@ UDC_DESC_STORAGE usb_dev_desc_t udc_device_desc = {
|
||||
.bNumConfigurations = 1
|
||||
};
|
||||
|
||||
|
||||
#ifdef USB_DEVICE_HS_SUPPORT
|
||||
//! USB Device Qualifier Descriptor for HS
|
||||
COMPILER_WORD_ALIGNED
|
||||
@@ -256,6 +255,6 @@ UDC_DESC_STORAGE udc_config_t udc_config = {
|
||||
//@}
|
||||
//@}
|
||||
|
||||
#endif // SDSUPPORT
|
||||
#endif // HAS_MEDIA
|
||||
|
||||
#endif // ARDUINO_ARCH_SAM
|
||||
|
@@ -50,7 +50,7 @@
|
||||
#include "udd.h"
|
||||
#include "udc_desc.h"
|
||||
|
||||
#if ENABLED(SDSUPPORT)
|
||||
#if HAS_MEDIA
|
||||
|
||||
/**
|
||||
* \defgroup udi_group_desc Descriptors for a USB Device
|
||||
@@ -93,7 +93,6 @@ UDC_DESC_STORAGE usb_dev_desc_t udc_device_desc = {
|
||||
.bNumConfigurations = 1
|
||||
};
|
||||
|
||||
|
||||
#ifdef USB_DEVICE_HS_SUPPORT
|
||||
//! USB Device Qualifier Descriptor for HS
|
||||
COMPILER_WORD_ALIGNED
|
||||
@@ -147,7 +146,6 @@ UDC_DESC_STORAGE udc_desc_t udc_desc_hs = {
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* \name UDC structures which contains all USB Device definitions
|
||||
*/
|
||||
@@ -189,4 +187,4 @@ UDC_DESC_STORAGE udc_config_t udc_config = {
|
||||
|
||||
#endif // ARDUINO_ARCH_SAM
|
||||
|
||||
#endif // SDSUPPORT
|
||||
#endif // HAS_MEDIA
|
||||
|
@@ -57,7 +57,7 @@
|
||||
#include "ctrl_access.h"
|
||||
#include <string.h>
|
||||
|
||||
#if ENABLED(SDSUPPORT)
|
||||
#if HAS_MEDIA
|
||||
|
||||
#ifndef UDI_MSC_NOTIFY_TRANS_EXT
|
||||
# define UDI_MSC_NOTIFY_TRANS_EXT()
|
||||
@@ -86,7 +86,6 @@ UDC_DESC_STORAGE udi_api_t udi_api_msc = {
|
||||
};
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \ingroup udi_msc_group
|
||||
* \defgroup udi_msc_group_internal Implementation of UDI MSC
|
||||
@@ -137,7 +136,6 @@ volatile bool udi_msc_b_reset_trans = true;
|
||||
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \name Internal routines
|
||||
*/
|
||||
@@ -190,7 +188,6 @@ static void udi_msc_cbw_received(udd_ep_status_t status,
|
||||
static bool udi_msc_cbw_validate(uint32_t alloc_len, uint8_t dir_flag);
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \name Routines to process small data packet
|
||||
*/
|
||||
@@ -217,7 +214,6 @@ static void udi_msc_data_sent(udd_ep_status_t status, iram_size_t nb_sent,
|
||||
udd_ep_id_t ep);
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \name Routines to process CSW packet
|
||||
*/
|
||||
@@ -250,7 +246,6 @@ static void udi_msc_csw_sent(udd_ep_status_t status, iram_size_t nb_sent,
|
||||
udd_ep_id_t ep);
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \name Routines manage sense data
|
||||
*/
|
||||
@@ -307,7 +302,6 @@ static void udi_msc_sense_fail_cdb_invalid(void);
|
||||
static void udi_msc_sense_command_invalid(void);
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \name Routines manage SCSI Commands
|
||||
*/
|
||||
@@ -372,9 +366,7 @@ static void udi_msc_sbc_trans(bool b_read);
|
||||
|
||||
//@}
|
||||
|
||||
|
||||
bool udi_msc_enable(void)
|
||||
{
|
||||
bool udi_msc_enable(void) {
|
||||
uint8_t lun;
|
||||
udi_msc_b_trans_req = false;
|
||||
udi_msc_b_cbw_invalid = false;
|
||||
@@ -397,18 +389,14 @@ bool udi_msc_enable(void)
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
void udi_msc_disable(void)
|
||||
{
|
||||
void udi_msc_disable(void) {
|
||||
udi_msc_b_trans_req = false;
|
||||
udi_msc_b_ack_trans = true;
|
||||
udi_msc_b_reset_trans = true;
|
||||
UDI_MSC_DISABLE_EXT();
|
||||
}
|
||||
|
||||
|
||||
bool udi_msc_setup(void)
|
||||
{
|
||||
bool udi_msc_setup(void) {
|
||||
if (Udd_setup_is_in()) {
|
||||
// Requests Interface GET
|
||||
if (Udd_setup_type() == USB_REQ_TYPE_CLASS) {
|
||||
@@ -451,17 +439,14 @@ bool udi_msc_setup(void)
|
||||
return false; // Not supported request
|
||||
}
|
||||
|
||||
uint8_t udi_msc_getsetting(void)
|
||||
{
|
||||
uint8_t udi_msc_getsetting(void) {
|
||||
return 0; // MSC don't have multiple alternate setting
|
||||
}
|
||||
|
||||
|
||||
// ------------------------
|
||||
//------- Routines to process CBW packet
|
||||
|
||||
static void udi_msc_cbw_invalid(void)
|
||||
{
|
||||
static void udi_msc_cbw_invalid(void) {
|
||||
if (!udi_msc_b_cbw_invalid)
|
||||
return; // Don't re-stall endpoint if error reset by setup
|
||||
udd_ep_set_halt(UDI_MSC_EP_OUT);
|
||||
@@ -469,8 +454,7 @@ static void udi_msc_cbw_invalid(void)
|
||||
udd_ep_wait_stall_clear(UDI_MSC_EP_OUT, udi_msc_cbw_invalid);
|
||||
}
|
||||
|
||||
static void udi_msc_csw_invalid(void)
|
||||
{
|
||||
static void udi_msc_csw_invalid(void) {
|
||||
if (!udi_msc_b_cbw_invalid)
|
||||
return; // Don't re-stall endpoint if error reset by setup
|
||||
udd_ep_set_halt(UDI_MSC_EP_IN);
|
||||
@@ -478,8 +462,7 @@ static void udi_msc_csw_invalid(void)
|
||||
udd_ep_wait_stall_clear(UDI_MSC_EP_IN, udi_msc_csw_invalid);
|
||||
}
|
||||
|
||||
static void udi_msc_cbw_wait(void)
|
||||
{
|
||||
static void udi_msc_cbw_wait(void) {
|
||||
// Register buffer and callback on OUT endpoint
|
||||
if (!udd_ep_run(UDI_MSC_EP_OUT, true,
|
||||
(uint8_t *) & udi_msc_cbw,
|
||||
@@ -490,10 +473,8 @@ static void udi_msc_cbw_wait(void)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_cbw_received(udd_ep_status_t status,
|
||||
iram_size_t nb_received, udd_ep_id_t ep)
|
||||
{
|
||||
iram_size_t nb_received, udd_ep_id_t ep) {
|
||||
UNUSED(ep);
|
||||
// Check status of transfer
|
||||
if (UDD_EP_TRANSFER_OK != status) {
|
||||
@@ -582,9 +563,7 @@ static void udi_msc_cbw_received(udd_ep_status_t status,
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static bool udi_msc_cbw_validate(uint32_t alloc_len, uint8_t dir_flag)
|
||||
{
|
||||
static bool udi_msc_cbw_validate(uint32_t alloc_len, uint8_t dir_flag) {
|
||||
/*
|
||||
* The following cases should result in a phase error:
|
||||
* - Case 2: Hn < Di
|
||||
@@ -612,12 +591,10 @@ static bool udi_msc_cbw_validate(uint32_t alloc_len, uint8_t dir_flag)
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
// ------------------------
|
||||
//------- Routines to process small data packet
|
||||
|
||||
static void udi_msc_data_send(uint8_t * buffer, uint8_t buf_size)
|
||||
{
|
||||
static void udi_msc_data_send(uint8_t * buffer, uint8_t buf_size) {
|
||||
// Sends data on IN endpoint
|
||||
if (!udd_ep_run(UDI_MSC_EP_IN, true,
|
||||
buffer, buf_size, udi_msc_data_sent)) {
|
||||
@@ -627,10 +604,8 @@ static void udi_msc_data_send(uint8_t * buffer, uint8_t buf_size)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_data_sent(udd_ep_status_t status, iram_size_t nb_sent,
|
||||
udd_ep_id_t ep)
|
||||
{
|
||||
udd_ep_id_t ep) {
|
||||
UNUSED(ep);
|
||||
if (UDD_EP_TRANSFER_OK != status) {
|
||||
// Error protocol
|
||||
@@ -644,12 +619,10 @@ static void udi_msc_data_sent(udd_ep_status_t status, iram_size_t nb_sent,
|
||||
udi_msc_csw_process();
|
||||
}
|
||||
|
||||
|
||||
// ------------------------
|
||||
//------- Routines to process CSW packet
|
||||
|
||||
static void udi_msc_csw_process(void)
|
||||
{
|
||||
static void udi_msc_csw_process(void) {
|
||||
if (0 != udi_msc_csw.dCSWDataResidue) {
|
||||
// Residue not NULL
|
||||
// then STALL next request from USB host on corresponding endpoint
|
||||
@@ -664,9 +637,7 @@ static void udi_msc_csw_process(void)
|
||||
udi_msc_csw_send();
|
||||
}
|
||||
|
||||
|
||||
void udi_msc_csw_send(void)
|
||||
{
|
||||
void udi_msc_csw_send(void) {
|
||||
// Sends CSW on IN endpoint
|
||||
if (!udd_ep_run(UDI_MSC_EP_IN, false,
|
||||
(uint8_t *) & udi_msc_csw,
|
||||
@@ -678,10 +649,8 @@ void udi_msc_csw_send(void)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_csw_sent(udd_ep_status_t status, iram_size_t nb_sent,
|
||||
udd_ep_id_t ep)
|
||||
{
|
||||
udd_ep_id_t ep) {
|
||||
UNUSED(ep);
|
||||
UNUSED(status);
|
||||
UNUSED(nb_sent);
|
||||
@@ -690,20 +659,17 @@ static void udi_msc_csw_sent(udd_ep_status_t status, iram_size_t nb_sent,
|
||||
udi_msc_cbw_wait();
|
||||
}
|
||||
|
||||
|
||||
// ------------------------
|
||||
//------- Routines manage sense data
|
||||
|
||||
static void udi_msc_clear_sense(void)
|
||||
{
|
||||
static void udi_msc_clear_sense(void) {
|
||||
memset((uint8_t*)&udi_msc_sense, 0, sizeof(struct scsi_request_sense_data));
|
||||
udi_msc_sense.valid_reponse_code = SCSI_SENSE_VALID | SCSI_SENSE_CURRENT;
|
||||
udi_msc_sense.AddSenseLen = SCSI_SENSE_ADDL_LEN(sizeof(udi_msc_sense));
|
||||
}
|
||||
|
||||
static void udi_msc_sense_fail(uint8_t sense_key, uint16_t add_sense,
|
||||
uint32_t lba)
|
||||
{
|
||||
uint32_t lba) {
|
||||
udi_msc_clear_sense();
|
||||
udi_msc_csw.bCSWStatus = USB_CSW_STATUS_FAIL;
|
||||
udi_msc_sense.sense_flag_key = sense_key;
|
||||
@@ -715,53 +681,39 @@ static void udi_msc_sense_fail(uint8_t sense_key, uint16_t add_sense,
|
||||
udi_msc_sense.AddSnsCodeQlfr = add_sense;
|
||||
}
|
||||
|
||||
static void udi_msc_sense_pass(void)
|
||||
{
|
||||
static void udi_msc_sense_pass(void) {
|
||||
udi_msc_clear_sense();
|
||||
udi_msc_csw.bCSWStatus = USB_CSW_STATUS_PASS;
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_sense_fail_not_present(void)
|
||||
{
|
||||
static void udi_msc_sense_fail_not_present(void) {
|
||||
udi_msc_sense_fail(SCSI_SK_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT, 0);
|
||||
}
|
||||
|
||||
static void udi_msc_sense_fail_busy_or_change(void)
|
||||
{
|
||||
udi_msc_sense_fail(SCSI_SK_UNIT_ATTENTION,
|
||||
SCSI_ASC_NOT_READY_TO_READY_CHANGE, 0);
|
||||
static void udi_msc_sense_fail_busy_or_change(void) {
|
||||
udi_msc_sense_fail(SCSI_SK_UNIT_ATTENTION, SCSI_ASC_NOT_READY_TO_READY_CHANGE, 0);
|
||||
}
|
||||
|
||||
static void udi_msc_sense_fail_hardware(void)
|
||||
{
|
||||
udi_msc_sense_fail(SCSI_SK_HARDWARE_ERROR,
|
||||
SCSI_ASC_NO_ADDITIONAL_SENSE_INFO, 0);
|
||||
static void udi_msc_sense_fail_hardware(void) {
|
||||
udi_msc_sense_fail(SCSI_SK_HARDWARE_ERROR, SCSI_ASC_NO_ADDITIONAL_SENSE_INFO, 0);
|
||||
}
|
||||
|
||||
static void udi_msc_sense_fail_protected(void)
|
||||
{
|
||||
static void udi_msc_sense_fail_protected(void) {
|
||||
udi_msc_sense_fail(SCSI_SK_DATA_PROTECT, SCSI_ASC_WRITE_PROTECTED, 0);
|
||||
}
|
||||
|
||||
static void udi_msc_sense_fail_cdb_invalid(void)
|
||||
{
|
||||
udi_msc_sense_fail(SCSI_SK_ILLEGAL_REQUEST,
|
||||
SCSI_ASC_INVALID_FIELD_IN_CDB, 0);
|
||||
static void udi_msc_sense_fail_cdb_invalid(void) {
|
||||
udi_msc_sense_fail(SCSI_SK_ILLEGAL_REQUEST, SCSI_ASC_INVALID_FIELD_IN_CDB, 0);
|
||||
}
|
||||
|
||||
static void udi_msc_sense_command_invalid(void)
|
||||
{
|
||||
udi_msc_sense_fail(SCSI_SK_ILLEGAL_REQUEST,
|
||||
SCSI_ASC_INVALID_COMMAND_OPERATION_CODE, 0);
|
||||
static void udi_msc_sense_command_invalid(void) {
|
||||
udi_msc_sense_fail(SCSI_SK_ILLEGAL_REQUEST, SCSI_ASC_INVALID_COMMAND_OPERATION_CODE, 0);
|
||||
}
|
||||
|
||||
|
||||
// ------------------------
|
||||
//------- Routines manage SCSI Commands
|
||||
|
||||
static void udi_msc_spc_requestsense(void)
|
||||
{
|
||||
static void udi_msc_spc_requestsense(void) {
|
||||
uint8_t length = udi_msc_cbw.CDB[4];
|
||||
|
||||
// Can't send more than sense data length
|
||||
@@ -774,9 +726,7 @@ static void udi_msc_spc_requestsense(void)
|
||||
udi_msc_data_send((uint8_t*)&udi_msc_sense, length);
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_spc_inquiry(void)
|
||||
{
|
||||
static void udi_msc_spc_inquiry(void) {
|
||||
uint8_t length, i;
|
||||
UDC_DATA(4)
|
||||
// Constant inquiry data for all LUNs
|
||||
@@ -835,9 +785,7 @@ static void udi_msc_spc_inquiry(void)
|
||||
udi_msc_data_send((uint8_t *) & udi_msc_inquiry_data, length);
|
||||
}
|
||||
|
||||
|
||||
static bool udi_msc_spc_testunitready_global(void)
|
||||
{
|
||||
static bool udi_msc_spc_testunitready_global(void) {
|
||||
switch (mem_test_unit_ready(udi_msc_cbw.bCBWLUN)) {
|
||||
case CTRL_GOOD:
|
||||
return true; // Don't change sense data
|
||||
@@ -855,9 +803,7 @@ static bool udi_msc_spc_testunitready_global(void)
|
||||
return false;
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_spc_testunitready(void)
|
||||
{
|
||||
static void udi_msc_spc_testunitready(void) {
|
||||
if (udi_msc_spc_testunitready_global()) {
|
||||
// LUN ready, then update sense data with status pass
|
||||
udi_msc_sense_pass();
|
||||
@@ -866,9 +812,7 @@ static void udi_msc_spc_testunitready(void)
|
||||
udi_msc_csw_process();
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_spc_mode_sense(bool b_sense10)
|
||||
{
|
||||
static void udi_msc_spc_mode_sense(bool b_sense10) {
|
||||
// Union of all mode sense structures
|
||||
union sense_6_10 {
|
||||
struct {
|
||||
@@ -943,9 +887,7 @@ static void udi_msc_spc_mode_sense(bool b_sense10)
|
||||
udi_msc_data_send((uint8_t *) & sense, request_lgt);
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_spc_prevent_allow_medium_removal(void)
|
||||
{
|
||||
static void udi_msc_spc_prevent_allow_medium_removal(void) {
|
||||
uint8_t prevent = udi_msc_cbw.CDB[4];
|
||||
if (0 == prevent) {
|
||||
udi_msc_sense_pass();
|
||||
@@ -955,9 +897,7 @@ static void udi_msc_spc_prevent_allow_medium_removal(void)
|
||||
udi_msc_csw_process();
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_sbc_start_stop(void)
|
||||
{
|
||||
static void udi_msc_sbc_start_stop(void) {
|
||||
bool start = 0x1 & udi_msc_cbw.CDB[4];
|
||||
bool loej = 0x2 & udi_msc_cbw.CDB[4];
|
||||
if (loej) {
|
||||
@@ -967,9 +907,7 @@ static void udi_msc_sbc_start_stop(void)
|
||||
udi_msc_csw_process();
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_sbc_read_capacity(void)
|
||||
{
|
||||
static void udi_msc_sbc_read_capacity(void) {
|
||||
UDC_BSS(4) static struct sbc_read_capacity10_data udi_msc_capacity;
|
||||
|
||||
if (!udi_msc_cbw_validate(sizeof(udi_msc_capacity),
|
||||
@@ -1003,9 +941,7 @@ static void udi_msc_sbc_read_capacity(void)
|
||||
sizeof(udi_msc_capacity));
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_sbc_trans(bool b_read)
|
||||
{
|
||||
static void udi_msc_sbc_trans(bool b_read) {
|
||||
uint32_t trans_size;
|
||||
|
||||
if (!b_read) {
|
||||
@@ -1038,9 +974,7 @@ static void udi_msc_sbc_trans(bool b_read)
|
||||
UDI_MSC_NOTIFY_TRANS_EXT();
|
||||
}
|
||||
|
||||
|
||||
bool udi_msc_process_trans(void)
|
||||
{
|
||||
bool udi_msc_process_trans(void) {
|
||||
Ctrl_status status;
|
||||
|
||||
if (!udi_msc_b_trans_req)
|
||||
@@ -1084,10 +1018,8 @@ bool udi_msc_process_trans(void)
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_trans_ack(udd_ep_status_t status, iram_size_t n,
|
||||
udd_ep_id_t ep)
|
||||
{
|
||||
udd_ep_id_t ep) {
|
||||
UNUSED(ep);
|
||||
UNUSED(n);
|
||||
// Update variable to signal the end of transfer
|
||||
@@ -1095,10 +1027,8 @@ static void udi_msc_trans_ack(udd_ep_status_t status, iram_size_t n,
|
||||
udi_msc_b_ack_trans = true;
|
||||
}
|
||||
|
||||
|
||||
bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
|
||||
void (*callback) (udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep))
|
||||
{
|
||||
void (*callback) (udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep)) {
|
||||
if (!udi_msc_b_ack_trans)
|
||||
return false; // No possible, transfer on going
|
||||
|
||||
@@ -1127,6 +1057,6 @@ bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
|
||||
|
||||
//@}
|
||||
|
||||
#endif // SDSUPPORT
|
||||
#endif // HAS_MEDIA
|
||||
|
||||
#endif // ARDUINO_ARCH_SAM
|
||||
|
@@ -77,9 +77,9 @@ extern UDC_DESC_STORAGE udi_api_t udi_api_msc;
|
||||
|
||||
//! Interface descriptor structure for MSC
|
||||
typedef struct {
|
||||
usb_iface_desc_t iface;
|
||||
usb_ep_desc_t ep_in;
|
||||
usb_ep_desc_t ep_out;
|
||||
usb_iface_desc_t iface;
|
||||
usb_ep_desc_t ep_in;
|
||||
usb_ep_desc_t ep_out;
|
||||
} udi_msc_desc_t;
|
||||
|
||||
//! By default no string associated to this interface
|
||||
@@ -94,32 +94,32 @@ typedef struct {
|
||||
|
||||
//! Content of MSC interface descriptor for all speeds
|
||||
#define UDI_MSC_DESC \
|
||||
.iface.bLength = sizeof(usb_iface_desc_t),\
|
||||
.iface.bDescriptorType = USB_DT_INTERFACE,\
|
||||
.iface.bInterfaceNumber = UDI_MSC_IFACE_NUMBER,\
|
||||
.iface.bAlternateSetting = 0,\
|
||||
.iface.bNumEndpoints = 2,\
|
||||
.iface.bInterfaceClass = MSC_CLASS,\
|
||||
.iface.bInterfaceSubClass = MSC_SUBCLASS_TRANSPARENT,\
|
||||
.iface.bInterfaceProtocol = MSC_PROTOCOL_BULK,\
|
||||
.iface.iInterface = UDI_MSC_STRING_ID,\
|
||||
.ep_in.bLength = sizeof(usb_ep_desc_t),\
|
||||
.ep_in.bDescriptorType = USB_DT_ENDPOINT,\
|
||||
.ep_in.bEndpointAddress = UDI_MSC_EP_IN,\
|
||||
.ep_in.bmAttributes = USB_EP_TYPE_BULK,\
|
||||
.ep_in.bInterval = 0,\
|
||||
.ep_out.bLength = sizeof(usb_ep_desc_t),\
|
||||
.ep_out.bDescriptorType = USB_DT_ENDPOINT,\
|
||||
.ep_out.bEndpointAddress = UDI_MSC_EP_OUT,\
|
||||
.ep_out.bmAttributes = USB_EP_TYPE_BULK,\
|
||||
.ep_out.bInterval = 0,
|
||||
.iface.bLength = sizeof(usb_iface_desc_t),\
|
||||
.iface.bDescriptorType = USB_DT_INTERFACE,\
|
||||
.iface.bInterfaceNumber = UDI_MSC_IFACE_NUMBER,\
|
||||
.iface.bAlternateSetting = 0,\
|
||||
.iface.bNumEndpoints = 2,\
|
||||
.iface.bInterfaceClass = MSC_CLASS,\
|
||||
.iface.bInterfaceSubClass = MSC_SUBCLASS_TRANSPARENT,\
|
||||
.iface.bInterfaceProtocol = MSC_PROTOCOL_BULK,\
|
||||
.iface.iInterface = UDI_MSC_STRING_ID,\
|
||||
.ep_in.bLength = sizeof(usb_ep_desc_t),\
|
||||
.ep_in.bDescriptorType = USB_DT_ENDPOINT,\
|
||||
.ep_in.bEndpointAddress = UDI_MSC_EP_IN,\
|
||||
.ep_in.bmAttributes = USB_EP_TYPE_BULK,\
|
||||
.ep_in.bInterval = 0,\
|
||||
.ep_out.bLength = sizeof(usb_ep_desc_t),\
|
||||
.ep_out.bDescriptorType = USB_DT_ENDPOINT,\
|
||||
.ep_out.bEndpointAddress = UDI_MSC_EP_OUT,\
|
||||
.ep_out.bmAttributes = USB_EP_TYPE_BULK,\
|
||||
.ep_out.bInterval = 0,
|
||||
|
||||
//! Content of MSC interface descriptor for full speed only
|
||||
#define UDI_MSC_DESC_FS {\
|
||||
UDI_MSC_DESC \
|
||||
.ep_in.wMaxPacketSize = LE16(UDI_MSC_EPS_SIZE_FS),\
|
||||
.ep_out.wMaxPacketSize = LE16(UDI_MSC_EPS_SIZE_FS),\
|
||||
}
|
||||
UDI_MSC_DESC \
|
||||
.ep_in.wMaxPacketSize = LE16(UDI_MSC_EPS_SIZE_FS),\
|
||||
.ep_out.wMaxPacketSize = LE16(UDI_MSC_EPS_SIZE_FS),\
|
||||
}
|
||||
|
||||
//! Content of MSC interface descriptor for high speed only
|
||||
#define UDI_MSC_DESC_HS {\
|
||||
@@ -129,7 +129,6 @@ typedef struct {
|
||||
}
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \ingroup udi_group
|
||||
* \defgroup udi_msc_group USB Device Interface (UDI) for Mass Storage Class (MSC)
|
||||
@@ -163,14 +162,13 @@ bool udi_msc_process_trans(void);
|
||||
* \return \c 1 if function was successfully done, otherwise \c 0.
|
||||
*/
|
||||
bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
|
||||
void (*callback) (udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep));
|
||||
void (*callback) (udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep));
|
||||
//@}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* \page udi_msc_quickstart Quick start guide for USB device Mass Storage module (UDI MSC)
|
||||
*
|
||||
@@ -200,35 +198,32 @@ bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
|
||||
* \subsection udi_msc_basic_use_case_usage_code Example code
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#define USB_DEVICE_SERIAL_NAME "12...EF" // Disk SN for MSC
|
||||
#define UDI_MSC_GLOBAL_VENDOR_ID \
|
||||
'A', 'T', 'M', 'E', 'L', ' ', ' ', ' '
|
||||
#define UDI_MSC_GLOBAL_PRODUCT_VERSION \
|
||||
'1', '.', '0', '0'
|
||||
#define UDI_MSC_ENABLE_EXT() my_callback_msc_enable()
|
||||
extern bool my_callback_msc_enable(void);
|
||||
#define UDI_MSC_DISABLE_EXT() my_callback_msc_disable()
|
||||
extern void my_callback_msc_disable(void);
|
||||
#include "udi_msc_conf.h" // At the end of conf_usb.h file
|
||||
#define USB_DEVICE_SERIAL_NAME "12...EF" // Disk SN for MSC
|
||||
#define UDI_MSC_GLOBAL_VENDOR_ID \
|
||||
'A', 'T', 'M', 'E', 'L', ' ', ' ', ' '
|
||||
#define UDI_MSC_GLOBAL_PRODUCT_VERSION \
|
||||
'1', '.', '0', '0'
|
||||
#define UDI_MSC_ENABLE_EXT() my_callback_msc_enable()
|
||||
extern bool my_callback_msc_enable(void);
|
||||
#define UDI_MSC_DISABLE_EXT() my_callback_msc_disable()
|
||||
extern void my_callback_msc_disable(void);
|
||||
#include "udi_msc_conf.h" // At the end of conf_usb.h file
|
||||
\endcode
|
||||
*
|
||||
* Add to application C-file:
|
||||
* \code
|
||||
static bool my_flag_autorize_msc_transfert = false;
|
||||
bool my_callback_msc_enable(void)
|
||||
{
|
||||
my_flag_autorize_msc_transfert = true;
|
||||
return true;
|
||||
}
|
||||
void my_callback_msc_disable(void)
|
||||
{
|
||||
my_flag_autorize_msc_transfert = false;
|
||||
}
|
||||
static bool my_flag_autorize_msc_transfert = false;
|
||||
bool my_callback_msc_enable(void) {
|
||||
my_flag_autorize_msc_transfert = true;
|
||||
return true;
|
||||
}
|
||||
void my_callback_msc_disable(void) {
|
||||
my_flag_autorize_msc_transfert = false;
|
||||
}
|
||||
|
||||
void task(void)
|
||||
{
|
||||
udi_msc_process_trans();
|
||||
}
|
||||
void task(void) {
|
||||
udi_msc_process_trans();
|
||||
}
|
||||
\endcode
|
||||
*
|
||||
* \subsection udi_msc_basic_use_case_setup_flow Workflow
|
||||
@@ -237,14 +232,14 @@ bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
|
||||
* - \code #define USB_DEVICE_SERIAL_NAME "12...EF" // Disk SN for MSC \endcode
|
||||
* \note The USB serial number is mandatory when a MSC interface is used.
|
||||
* - \code //! Vendor name and Product version of MSC interface
|
||||
#define UDI_MSC_GLOBAL_VENDOR_ID \
|
||||
'A', 'T', 'M', 'E', 'L', ' ', ' ', ' '
|
||||
#define UDI_MSC_GLOBAL_PRODUCT_VERSION \
|
||||
'1', '.', '0', '0' \endcode
|
||||
#define UDI_MSC_GLOBAL_VENDOR_ID \
|
||||
'A', 'T', 'M', 'E', 'L', ' ', ' ', ' '
|
||||
#define UDI_MSC_GLOBAL_PRODUCT_VERSION \
|
||||
'1', '.', '0', '0' \endcode
|
||||
* \note The USB MSC interface requires a vendor ID (8 ASCII characters)
|
||||
* and a product version (4 ASCII characters).
|
||||
* - \code #define UDI_MSC_ENABLE_EXT() my_callback_msc_enable()
|
||||
extern bool my_callback_msc_enable(void); \endcode
|
||||
extern bool my_callback_msc_enable(void); \endcode
|
||||
* \note After the device enumeration (detecting and identifying USB devices),
|
||||
* the USB host starts the device configuration. When the USB MSC interface
|
||||
* from the device is accepted by the host, the USB host enables this interface and the
|
||||
@@ -252,7 +247,7 @@ bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
|
||||
* Thus, when this event is received, the tasks which call
|
||||
* udi_msc_process_trans() must be enabled.
|
||||
* - \code #define UDI_MSC_DISABLE_EXT() my_callback_msc_disable()
|
||||
extern void my_callback_msc_disable(void); \endcode
|
||||
extern void my_callback_msc_disable(void); \endcode
|
||||
* \note When the USB device is unplugged or is reset by the USB host, the USB
|
||||
* interface is disabled and the UDI_MSC_DISABLE_EXT() callback function
|
||||
* is called. Thus, it is recommended to disable the task which is called udi_msc_process_trans().
|
||||
@@ -261,15 +256,15 @@ bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
|
||||
* must be done outside USB interrupt routine. This is done in the MSC process
|
||||
* ("udi_msc_process_trans()") called by main loop:
|
||||
* - \code * void task(void) {
|
||||
udi_msc_process_trans();
|
||||
} \endcode
|
||||
udi_msc_process_trans();
|
||||
} \endcode
|
||||
* -# The MSC speed depends on task periodicity. To get the best speed
|
||||
* the notification callback "UDI_MSC_NOTIFY_TRANS_EXT" can be used to wakeup
|
||||
* this task (Example, through a mutex):
|
||||
* - \code #define UDI_MSC_NOTIFY_TRANS_EXT() msc_notify_trans()
|
||||
void msc_notify_trans(void) {
|
||||
wakeup_my_task();
|
||||
} \endcode
|
||||
void msc_notify_trans(void) {
|
||||
wakeup_my_task();
|
||||
} \endcode
|
||||
*
|
||||
* \section udi_msc_use_cases Advanced use cases
|
||||
* For more advanced use of the UDI MSC module, see the following use cases:
|
||||
@@ -302,72 +297,72 @@ bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
|
||||
* \subsection udi_msc_use_case_composite_usage_code Example code
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#define USB_DEVICE_EP_CTRL_SIZE 64
|
||||
#define USB_DEVICE_NB_INTERFACE (X+1)
|
||||
#define USB_DEVICE_MAX_EP (X+2)
|
||||
#define USB_DEVICE_EP_CTRL_SIZE 64
|
||||
#define USB_DEVICE_NB_INTERFACE (X+1)
|
||||
#define USB_DEVICE_MAX_EP (X+2)
|
||||
|
||||
#define UDI_MSC_EP_IN (X | USB_EP_DIR_IN)
|
||||
#define UDI_MSC_EP_OUT (Y | USB_EP_DIR_OUT)
|
||||
#define UDI_MSC_IFACE_NUMBER X
|
||||
#define UDI_MSC_EP_IN (X | USB_EP_DIR_IN)
|
||||
#define UDI_MSC_EP_OUT (Y | USB_EP_DIR_OUT)
|
||||
#define UDI_MSC_IFACE_NUMBER X
|
||||
|
||||
#define UDI_COMPOSITE_DESC_T \
|
||||
udi_msc_desc_t udi_msc; \
|
||||
...
|
||||
#define UDI_COMPOSITE_DESC_FS \
|
||||
.udi_msc = UDI_MSC_DESC, \
|
||||
...
|
||||
#define UDI_COMPOSITE_DESC_HS \
|
||||
.udi_msc = UDI_MSC_DESC, \
|
||||
...
|
||||
#define UDI_COMPOSITE_API \
|
||||
&udi_api_msc, \
|
||||
...
|
||||
#define UDI_COMPOSITE_DESC_T \
|
||||
udi_msc_desc_t udi_msc; \
|
||||
...
|
||||
#define UDI_COMPOSITE_DESC_FS \
|
||||
.udi_msc = UDI_MSC_DESC, \
|
||||
...
|
||||
#define UDI_COMPOSITE_DESC_HS \
|
||||
.udi_msc = UDI_MSC_DESC, \
|
||||
...
|
||||
#define UDI_COMPOSITE_API \
|
||||
&udi_api_msc, \
|
||||
...
|
||||
\endcode
|
||||
*
|
||||
* \subsection udi_msc_use_case_composite_usage_flow Workflow
|
||||
* -# Ensure that conf_usb.h is available and contains the following parameters
|
||||
* required for a USB composite device configuration:
|
||||
* - \code // Endpoint control size, This must be:
|
||||
// - 8, 16, 32 or 64 for full speed device (8 is recommended to save RAM)
|
||||
// - 64 for a high speed device
|
||||
#define USB_DEVICE_EP_CTRL_SIZE 64
|
||||
// Total Number of interfaces on this USB device.
|
||||
// Add 1 for MSC.
|
||||
#define USB_DEVICE_NB_INTERFACE (X+1)
|
||||
// Total number of endpoints on this USB device.
|
||||
// This must include each endpoint for each interface.
|
||||
// Add 2 for MSC.
|
||||
#define USB_DEVICE_MAX_EP (X+2) \endcode
|
||||
// - 8, 16, 32 or 64 for full speed device (8 is recommended to save RAM)
|
||||
// - 64 for a high speed device
|
||||
#define USB_DEVICE_EP_CTRL_SIZE 64
|
||||
// Total Number of interfaces on this USB device.
|
||||
// Add 1 for MSC.
|
||||
#define USB_DEVICE_NB_INTERFACE (X+1)
|
||||
// Total number of endpoints on this USB device.
|
||||
// This must include each endpoint for each interface.
|
||||
// Add 2 for MSC.
|
||||
#define USB_DEVICE_MAX_EP (X+2) \endcode
|
||||
* -# Ensure that conf_usb.h contains the description of
|
||||
* composite device:
|
||||
* - \code // The endpoint numbers chosen by you for the MSC.
|
||||
// The endpoint numbers starting from 1.
|
||||
#define UDI_MSC_EP_IN (X | USB_EP_DIR_IN)
|
||||
#define UDI_MSC_EP_OUT (Y | USB_EP_DIR_OUT)
|
||||
// The interface index of an interface starting from 0
|
||||
#define UDI_MSC_IFACE_NUMBER X \endcode
|
||||
// The endpoint numbers starting from 1.
|
||||
#define UDI_MSC_EP_IN (X | USB_EP_DIR_IN)
|
||||
#define UDI_MSC_EP_OUT (Y | USB_EP_DIR_OUT)
|
||||
// The interface index of an interface starting from 0
|
||||
#define UDI_MSC_IFACE_NUMBER X \endcode
|
||||
* -# Ensure that conf_usb.h contains the following parameters
|
||||
* required for a USB composite device configuration:
|
||||
* - \code // USB Interfaces descriptor structure
|
||||
#define UDI_COMPOSITE_DESC_T \
|
||||
...
|
||||
udi_msc_desc_t udi_msc; \
|
||||
...
|
||||
// USB Interfaces descriptor value for Full Speed
|
||||
#define UDI_COMPOSITE_DESC_FS \
|
||||
...
|
||||
.udi_msc = UDI_MSC_DESC_FS, \
|
||||
...
|
||||
// USB Interfaces descriptor value for High Speed
|
||||
#define UDI_COMPOSITE_DESC_HS \
|
||||
...
|
||||
.udi_msc = UDI_MSC_DESC_HS, \
|
||||
...
|
||||
// USB Interface APIs
|
||||
#define UDI_COMPOSITE_API \
|
||||
...
|
||||
&udi_api_msc, \
|
||||
... \endcode
|
||||
#define UDI_COMPOSITE_DESC_T \
|
||||
...
|
||||
udi_msc_desc_t udi_msc; \
|
||||
...
|
||||
// USB Interfaces descriptor value for Full Speed
|
||||
#define UDI_COMPOSITE_DESC_FS \
|
||||
...
|
||||
.udi_msc = UDI_MSC_DESC_FS, \
|
||||
...
|
||||
// USB Interfaces descriptor value for High Speed
|
||||
#define UDI_COMPOSITE_DESC_HS \
|
||||
...
|
||||
.udi_msc = UDI_MSC_DESC_HS, \
|
||||
...
|
||||
// USB Interface APIs
|
||||
#define UDI_COMPOSITE_API \
|
||||
...
|
||||
&udi_api_msc, \
|
||||
... \endcode
|
||||
* - \note The descriptors order given in the four lists above must be the
|
||||
* same as the order defined by all interface indexes. The interface index
|
||||
* orders are defined through UDI_X_IFACE_NUMBER defines.
|
||||
|
@@ -276,7 +276,6 @@
|
||||
# endif
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* \name Power management routine.
|
||||
*/
|
||||
@@ -293,7 +292,6 @@ static bool udd_b_idle;
|
||||
//! State of sleep manager
|
||||
static bool udd_b_sleep_initialized = false;
|
||||
|
||||
|
||||
/*! \brief Authorize or not the CPU powerdown mode
|
||||
*
|
||||
* \param b_enable true to authorize idle mode
|
||||
@@ -321,7 +319,6 @@ static void udd_sleep_mode(bool b_idle)
|
||||
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \name Control endpoint low level management routine.
|
||||
*
|
||||
@@ -393,7 +390,6 @@ static void udd_ctrl_send_zlp_out(void);
|
||||
//! \brief Call callback associated to setup request
|
||||
static void udd_ctrl_endofrequest(void);
|
||||
|
||||
|
||||
/**
|
||||
* \brief Main interrupt routine for control endpoint
|
||||
*
|
||||
@@ -405,7 +401,6 @@ static bool udd_ctrl_interrupt(void);
|
||||
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \name Management of bulk/interrupt/isochronous endpoints
|
||||
*
|
||||
@@ -443,7 +438,6 @@ typedef struct {
|
||||
uint8_t stall_requested:1;
|
||||
} udd_ep_job_t;
|
||||
|
||||
|
||||
//! Array to register a job on bulk/interrupt/isochronous endpoint
|
||||
static udd_ep_job_t udd_ep_job[USB_DEVICE_MAX_EP];
|
||||
|
||||
@@ -505,7 +499,6 @@ static bool udd_ep_interrupt(void);
|
||||
#endif // (0!=USB_DEVICE_MAX_EP)
|
||||
//@}
|
||||
|
||||
|
||||
// ------------------------
|
||||
//--- INTERNAL ROUTINES TO MANAGED GLOBAL EVENTS
|
||||
|
||||
@@ -642,13 +635,11 @@ udd_interrupt_sof_end:
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
bool udd_include_vbus_monitoring(void)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
void udd_enable(void)
|
||||
{
|
||||
irqflags_t flags;
|
||||
@@ -735,7 +726,6 @@ void udd_enable(void)
|
||||
cpu_irq_restore(flags);
|
||||
}
|
||||
|
||||
|
||||
void udd_disable(void)
|
||||
{
|
||||
irqflags_t flags;
|
||||
@@ -776,7 +766,6 @@ void udd_disable(void)
|
||||
cpu_irq_restore(flags);
|
||||
}
|
||||
|
||||
|
||||
void udd_attach(void)
|
||||
{
|
||||
irqflags_t flags;
|
||||
@@ -817,7 +806,6 @@ void udd_attach(void)
|
||||
cpu_irq_restore(flags);
|
||||
}
|
||||
|
||||
|
||||
void udd_detach(void)
|
||||
{
|
||||
otg_unfreeze_clock();
|
||||
@@ -828,7 +816,6 @@ void udd_detach(void)
|
||||
udd_sleep_mode(false);
|
||||
}
|
||||
|
||||
|
||||
bool udd_is_high_speed(void)
|
||||
{
|
||||
#ifdef USB_DEVICE_HS_SUPPORT
|
||||
@@ -838,7 +825,6 @@ bool udd_is_high_speed(void)
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
void udd_set_address(uint8_t address)
|
||||
{
|
||||
udd_disable_address();
|
||||
@@ -846,13 +832,11 @@ void udd_set_address(uint8_t address)
|
||||
udd_enable_address();
|
||||
}
|
||||
|
||||
|
||||
uint8_t udd_getaddress(void)
|
||||
{
|
||||
return udd_get_configured_address();
|
||||
}
|
||||
|
||||
|
||||
uint16_t udd_get_frame_number(void)
|
||||
{
|
||||
return udd_frame_number();
|
||||
@@ -875,14 +859,12 @@ void udd_send_remotewakeup(void)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void udd_set_setup_payload(uint8_t *payload, uint16_t payload_size)
|
||||
{
|
||||
udd_g_ctrlreq.payload = payload;
|
||||
udd_g_ctrlreq.payload_size = payload_size;
|
||||
}
|
||||
|
||||
|
||||
#if (0 != USB_DEVICE_MAX_EP)
|
||||
bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes,
|
||||
uint16_t MaxEndpointSize)
|
||||
@@ -1006,7 +988,6 @@ bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes,
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
void udd_ep_free(udd_ep_id_t ep)
|
||||
{
|
||||
uint8_t ep_index = ep & USB_EP_ADDR_MASK;
|
||||
@@ -1019,14 +1000,12 @@ void udd_ep_free(udd_ep_id_t ep)
|
||||
udd_ep_job[ep_index - 1].stall_requested = false;
|
||||
}
|
||||
|
||||
|
||||
bool udd_ep_is_halted(udd_ep_id_t ep)
|
||||
{
|
||||
uint8_t ep_index = ep & USB_EP_ADDR_MASK;
|
||||
return Is_udd_endpoint_stall_requested(ep_index);
|
||||
}
|
||||
|
||||
|
||||
bool udd_ep_set_halt(udd_ep_id_t ep)
|
||||
{
|
||||
uint8_t ep_index = ep & USB_EP_ADDR_MASK;
|
||||
@@ -1067,7 +1046,6 @@ bool udd_ep_set_halt(udd_ep_id_t ep)
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
bool udd_ep_clear_halt(udd_ep_id_t ep)
|
||||
{
|
||||
uint8_t ep_index = ep & USB_EP_ADDR_MASK;
|
||||
@@ -1108,7 +1086,6 @@ bool udd_ep_clear_halt(udd_ep_id_t ep)
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket,
|
||||
uint8_t * buf, iram_size_t buf_size,
|
||||
udd_callback_trans_t callback)
|
||||
@@ -1175,7 +1152,6 @@ bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket,
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
void udd_ep_abort(udd_ep_id_t ep)
|
||||
{
|
||||
uint8_t ep_index = ep & USB_EP_ADDR_MASK;
|
||||
@@ -1204,7 +1180,6 @@ void udd_ep_abort(udd_ep_id_t ep)
|
||||
udd_ep_abort_job(ep);
|
||||
}
|
||||
|
||||
|
||||
bool udd_ep_wait_stall_clear(udd_ep_id_t ep,
|
||||
udd_callback_halt_cleared_t callback)
|
||||
{
|
||||
@@ -1239,7 +1214,6 @@ bool udd_ep_wait_stall_clear(udd_ep_id_t ep,
|
||||
}
|
||||
#endif // (0 != USB_DEVICE_MAX_EP)
|
||||
|
||||
|
||||
#ifdef USB_DEVICE_HS_SUPPORT
|
||||
|
||||
void udd_test_mode_j(void)
|
||||
@@ -1248,20 +1222,17 @@ void udd_test_mode_j(void)
|
||||
udd_enable_hs_test_mode_j();
|
||||
}
|
||||
|
||||
|
||||
void udd_test_mode_k(void)
|
||||
{
|
||||
udd_enable_hs_test_mode();
|
||||
udd_enable_hs_test_mode_k();
|
||||
}
|
||||
|
||||
|
||||
void udd_test_mode_se0_nak(void)
|
||||
{
|
||||
udd_enable_hs_test_mode();
|
||||
}
|
||||
|
||||
|
||||
void udd_test_mode_packet(void)
|
||||
{
|
||||
uint8_t i;
|
||||
@@ -1305,8 +1276,6 @@ void udd_test_mode_packet(void)
|
||||
}
|
||||
#endif // USB_DEVICE_HS_SUPPORT
|
||||
|
||||
|
||||
|
||||
// ------------------------
|
||||
//--- INTERNAL ROUTINES TO MANAGED THE CONTROL ENDPOINT
|
||||
|
||||
@@ -1356,7 +1325,6 @@ static void udd_ctrl_init(void)
|
||||
udd_ep_control_state = UDD_EPCTRL_SETUP;
|
||||
}
|
||||
|
||||
|
||||
static void udd_ctrl_setup_received(void)
|
||||
{
|
||||
irqflags_t flags;
|
||||
@@ -1418,7 +1386,6 @@ static void udd_ctrl_setup_received(void)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void udd_ctrl_in_sent(void)
|
||||
{
|
||||
static bool b_shortpacket = false;
|
||||
@@ -1502,7 +1469,6 @@ static void udd_ctrl_in_sent(void)
|
||||
cpu_irq_restore(flags);
|
||||
}
|
||||
|
||||
|
||||
static void udd_ctrl_out_received(void)
|
||||
{
|
||||
irqflags_t flags;
|
||||
@@ -1593,7 +1559,6 @@ static void udd_ctrl_out_received(void)
|
||||
cpu_irq_restore(flags);
|
||||
}
|
||||
|
||||
|
||||
static void udd_ctrl_underflow(void)
|
||||
{
|
||||
if (Is_udd_out_received(0))
|
||||
@@ -1610,7 +1575,6 @@ static void udd_ctrl_underflow(void)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void udd_ctrl_overflow(void)
|
||||
{
|
||||
if (Is_udd_in_send(0))
|
||||
@@ -1626,7 +1590,6 @@ static void udd_ctrl_overflow(void)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void udd_ctrl_stall_data(void)
|
||||
{
|
||||
// Stall all packets on IN & OUT control endpoint
|
||||
@@ -1634,7 +1597,6 @@ static void udd_ctrl_stall_data(void)
|
||||
udd_enable_stall_handshake(0);
|
||||
}
|
||||
|
||||
|
||||
static void udd_ctrl_send_zlp_in(void)
|
||||
{
|
||||
irqflags_t flags;
|
||||
@@ -1652,7 +1614,6 @@ static void udd_ctrl_send_zlp_in(void)
|
||||
cpu_irq_restore(flags);
|
||||
}
|
||||
|
||||
|
||||
static void udd_ctrl_send_zlp_out(void)
|
||||
{
|
||||
irqflags_t flags;
|
||||
@@ -1668,7 +1629,6 @@ static void udd_ctrl_send_zlp_out(void)
|
||||
cpu_irq_restore(flags);
|
||||
}
|
||||
|
||||
|
||||
static void udd_ctrl_endofrequest(void)
|
||||
{
|
||||
// If a callback is registered then call it
|
||||
@@ -1677,7 +1637,6 @@ static void udd_ctrl_endofrequest(void)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static bool udd_ctrl_interrupt(void)
|
||||
{
|
||||
|
||||
@@ -1728,7 +1687,6 @@ static bool udd_ctrl_interrupt(void)
|
||||
return false;
|
||||
}
|
||||
|
||||
|
||||
// ------------------------
|
||||
//--- INTERNAL ROUTINES TO MANAGED THE BULK/INTERRUPT/ISOCHRONOUS ENDPOINTS
|
||||
|
||||
@@ -1743,7 +1701,6 @@ static void udd_ep_job_table_reset(void)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void udd_ep_job_table_kill(void)
|
||||
{
|
||||
uint8_t i;
|
||||
@@ -1754,7 +1711,6 @@ static void udd_ep_job_table_kill(void)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void udd_ep_abort_job(udd_ep_id_t ep)
|
||||
{
|
||||
ep &= USB_EP_ADDR_MASK;
|
||||
@@ -1763,7 +1719,6 @@ static void udd_ep_abort_job(udd_ep_id_t ep)
|
||||
udd_ep_finish_job(&udd_ep_job[ep - 1], true, ep);
|
||||
}
|
||||
|
||||
|
||||
static void udd_ep_finish_job(udd_ep_job_t * ptr_job, bool b_abort, uint8_t ep_num)
|
||||
{
|
||||
if (ptr_job->busy == false) {
|
||||
@@ -1834,7 +1789,6 @@ static void udd_ep_trans_done(udd_ep_id_t ep)
|
||||
udd_dma_ctrl |= UOTGHS_DEVDMACONTROL_END_BUFFIT |
|
||||
UOTGHS_DEVDMACONTROL_CHANN_ENB;
|
||||
|
||||
|
||||
// Disable IRQs to have a short sequence
|
||||
// between read of EOT_STA and DMA enable
|
||||
flags = cpu_irq_save();
|
||||
|
@@ -129,7 +129,6 @@ extern "C" {
|
||||
#define Is_udd_vbus_transition() (Tst_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_VBUSTI))
|
||||
//! @}
|
||||
|
||||
|
||||
//! @name UOTGHS device attach control
|
||||
//! These macros manage the UOTGHS Device attach.
|
||||
//! @{
|
||||
@@ -141,7 +140,6 @@ extern "C" {
|
||||
#define Is_udd_detached() (Tst_bits(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_DETACH))
|
||||
//! @}
|
||||
|
||||
|
||||
//! @name UOTGHS device bus events control
|
||||
//! These macros manage the UOTGHS Device bus events.
|
||||
//! @{
|
||||
@@ -246,7 +244,6 @@ extern "C" {
|
||||
#define udd_get_configured_address() (Rd_bitfield(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_UADD_Msk))
|
||||
//! @}
|
||||
|
||||
|
||||
//! @name UOTGHS Device endpoint drivers
|
||||
//! These macros manage the common features of the endpoints.
|
||||
//! @{
|
||||
@@ -330,7 +327,6 @@ extern "C" {
|
||||
#define udd_data_toggle(ep) (Rd_bitfield(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_DTSEQ_Msk))
|
||||
//! @}
|
||||
|
||||
|
||||
//! @name UOTGHS Device control endpoint
|
||||
//! These macros control the endpoints.
|
||||
//! @{
|
||||
@@ -530,7 +526,6 @@ extern "C" {
|
||||
//! Tests if IN sending interrupt is enabled
|
||||
#define Is_udd_in_send_interrupt_enabled(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_TXINE))
|
||||
|
||||
|
||||
//! Get 64-, 32-, 16- or 8-bit access to FIFO data register of selected endpoint.
|
||||
//! @param ep Endpoint of which to access FIFO data register
|
||||
//! @param scale Data scale in bits: 64, 32, 16 or 8
|
||||
@@ -652,7 +647,6 @@ typedef struct {
|
||||
//! @}
|
||||
//! @}
|
||||
|
||||
|
||||
/// @cond 0
|
||||
/**INDENT-OFF**/
|
||||
#ifdef __cplusplus
|
||||
|
@@ -53,7 +53,6 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
//! \ingroup usb_group
|
||||
//! \defgroup otg_group UOTGHS OTG Driver
|
||||
//! UOTGHS low-level driver for OTG features
|
||||
@@ -74,7 +73,6 @@ bool otg_dual_enable(void);
|
||||
*/
|
||||
void otg_dual_disable(void);
|
||||
|
||||
|
||||
//! @name UOTGHS OTG ID pin management
|
||||
//! The ID pin come from the USB OTG connector (A and B receptable) and
|
||||
//! allows to select the USB mode host or device.
|
||||
@@ -127,13 +125,13 @@ void otg_dual_disable(void);
|
||||
//! These macros allows to enable/disable pad and UOTGHS hardware
|
||||
//! @{
|
||||
//! Reset USB macro
|
||||
#define otg_reset() \
|
||||
do { \
|
||||
UOTGHS->UOTGHS_CTRL = 0; \
|
||||
while( UOTGHS->UOTGHS_SR & 0x3FFF) {\
|
||||
UOTGHS->UOTGHS_SCR = 0xFFFFFFFF;\
|
||||
} \
|
||||
} while (0)
|
||||
#define otg_reset() \
|
||||
do { \
|
||||
UOTGHS->UOTGHS_CTRL = 0; \
|
||||
while( UOTGHS->UOTGHS_SR & 0x3FFF) { \
|
||||
UOTGHS->UOTGHS_SCR = 0xFFFFFFFF; \
|
||||
} \
|
||||
} while (0)
|
||||
//! Enable USB macro
|
||||
#define otg_enable() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_USBE))
|
||||
//! Disable USB macro
|
||||
@@ -157,15 +155,14 @@ void otg_dual_disable(void);
|
||||
|
||||
//! Configure time-out of specified OTG timer
|
||||
#define otg_configure_timeout(timer, timeout) (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK),\
|
||||
Wr_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMPAGE_Msk, timer),\
|
||||
Wr_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMVALUE_Msk, timeout),\
|
||||
Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK))
|
||||
Wr_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMPAGE_Msk, timer),\
|
||||
Wr_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMVALUE_Msk, timeout),\
|
||||
Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK))
|
||||
//! Get configured time-out of specified OTG timer
|
||||
#define otg_get_timeout(timer) (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK),\
|
||||
Wr_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMPAGE_Msk, timer),\
|
||||
Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK),\
|
||||
Rd_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMVALUE_Msk))
|
||||
|
||||
Wr_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMPAGE_Msk, timer),\
|
||||
Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK),\
|
||||
Rd_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMVALUE_Msk))
|
||||
|
||||
//! Get the dual-role device state of the internal USB finite state machine of the UOTGHS controller
|
||||
#define otg_get_fsm_drd_state() (Rd_bitfield(UOTGHS->UOTGHS_FSM, UOTGHS_FSM_DRDSTATE_Msk))
|
||||
|
@@ -108,17 +108,17 @@
|
||||
* \brief Standard USB requests (bRequest)
|
||||
*/
|
||||
enum usb_reqid {
|
||||
USB_REQ_GET_STATUS = 0,
|
||||
USB_REQ_CLEAR_FEATURE = 1,
|
||||
USB_REQ_SET_FEATURE = 3,
|
||||
USB_REQ_SET_ADDRESS = 5,
|
||||
USB_REQ_GET_DESCRIPTOR = 6,
|
||||
USB_REQ_SET_DESCRIPTOR = 7,
|
||||
USB_REQ_GET_CONFIGURATION = 8,
|
||||
USB_REQ_SET_CONFIGURATION = 9,
|
||||
USB_REQ_GET_INTERFACE = 10,
|
||||
USB_REQ_SET_INTERFACE = 11,
|
||||
USB_REQ_SYNCH_FRAME = 12,
|
||||
USB_REQ_GET_STATUS = 0,
|
||||
USB_REQ_CLEAR_FEATURE = 1,
|
||||
USB_REQ_SET_FEATURE = 3,
|
||||
USB_REQ_SET_ADDRESS = 5,
|
||||
USB_REQ_GET_DESCRIPTOR = 6,
|
||||
USB_REQ_SET_DESCRIPTOR = 7,
|
||||
USB_REQ_GET_CONFIGURATION = 8,
|
||||
USB_REQ_SET_CONFIGURATION = 9,
|
||||
USB_REQ_GET_INTERFACE = 10,
|
||||
USB_REQ_SET_INTERFACE = 11,
|
||||
USB_REQ_SYNCH_FRAME = 12,
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -126,9 +126,9 @@ enum usb_reqid {
|
||||
*
|
||||
*/
|
||||
enum usb_device_status {
|
||||
USB_DEV_STATUS_BUS_POWERED = 0,
|
||||
USB_DEV_STATUS_SELF_POWERED = 1,
|
||||
USB_DEV_STATUS_REMOTEWAKEUP = 2
|
||||
USB_DEV_STATUS_BUS_POWERED = 0,
|
||||
USB_DEV_STATUS_SELF_POWERED = 1,
|
||||
USB_DEV_STATUS_REMOTEWAKEUP = 2
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -136,7 +136,7 @@ enum usb_device_status {
|
||||
*
|
||||
*/
|
||||
enum usb_interface_status {
|
||||
USB_IFACE_STATUS_RESERVED = 0
|
||||
USB_IFACE_STATUS_RESERVED = 0
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -144,7 +144,7 @@ enum usb_interface_status {
|
||||
*
|
||||
*/
|
||||
enum usb_endpoint_status {
|
||||
USB_EP_STATUS_HALTED = 1,
|
||||
USB_EP_STATUS_HALTED = 1,
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -153,11 +153,11 @@ enum usb_endpoint_status {
|
||||
* \note valid for SetFeature request.
|
||||
*/
|
||||
enum usb_device_feature {
|
||||
USB_DEV_FEATURE_REMOTE_WAKEUP = 1, //!< Remote wakeup enabled
|
||||
USB_DEV_FEATURE_TEST_MODE = 2, //!< USB test mode
|
||||
USB_DEV_FEATURE_OTG_B_HNP_ENABLE = 3,
|
||||
USB_DEV_FEATURE_OTG_A_HNP_SUPPORT = 4,
|
||||
USB_DEV_FEATURE_OTG_A_ALT_HNP_SUPPORT = 5
|
||||
USB_DEV_FEATURE_REMOTE_WAKEUP = 1, //!< Remote wakeup enabled
|
||||
USB_DEV_FEATURE_TEST_MODE = 2, //!< USB test mode
|
||||
USB_DEV_FEATURE_OTG_B_HNP_ENABLE = 3,
|
||||
USB_DEV_FEATURE_OTG_A_HNP_SUPPORT = 4,
|
||||
USB_DEV_FEATURE_OTG_A_ALT_HNP_SUPPORT = 5
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -166,54 +166,54 @@ enum usb_device_feature {
|
||||
* \note valid for USB_DEV_FEATURE_TEST_MODE request.
|
||||
*/
|
||||
enum usb_device_hs_test_mode {
|
||||
USB_DEV_TEST_MODE_J = 1,
|
||||
USB_DEV_TEST_MODE_K = 2,
|
||||
USB_DEV_TEST_MODE_SE0_NAK = 3,
|
||||
USB_DEV_TEST_MODE_PACKET = 4,
|
||||
USB_DEV_TEST_MODE_FORCE_ENABLE = 5,
|
||||
USB_DEV_TEST_MODE_J = 1,
|
||||
USB_DEV_TEST_MODE_K = 2,
|
||||
USB_DEV_TEST_MODE_SE0_NAK = 3,
|
||||
USB_DEV_TEST_MODE_PACKET = 4,
|
||||
USB_DEV_TEST_MODE_FORCE_ENABLE = 5,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Standard USB endpoint feature/status flags
|
||||
*/
|
||||
enum usb_endpoint_feature {
|
||||
USB_EP_FEATURE_HALT = 0,
|
||||
USB_EP_FEATURE_HALT = 0,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Standard USB Test Mode Selectors
|
||||
*/
|
||||
enum usb_test_mode_selector {
|
||||
USB_TEST_J = 0x01,
|
||||
USB_TEST_K = 0x02,
|
||||
USB_TEST_SE0_NAK = 0x03,
|
||||
USB_TEST_PACKET = 0x04,
|
||||
USB_TEST_FORCE_ENABLE = 0x05,
|
||||
USB_TEST_J = 0x01,
|
||||
USB_TEST_K = 0x02,
|
||||
USB_TEST_SE0_NAK = 0x03,
|
||||
USB_TEST_PACKET = 0x04,
|
||||
USB_TEST_FORCE_ENABLE = 0x05,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Standard USB descriptor types
|
||||
*/
|
||||
enum usb_descriptor_type {
|
||||
USB_DT_DEVICE = 1,
|
||||
USB_DT_CONFIGURATION = 2,
|
||||
USB_DT_STRING = 3,
|
||||
USB_DT_INTERFACE = 4,
|
||||
USB_DT_ENDPOINT = 5,
|
||||
USB_DT_DEVICE_QUALIFIER = 6,
|
||||
USB_DT_OTHER_SPEED_CONFIGURATION = 7,
|
||||
USB_DT_INTERFACE_POWER = 8,
|
||||
USB_DT_OTG = 9,
|
||||
USB_DT_IAD = 0x0B,
|
||||
USB_DT_BOS = 0x0F,
|
||||
USB_DT_DEVICE_CAPABILITY = 0x10,
|
||||
USB_DT_DEVICE = 1,
|
||||
USB_DT_CONFIGURATION = 2,
|
||||
USB_DT_STRING = 3,
|
||||
USB_DT_INTERFACE = 4,
|
||||
USB_DT_ENDPOINT = 5,
|
||||
USB_DT_DEVICE_QUALIFIER = 6,
|
||||
USB_DT_OTHER_SPEED_CONFIGURATION = 7,
|
||||
USB_DT_INTERFACE_POWER = 8,
|
||||
USB_DT_OTG = 9,
|
||||
USB_DT_IAD = 0x0B,
|
||||
USB_DT_BOS = 0x0F,
|
||||
USB_DT_DEVICE_CAPABILITY = 0x10,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief USB Device Capability types
|
||||
*/
|
||||
enum usb_capability_type {
|
||||
USB_DC_USB20_EXTENSION = 0x02,
|
||||
USB_DC_USB20_EXTENSION = 0x02,
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -221,7 +221,7 @@ enum usb_capability_type {
|
||||
* To fill bmAttributes field of usb_capa_ext_desc_t structure.
|
||||
*/
|
||||
enum usb_capability_extension_attr {
|
||||
USB_DC_EXT_LPM = 0x00000002,
|
||||
USB_DC_EXT_LPM = 0x00000002,
|
||||
};
|
||||
|
||||
#define HIRD_50_US 0
|
||||
@@ -254,18 +254,18 @@ enum usb_capability_extension_attr {
|
||||
* \brief Standard USB endpoint transfer types
|
||||
*/
|
||||
enum usb_ep_type {
|
||||
USB_EP_TYPE_CONTROL = 0x00,
|
||||
USB_EP_TYPE_ISOCHRONOUS = 0x01,
|
||||
USB_EP_TYPE_BULK = 0x02,
|
||||
USB_EP_TYPE_INTERRUPT = 0x03,
|
||||
USB_EP_TYPE_MASK = 0x03,
|
||||
USB_EP_TYPE_CONTROL = 0x00,
|
||||
USB_EP_TYPE_ISOCHRONOUS = 0x01,
|
||||
USB_EP_TYPE_BULK = 0x02,
|
||||
USB_EP_TYPE_INTERRUPT = 0x03,
|
||||
USB_EP_TYPE_MASK = 0x03,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Standard USB language IDs for string descriptors
|
||||
*/
|
||||
enum usb_langid {
|
||||
USB_LANGID_EN_US = 0x0409, //!< English (United States)
|
||||
USB_LANGID_EN_US = 0x0409, //!< English (United States)
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -308,31 +308,31 @@ COMPILER_PACK_SET(1)
|
||||
* The data payload of SETUP packets always follows this structure.
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bmRequestType;
|
||||
uint8_t bRequest;
|
||||
le16_t wValue;
|
||||
le16_t wIndex;
|
||||
le16_t wLength;
|
||||
uint8_t bmRequestType;
|
||||
uint8_t bRequest;
|
||||
le16_t wValue;
|
||||
le16_t wIndex;
|
||||
le16_t wLength;
|
||||
} usb_setup_req_t;
|
||||
|
||||
/**
|
||||
* \brief Standard USB device descriptor structure
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
le16_t bcdUSB;
|
||||
uint8_t bDeviceClass;
|
||||
uint8_t bDeviceSubClass;
|
||||
uint8_t bDeviceProtocol;
|
||||
uint8_t bMaxPacketSize0;
|
||||
le16_t idVendor;
|
||||
le16_t idProduct;
|
||||
le16_t bcdDevice;
|
||||
uint8_t iManufacturer;
|
||||
uint8_t iProduct;
|
||||
uint8_t iSerialNumber;
|
||||
uint8_t bNumConfigurations;
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
le16_t bcdUSB;
|
||||
uint8_t bDeviceClass;
|
||||
uint8_t bDeviceSubClass;
|
||||
uint8_t bDeviceProtocol;
|
||||
uint8_t bMaxPacketSize0;
|
||||
le16_t idVendor;
|
||||
le16_t idProduct;
|
||||
le16_t bcdDevice;
|
||||
uint8_t iManufacturer;
|
||||
uint8_t iProduct;
|
||||
uint8_t iSerialNumber;
|
||||
uint8_t bNumConfigurations;
|
||||
} usb_dev_desc_t;
|
||||
|
||||
/**
|
||||
@@ -344,15 +344,15 @@ typedef struct {
|
||||
* the device was operating at full speed.)
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
le16_t bcdUSB;
|
||||
uint8_t bDeviceClass;
|
||||
uint8_t bDeviceSubClass;
|
||||
uint8_t bDeviceProtocol;
|
||||
uint8_t bMaxPacketSize0;
|
||||
uint8_t bNumConfigurations;
|
||||
uint8_t bReserved;
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
le16_t bcdUSB;
|
||||
uint8_t bDeviceClass;
|
||||
uint8_t bDeviceSubClass;
|
||||
uint8_t bDeviceProtocol;
|
||||
uint8_t bMaxPacketSize0;
|
||||
uint8_t bNumConfigurations;
|
||||
uint8_t bReserved;
|
||||
} usb_dev_qual_desc_t;
|
||||
|
||||
/**
|
||||
@@ -368,23 +368,22 @@ typedef struct {
|
||||
* The descriptor type in the GetDescriptor() request is set to BOS.
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
le16_t wTotalLength;
|
||||
uint8_t bNumDeviceCaps;
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
le16_t wTotalLength;
|
||||
uint8_t bNumDeviceCaps;
|
||||
} usb_dev_bos_desc_t;
|
||||
|
||||
|
||||
/**
|
||||
* \brief USB Device Capabilities - USB 2.0 Extension Descriptor structure
|
||||
*
|
||||
* Defines the set of USB 1.1-specific device level capabilities.
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bDevCapabilityType;
|
||||
le32_t bmAttributes;
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bDevCapabilityType;
|
||||
le32_t bmAttributes;
|
||||
} usb_dev_capa_ext_desc_t;
|
||||
|
||||
/**
|
||||
@@ -393,40 +392,38 @@ typedef struct {
|
||||
* The BOS descriptor and capabilities descriptors for LPM.
|
||||
*/
|
||||
typedef struct {
|
||||
usb_dev_bos_desc_t bos;
|
||||
usb_dev_capa_ext_desc_t capa_ext;
|
||||
usb_dev_bos_desc_t bos;
|
||||
usb_dev_capa_ext_desc_t capa_ext;
|
||||
} usb_dev_lpm_desc_t;
|
||||
|
||||
/**
|
||||
* \brief Standard USB Interface Association Descriptor structure
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength; //!< size of this descriptor in bytes
|
||||
uint8_t bDescriptorType; //!< INTERFACE descriptor type
|
||||
uint8_t bFirstInterface; //!< Number of interface
|
||||
uint8_t bInterfaceCount; //!< value to select alternate setting
|
||||
uint8_t bFunctionClass; //!< Class code assigned by the USB
|
||||
uint8_t bFunctionSubClass;//!< Sub-class code assigned by the USB
|
||||
uint8_t bFunctionProtocol;//!< Protocol code assigned by the USB
|
||||
uint8_t iFunction; //!< Index of string descriptor
|
||||
uint8_t bLength; //!< size of this descriptor in bytes
|
||||
uint8_t bDescriptorType; //!< INTERFACE descriptor type
|
||||
uint8_t bFirstInterface; //!< Number of interface
|
||||
uint8_t bInterfaceCount; //!< value to select alternate setting
|
||||
uint8_t bFunctionClass; //!< Class code assigned by the USB
|
||||
uint8_t bFunctionSubClass;//!< Sub-class code assigned by the USB
|
||||
uint8_t bFunctionProtocol;//!< Protocol code assigned by the USB
|
||||
uint8_t iFunction; //!< Index of string descriptor
|
||||
} usb_association_desc_t;
|
||||
|
||||
|
||||
/**
|
||||
* \brief Standard USB configuration descriptor structure
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
le16_t wTotalLength;
|
||||
uint8_t bNumInterfaces;
|
||||
uint8_t bConfigurationValue;
|
||||
uint8_t iConfiguration;
|
||||
uint8_t bmAttributes;
|
||||
uint8_t bMaxPower;
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
le16_t wTotalLength;
|
||||
uint8_t bNumInterfaces;
|
||||
uint8_t bConfigurationValue;
|
||||
uint8_t iConfiguration;
|
||||
uint8_t bmAttributes;
|
||||
uint8_t bMaxPower;
|
||||
} usb_conf_desc_t;
|
||||
|
||||
|
||||
#define USB_CONFIG_ATTR_MUST_SET (1 << 7) //!< Must always be set
|
||||
#define USB_CONFIG_ATTR_BUS_POWERED (0 << 6) //!< Bus-powered
|
||||
#define USB_CONFIG_ATTR_SELF_POWERED (1 << 6) //!< Self-powered
|
||||
@@ -438,55 +435,54 @@ typedef struct {
|
||||
* \brief Standard USB association descriptor structure
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength; //!< Size of this descriptor in bytes
|
||||
uint8_t bDescriptorType; //!< Interface descriptor type
|
||||
uint8_t bFirstInterface; //!< Number of interface
|
||||
uint8_t bInterfaceCount; //!< value to select alternate setting
|
||||
uint8_t bFunctionClass; //!< Class code assigned by the USB
|
||||
uint8_t bFunctionSubClass; //!< Sub-class code assigned by the USB
|
||||
uint8_t bFunctionProtocol; //!< Protocol code assigned by the USB
|
||||
uint8_t iFunction; //!< Index of string descriptor
|
||||
uint8_t bLength; //!< Size of this descriptor in bytes
|
||||
uint8_t bDescriptorType; //!< Interface descriptor type
|
||||
uint8_t bFirstInterface; //!< Number of interface
|
||||
uint8_t bInterfaceCount; //!< value to select alternate setting
|
||||
uint8_t bFunctionClass; //!< Class code assigned by the USB
|
||||
uint8_t bFunctionSubClass; //!< Sub-class code assigned by the USB
|
||||
uint8_t bFunctionProtocol; //!< Protocol code assigned by the USB
|
||||
uint8_t iFunction; //!< Index of string descriptor
|
||||
} usb_iad_desc_t;
|
||||
|
||||
/**
|
||||
* \brief Standard USB interface descriptor structure
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bInterfaceNumber;
|
||||
uint8_t bAlternateSetting;
|
||||
uint8_t bNumEndpoints;
|
||||
uint8_t bInterfaceClass;
|
||||
uint8_t bInterfaceSubClass;
|
||||
uint8_t bInterfaceProtocol;
|
||||
uint8_t iInterface;
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bInterfaceNumber;
|
||||
uint8_t bAlternateSetting;
|
||||
uint8_t bNumEndpoints;
|
||||
uint8_t bInterfaceClass;
|
||||
uint8_t bInterfaceSubClass;
|
||||
uint8_t bInterfaceProtocol;
|
||||
uint8_t iInterface;
|
||||
} usb_iface_desc_t;
|
||||
|
||||
/**
|
||||
* \brief Standard USB endpoint descriptor structure
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bEndpointAddress;
|
||||
uint8_t bmAttributes;
|
||||
le16_t wMaxPacketSize;
|
||||
uint8_t bInterval;
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bEndpointAddress;
|
||||
uint8_t bmAttributes;
|
||||
le16_t wMaxPacketSize;
|
||||
uint8_t bInterval;
|
||||
} usb_ep_desc_t;
|
||||
|
||||
|
||||
/**
|
||||
* \brief A standard USB string descriptor structure
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
} usb_str_desc_t;
|
||||
|
||||
typedef struct {
|
||||
usb_str_desc_t desc;
|
||||
le16_t string[1];
|
||||
usb_str_desc_t desc;
|
||||
le16_t string[1];
|
||||
} usb_str_lgid_desc_t;
|
||||
|
||||
COMPILER_PACK_RESET()
|
||||
|
@@ -58,42 +58,42 @@
|
||||
* \name Possible values of class
|
||||
*/
|
||||
//@{
|
||||
#define CDC_CLASS_DEVICE 0x02 //!< USB Communication Device Class
|
||||
#define CDC_CLASS_COMM 0x02 //!< CDC Communication Class Interface
|
||||
#define CDC_CLASS_DATA 0x0A //!< CDC Data Class Interface
|
||||
#define CDC_CLASS_DEVICE 0x02 //!< USB Communication Device Class
|
||||
#define CDC_CLASS_COMM 0x02 //!< CDC Communication Class Interface
|
||||
#define CDC_CLASS_DATA 0x0A //!< CDC Data Class Interface
|
||||
#define CDC_CLASS_MULTI 0xEF //!< CDC Multi-interface Function
|
||||
|
||||
//@}
|
||||
|
||||
//! \name USB CDC Subclass IDs
|
||||
//@{
|
||||
#define CDC_SUBCLASS_DLCM 0x01 //!< Direct Line Control Model
|
||||
#define CDC_SUBCLASS_ACM 0x02 //!< Abstract Control Model
|
||||
#define CDC_SUBCLASS_TCM 0x03 //!< Telephone Control Model
|
||||
#define CDC_SUBCLASS_MCCM 0x04 //!< Multi-Channel Control Model
|
||||
#define CDC_SUBCLASS_CCM 0x05 //!< CAPI Control Model
|
||||
#define CDC_SUBCLASS_ETH 0x06 //!< Ethernet Networking Control Model
|
||||
#define CDC_SUBCLASS_ATM 0x07 //!< ATM Networking Control Model
|
||||
#define CDC_SUBCLASS_DLCM 0x01 //!< Direct Line Control Model
|
||||
#define CDC_SUBCLASS_ACM 0x02 //!< Abstract Control Model
|
||||
#define CDC_SUBCLASS_TCM 0x03 //!< Telephone Control Model
|
||||
#define CDC_SUBCLASS_MCCM 0x04 //!< Multi-Channel Control Model
|
||||
#define CDC_SUBCLASS_CCM 0x05 //!< CAPI Control Model
|
||||
#define CDC_SUBCLASS_ETH 0x06 //!< Ethernet Networking Control Model
|
||||
#define CDC_SUBCLASS_ATM 0x07 //!< ATM Networking Control Model
|
||||
//@}
|
||||
|
||||
//! \name USB CDC Communication Interface Protocol IDs
|
||||
//@{
|
||||
#define CDC_PROTOCOL_V25TER 0x01 //!< Common AT commands
|
||||
#define CDC_PROTOCOL_V25TER 0x01 //!< Common AT commands
|
||||
//@}
|
||||
|
||||
//! \name USB CDC Data Interface Protocol IDs
|
||||
//@{
|
||||
#define CDC_PROTOCOL_I430 0x30 //!< ISDN BRI
|
||||
#define CDC_PROTOCOL_HDLC 0x31 //!< HDLC
|
||||
#define CDC_PROTOCOL_TRANS 0x32 //!< Transparent
|
||||
#define CDC_PROTOCOL_Q921M 0x50 //!< Q.921 management protocol
|
||||
#define CDC_PROTOCOL_Q921 0x51 //!< Q.931 [sic] Data link protocol
|
||||
#define CDC_PROTOCOL_Q921TM 0x52 //!< Q.921 TEI-multiplexor
|
||||
#define CDC_PROTOCOL_V42BIS 0x90 //!< Data compression procedures
|
||||
#define CDC_PROTOCOL_Q931 0x91 //!< Euro-ISDN protocol control
|
||||
#define CDC_PROTOCOL_V120 0x92 //!< V.24 rate adaption to ISDN
|
||||
#define CDC_PROTOCOL_CAPI20 0x93 //!< CAPI Commands
|
||||
#define CDC_PROTOCOL_HOST 0xFD //!< Host based driver
|
||||
#define CDC_PROTOCOL_I430 0x30 //!< ISDN BRI
|
||||
#define CDC_PROTOCOL_HDLC 0x31 //!< HDLC
|
||||
#define CDC_PROTOCOL_TRANS 0x32 //!< Transparent
|
||||
#define CDC_PROTOCOL_Q921M 0x50 //!< Q.921 management protocol
|
||||
#define CDC_PROTOCOL_Q921 0x51 //!< Q.931 [sic] Data link protocol
|
||||
#define CDC_PROTOCOL_Q921TM 0x52 //!< Q.921 TEI-multiplexor
|
||||
#define CDC_PROTOCOL_V42BIS 0x90 //!< Data compression procedures
|
||||
#define CDC_PROTOCOL_Q931 0x91 //!< Euro-ISDN protocol control
|
||||
#define CDC_PROTOCOL_V120 0x92 //!< V.24 rate adaption to ISDN
|
||||
#define CDC_PROTOCOL_CAPI20 0x93 //!< CAPI Commands
|
||||
#define CDC_PROTOCOL_HOST 0xFD //!< Host based driver
|
||||
/**
|
||||
* \brief Describes the Protocol Unit Functional Descriptors [sic]
|
||||
* on Communication Class Interface
|
||||
@@ -103,16 +103,16 @@
|
||||
|
||||
//! \name USB CDC Functional Descriptor Types
|
||||
//@{
|
||||
#define CDC_CS_INTERFACE 0x24 //!< Interface Functional Descriptor
|
||||
#define CDC_CS_ENDPOINT 0x25 //!< Endpoint Functional Descriptor
|
||||
#define CDC_CS_INTERFACE 0x24 //!< Interface Functional Descriptor
|
||||
#define CDC_CS_ENDPOINT 0x25 //!< Endpoint Functional Descriptor
|
||||
//@}
|
||||
|
||||
//! \name USB CDC Functional Descriptor Subtypes
|
||||
//@{
|
||||
#define CDC_SCS_HEADER 0x00 //!< Header Functional Descriptor
|
||||
#define CDC_SCS_CALL_MGMT 0x01 //!< Call Management
|
||||
#define CDC_SCS_ACM 0x02 //!< Abstract Control Management
|
||||
#define CDC_SCS_UNION 0x06 //!< Union Functional Descriptor
|
||||
#define CDC_SCS_HEADER 0x00 //!< Header Functional Descriptor
|
||||
#define CDC_SCS_CALL_MGMT 0x01 //!< Call Management
|
||||
#define CDC_SCS_ACM 0x02 //!< Abstract Control Management
|
||||
#define CDC_SCS_UNION 0x06 //!< Union Functional Descriptor
|
||||
//@}
|
||||
|
||||
//! \name USB CDC Request IDs
|
||||
@@ -168,42 +168,40 @@ COMPILER_PACK_SET(1)
|
||||
//! \name USB CDC Descriptors
|
||||
//@{
|
||||
|
||||
|
||||
//! CDC Header Functional Descriptor
|
||||
typedef struct {
|
||||
uint8_t bFunctionLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bDescriptorSubtype;
|
||||
le16_t bcdCDC;
|
||||
uint8_t bFunctionLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bDescriptorSubtype;
|
||||
le16_t bcdCDC;
|
||||
} usb_cdc_hdr_desc_t;
|
||||
|
||||
//! CDC Call Management Functional Descriptor
|
||||
typedef struct {
|
||||
uint8_t bFunctionLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bDescriptorSubtype;
|
||||
uint8_t bmCapabilities;
|
||||
uint8_t bDataInterface;
|
||||
uint8_t bFunctionLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bDescriptorSubtype;
|
||||
uint8_t bmCapabilities;
|
||||
uint8_t bDataInterface;
|
||||
} usb_cdc_call_mgmt_desc_t;
|
||||
|
||||
//! CDC ACM Functional Descriptor
|
||||
typedef struct {
|
||||
uint8_t bFunctionLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bDescriptorSubtype;
|
||||
uint8_t bmCapabilities;
|
||||
uint8_t bFunctionLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bDescriptorSubtype;
|
||||
uint8_t bmCapabilities;
|
||||
} usb_cdc_acm_desc_t;
|
||||
|
||||
//! CDC Union Functional Descriptor
|
||||
typedef struct {
|
||||
uint8_t bFunctionLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bDescriptorSubtype;
|
||||
uint8_t bMasterInterface;
|
||||
uint8_t bSlaveInterface0;
|
||||
uint8_t bFunctionLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bDescriptorSubtype;
|
||||
uint8_t bMasterInterface;
|
||||
uint8_t bSlaveInterface0;
|
||||
} usb_cdc_union_desc_t;
|
||||
|
||||
|
||||
//! \name USB CDC Call Management Capabilities
|
||||
//@{
|
||||
//! Device handles call management itself
|
||||
@@ -235,24 +233,24 @@ typedef struct {
|
||||
//@{
|
||||
//! Line Coding structure
|
||||
typedef struct {
|
||||
le32_t dwDTERate;
|
||||
uint8_t bCharFormat;
|
||||
uint8_t bParityType;
|
||||
uint8_t bDataBits;
|
||||
le32_t dwDTERate;
|
||||
uint8_t bCharFormat;
|
||||
uint8_t bParityType;
|
||||
uint8_t bDataBits;
|
||||
} usb_cdc_line_coding_t;
|
||||
//! Possible values of bCharFormat
|
||||
enum cdc_char_format {
|
||||
CDC_STOP_BITS_1 = 0, //!< 1 stop bit
|
||||
CDC_STOP_BITS_1_5 = 1, //!< 1.5 stop bits
|
||||
CDC_STOP_BITS_2 = 2, //!< 2 stop bits
|
||||
CDC_STOP_BITS_1 = 0, //!< 1 stop bit
|
||||
CDC_STOP_BITS_1_5 = 1, //!< 1.5 stop bits
|
||||
CDC_STOP_BITS_2 = 2, //!< 2 stop bits
|
||||
};
|
||||
//! Possible values of bParityType
|
||||
enum cdc_parity {
|
||||
CDC_PAR_NONE = 0, //!< No parity
|
||||
CDC_PAR_ODD = 1, //!< Odd parity
|
||||
CDC_PAR_EVEN = 2, //!< Even parity
|
||||
CDC_PAR_MARK = 3, //!< Parity forced to 0 (space)
|
||||
CDC_PAR_SPACE = 4, //!< Parity forced to 1 (mark)
|
||||
CDC_PAR_NONE = 0, //!< No parity
|
||||
CDC_PAR_ODD = 1, //!< Odd parity
|
||||
CDC_PAR_EVEN = 2, //!< Even parity
|
||||
CDC_PAR_MARK = 3, //!< Parity forced to 0 (space)
|
||||
CDC_PAR_SPACE = 4, //!< Parity forced to 1 (mark)
|
||||
};
|
||||
//@}
|
||||
|
||||
@@ -262,7 +260,7 @@ enum cdc_parity {
|
||||
|
||||
//! Control signal structure
|
||||
typedef struct {
|
||||
uint16_t value;
|
||||
uint16_t value;
|
||||
} usb_cdc_control_signal_t;
|
||||
|
||||
//! \name Possible values in usb_cdc_control_signal_t
|
||||
@@ -278,16 +276,15 @@ typedef struct {
|
||||
//@}
|
||||
//@}
|
||||
|
||||
|
||||
//! \name USB CDC notification message
|
||||
//@{
|
||||
|
||||
typedef struct {
|
||||
uint8_t bmRequestType;
|
||||
uint8_t bNotification;
|
||||
le16_t wValue;
|
||||
le16_t wIndex;
|
||||
le16_t wLength;
|
||||
uint8_t bmRequestType;
|
||||
uint8_t bNotification;
|
||||
le16_t wValue;
|
||||
le16_t wIndex;
|
||||
le16_t wLength;
|
||||
} usb_cdc_notify_msg_t;
|
||||
|
||||
//! \name USB CDC serial state
|
||||
@@ -295,8 +292,8 @@ typedef struct {
|
||||
|
||||
//! Hardware handshake support (cdc spec 1.1 chapter 6.3.5)
|
||||
typedef struct {
|
||||
usb_cdc_notify_msg_t header;
|
||||
le16_t value;
|
||||
usb_cdc_notify_msg_t header;
|
||||
le16_t value;
|
||||
} usb_cdc_notify_serial_state_t;
|
||||
|
||||
//! \name Possible values in usb_cdc_notify_serial_state_t
|
||||
|
@@ -47,7 +47,6 @@
|
||||
#ifndef _USB_PROTOCOL_MSC_H_
|
||||
#define _USB_PROTOCOL_MSC_H_
|
||||
|
||||
|
||||
/**
|
||||
* \ingroup usb_protocol_group
|
||||
* \defgroup usb_msc_protocol USB Mass Storage Class (MSC) protocol definitions
|
||||
@@ -59,7 +58,7 @@
|
||||
* \name Possible Class value
|
||||
*/
|
||||
//@{
|
||||
#define MSC_CLASS 0x08
|
||||
#define MSC_CLASS 0x08
|
||||
//@}
|
||||
|
||||
/**
|
||||
@@ -71,12 +70,12 @@
|
||||
* operating systems like Windows XP.
|
||||
*/
|
||||
//@{
|
||||
#define MSC_SUBCLASS_RBC 0x01 //!< Reduced Block Commands
|
||||
#define MSC_SUBCLASS_ATAPI 0x02 //!< CD/DVD devices
|
||||
#define MSC_SUBCLASS_QIC_157 0x03 //!< Tape devices
|
||||
#define MSC_SUBCLASS_UFI 0x04 //!< Floppy disk drives
|
||||
#define MSC_SUBCLASS_SFF_8070I 0x05 //!< Floppy disk drives
|
||||
#define MSC_SUBCLASS_TRANSPARENT 0x06 //!< Determined by INQUIRY
|
||||
#define MSC_SUBCLASS_RBC 0x01 //!< Reduced Block Commands
|
||||
#define MSC_SUBCLASS_ATAPI 0x02 //!< CD/DVD devices
|
||||
#define MSC_SUBCLASS_QIC_157 0x03 //!< Tape devices
|
||||
#define MSC_SUBCLASS_UFI 0x04 //!< Floppy disk drives
|
||||
#define MSC_SUBCLASS_SFF_8070I 0x05 //!< Floppy disk drives
|
||||
#define MSC_SUBCLASS_TRANSPARENT 0x06 //!< Determined by INQUIRY
|
||||
//@}
|
||||
|
||||
/**
|
||||
@@ -84,21 +83,19 @@
|
||||
* \note Only the BULK protocol should be used in new designs.
|
||||
*/
|
||||
//@{
|
||||
#define MSC_PROTOCOL_CBI 0x00 //!< Command/Bulk/Interrupt
|
||||
#define MSC_PROTOCOL_CBI_ALT 0x01 //!< W/o command completion
|
||||
#define MSC_PROTOCOL_BULK 0x50 //!< Bulk-only
|
||||
#define MSC_PROTOCOL_CBI 0x00 //!< Command/Bulk/Interrupt
|
||||
#define MSC_PROTOCOL_CBI_ALT 0x01 //!< W/o command completion
|
||||
#define MSC_PROTOCOL_BULK 0x50 //!< Bulk-only
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \brief MSC USB requests (bRequest)
|
||||
*/
|
||||
enum usb_reqid_msc {
|
||||
USB_REQ_MSC_BULK_RESET = 0xFF, //!< Mass Storage Reset
|
||||
USB_REQ_MSC_GET_MAX_LUN = 0xFE //!< Get Max LUN
|
||||
USB_REQ_MSC_BULK_RESET = 0xFF, //!< Mass Storage Reset
|
||||
USB_REQ_MSC_GET_MAX_LUN = 0xFE //!< Get Max LUN
|
||||
};
|
||||
|
||||
|
||||
COMPILER_PACK_SET(1)
|
||||
|
||||
/**
|
||||
@@ -106,38 +103,37 @@ COMPILER_PACK_SET(1)
|
||||
*/
|
||||
//@{
|
||||
struct usb_msc_cbw {
|
||||
le32_t dCBWSignature; //!< Must contain 'USBC'
|
||||
le32_t dCBWTag; //!< Unique command ID
|
||||
le32_t dCBWDataTransferLength; //!< Number of bytes to transfer
|
||||
uint8_t bmCBWFlags; //!< Direction in bit 7
|
||||
uint8_t bCBWLUN; //!< Logical Unit Number
|
||||
uint8_t bCBWCBLength; //!< Number of valid CDB bytes
|
||||
uint8_t CDB[16]; //!< SCSI Command Descriptor Block
|
||||
le32_t dCBWSignature; //!< Must contain 'USBC'
|
||||
le32_t dCBWTag; //!< Unique command ID
|
||||
le32_t dCBWDataTransferLength; //!< Number of bytes to transfer
|
||||
uint8_t bmCBWFlags; //!< Direction in bit 7
|
||||
uint8_t bCBWLUN; //!< Logical Unit Number
|
||||
uint8_t bCBWCBLength; //!< Number of valid CDB bytes
|
||||
uint8_t CDB[16]; //!< SCSI Command Descriptor Block
|
||||
};
|
||||
|
||||
#define USB_CBW_SIGNATURE 0x55534243 //!< dCBWSignature value
|
||||
#define USB_CBW_DIRECTION_IN (1<<7) //!< Data from device to host
|
||||
#define USB_CBW_DIRECTION_OUT (0<<7) //!< Data from host to device
|
||||
#define USB_CBW_LUN_MASK 0x0F //!< Valid bits in bCBWLUN
|
||||
#define USB_CBW_LEN_MASK 0x1F //!< Valid bits in bCBWCBLength
|
||||
#define USB_CBW_SIGNATURE 0x55534243 //!< dCBWSignature value
|
||||
#define USB_CBW_DIRECTION_IN (1<<7) //!< Data from device to host
|
||||
#define USB_CBW_DIRECTION_OUT (0<<7) //!< Data from host to device
|
||||
#define USB_CBW_LUN_MASK 0x0F //!< Valid bits in bCBWLUN
|
||||
#define USB_CBW_LEN_MASK 0x1F //!< Valid bits in bCBWCBLength
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \name A Command Status Wrapper (CSW).
|
||||
*/
|
||||
//@{
|
||||
struct usb_msc_csw {
|
||||
le32_t dCSWSignature; //!< Must contain 'USBS'
|
||||
le32_t dCSWTag; //!< Same as dCBWTag
|
||||
le32_t dCSWDataResidue; //!< Number of bytes not transferred
|
||||
uint8_t bCSWStatus; //!< Status code
|
||||
le32_t dCSWSignature; //!< Must contain 'USBS'
|
||||
le32_t dCSWTag; //!< Same as dCBWTag
|
||||
le32_t dCSWDataResidue; //!< Number of bytes not transferred
|
||||
uint8_t bCSWStatus; //!< Status code
|
||||
};
|
||||
|
||||
#define USB_CSW_SIGNATURE 0x55534253 //!< dCSWSignature value
|
||||
#define USB_CSW_STATUS_PASS 0x00 //!< Command Passed
|
||||
#define USB_CSW_STATUS_FAIL 0x01 //!< Command Failed
|
||||
#define USB_CSW_STATUS_PE 0x02 //!< Phase Error
|
||||
#define USB_CSW_SIGNATURE 0x55534253 //!< dCSWSignature value
|
||||
#define USB_CSW_STATUS_PASS 0x00 //!< Command Passed
|
||||
#define USB_CSW_STATUS_FAIL 0x01 //!< Command Failed
|
||||
#define USB_CSW_STATUS_PE 0x02 //!< Phase Error
|
||||
//@}
|
||||
|
||||
COMPILER_PACK_RESET()
|
||||
|
@@ -51,14 +51,14 @@
|
||||
#include "conf_usb.h"
|
||||
#include "udc.h"
|
||||
|
||||
#if ENABLED(SDSUPPORT)
|
||||
#if HAS_MEDIA
|
||||
static volatile bool main_b_msc_enable = false;
|
||||
#endif
|
||||
static volatile bool main_b_cdc_enable = false;
|
||||
static volatile bool main_b_dtr_active = false;
|
||||
|
||||
void usb_task_idle(void) {
|
||||
#if ENABLED(SDSUPPORT)
|
||||
#if HAS_MEDIA
|
||||
// Attend SD card access from the USB MSD -- Prioritize access to improve speed
|
||||
int delay = 2;
|
||||
while (main_b_msc_enable && --delay > 0) {
|
||||
@@ -70,7 +70,7 @@ void usb_task_idle(void) {
|
||||
#endif
|
||||
}
|
||||
|
||||
#if ENABLED(SDSUPPORT)
|
||||
#if HAS_MEDIA
|
||||
bool usb_task_msc_enable(void) { return ((main_b_msc_enable = true)); }
|
||||
void usb_task_msc_disable(void) { main_b_msc_enable = false; }
|
||||
bool usb_task_msc_isenabled(void) { return main_b_msc_enable; }
|
||||
@@ -206,13 +206,13 @@ static USB_MicrosoftExtendedPropertiesDescriptor microsoft_extended_properties_d
|
||||
bool usb_task_extra_string(void) {
|
||||
static uint8_t udi_msft_magic[] = "MSFT100\xEE";
|
||||
static uint8_t udi_cdc_name[] = "CDC interface";
|
||||
#if ENABLED(SDSUPPORT)
|
||||
#if HAS_MEDIA
|
||||
static uint8_t udi_msc_name[] = "MSC interface";
|
||||
#endif
|
||||
|
||||
struct extra_strings_desc_t {
|
||||
usb_str_desc_t header;
|
||||
#if ENABLED(SDSUPPORT)
|
||||
#if HAS_MEDIA
|
||||
le16_t string[Max(Max(sizeof(udi_cdc_name) - 1, sizeof(udi_msc_name) - 1), sizeof(udi_msft_magic) - 1)];
|
||||
#else
|
||||
le16_t string[Max(sizeof(udi_cdc_name) - 1, sizeof(udi_msft_magic) - 1)];
|
||||
@@ -231,7 +231,7 @@ bool usb_task_extra_string(void) {
|
||||
str_lgt = sizeof(udi_cdc_name) - 1;
|
||||
str = udi_cdc_name;
|
||||
break;
|
||||
#if ENABLED(SDSUPPORT)
|
||||
#if HAS_MEDIA
|
||||
case UDI_MSC_STRING_ID:
|
||||
str_lgt = sizeof(udi_msc_name) - 1;
|
||||
str = udi_msc_name;
|
||||
|
@@ -165,7 +165,7 @@ void MarlinHAL::init_board() {
|
||||
}
|
||||
|
||||
void MarlinHAL::idletask() {
|
||||
#if BOTH(WIFISUPPORT, OTASUPPORT)
|
||||
#if ALL(WIFISUPPORT, OTASUPPORT)
|
||||
OTA_handle();
|
||||
#endif
|
||||
TERN_(ESP3D_WIFISUPPORT, esp3dlib.idletask());
|
||||
@@ -175,7 +175,7 @@ uint8_t MarlinHAL::get_reset_source() { return rtc_get_reset_reason(1); }
|
||||
|
||||
void MarlinHAL::reboot() { ESP.restart(); }
|
||||
|
||||
void _delay_ms(int delay_ms) { delay(delay_ms); }
|
||||
void _delay_ms(const int ms) { delay(ms); }
|
||||
|
||||
// return free memory between end of heap (or end bss) and whatever is current
|
||||
int MarlinHAL::freeMemory() { return ESP.getFreeHeap(); }
|
||||
|
@@ -1,7 +1,9 @@
|
||||
/**
|
||||
* Marlin 3D Printer Firmware
|
||||
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
|
||||
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
|
||||
*
|
||||
* Based on Sprinter and grbl.
|
||||
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -169,7 +171,7 @@ void _delay_ms(const int ms);
|
||||
// MarlinHAL Class
|
||||
// ------------------------
|
||||
|
||||
#define HAL_ADC_VREF 3.3
|
||||
#define HAL_ADC_VREF_MV 3300
|
||||
#define HAL_ADC_RESOLUTION 10
|
||||
|
||||
class MarlinHAL {
|
||||
|
@@ -4,7 +4,6 @@
|
||||
*
|
||||
* Based on Sprinter and grbl.
|
||||
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
|
||||
* Copyright (c) 2017 Victor Perez
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -53,7 +52,7 @@ static SPISettings spiConfig;
|
||||
// ------------------------
|
||||
|
||||
void spiBegin() {
|
||||
#if ENABLED(SDSUPPORT) && PIN_EXISTS(SD_SS)
|
||||
#if HAS_MEDIA && PIN_EXISTS(SD_SS)
|
||||
OUT_WRITE(SD_SS_PIN, HIGH);
|
||||
#endif
|
||||
}
|
||||
|
@@ -42,33 +42,33 @@ void ICACHE_RAM_ATTR endstop_ISR() { endstops.update(); }
|
||||
|
||||
void setup_endstop_interrupts() {
|
||||
#define _ATTACH(P) attachInterrupt(digitalPinToInterrupt(P), endstop_ISR, CHANGE)
|
||||
TERN_(HAS_X_MAX, _ATTACH(X_MAX_PIN));
|
||||
TERN_(HAS_X_MIN, _ATTACH(X_MIN_PIN));
|
||||
TERN_(HAS_Y_MAX, _ATTACH(Y_MAX_PIN));
|
||||
TERN_(HAS_Y_MIN, _ATTACH(Y_MIN_PIN));
|
||||
TERN_(HAS_Z_MAX, _ATTACH(Z_MAX_PIN));
|
||||
TERN_(HAS_Z_MIN, _ATTACH(Z_MIN_PIN));
|
||||
TERN_(HAS_X2_MAX, _ATTACH(X2_MAX_PIN));
|
||||
TERN_(HAS_X2_MIN, _ATTACH(X2_MIN_PIN));
|
||||
TERN_(HAS_Y2_MAX, _ATTACH(Y2_MAX_PIN));
|
||||
TERN_(HAS_Y2_MIN, _ATTACH(Y2_MIN_PIN));
|
||||
TERN_(HAS_Z2_MAX, _ATTACH(Z2_MAX_PIN));
|
||||
TERN_(HAS_Z2_MIN, _ATTACH(Z2_MIN_PIN));
|
||||
TERN_(HAS_Z3_MAX, _ATTACH(Z3_MAX_PIN));
|
||||
TERN_(HAS_Z3_MIN, _ATTACH(Z3_MIN_PIN));
|
||||
TERN_(HAS_Z4_MAX, _ATTACH(Z4_MAX_PIN));
|
||||
TERN_(HAS_Z4_MIN, _ATTACH(Z4_MIN_PIN));
|
||||
TERN_(USE_X_MAX, _ATTACH(X_MAX_PIN));
|
||||
TERN_(USE_X_MIN, _ATTACH(X_MIN_PIN));
|
||||
TERN_(USE_Y_MAX, _ATTACH(Y_MAX_PIN));
|
||||
TERN_(USE_Y_MIN, _ATTACH(Y_MIN_PIN));
|
||||
TERN_(USE_Z_MAX, _ATTACH(Z_MAX_PIN));
|
||||
TERN_(USE_Z_MIN, _ATTACH(Z_MIN_PIN));
|
||||
TERN_(USE_X2_MAX, _ATTACH(X2_MAX_PIN));
|
||||
TERN_(USE_X2_MIN, _ATTACH(X2_MIN_PIN));
|
||||
TERN_(USE_Y2_MAX, _ATTACH(Y2_MAX_PIN));
|
||||
TERN_(USE_Y2_MIN, _ATTACH(Y2_MIN_PIN));
|
||||
TERN_(USE_Z2_MAX, _ATTACH(Z2_MAX_PIN));
|
||||
TERN_(USE_Z2_MIN, _ATTACH(Z2_MIN_PIN));
|
||||
TERN_(USE_Z3_MAX, _ATTACH(Z3_MAX_PIN));
|
||||
TERN_(USE_Z3_MIN, _ATTACH(Z3_MIN_PIN));
|
||||
TERN_(USE_Z4_MAX, _ATTACH(Z4_MAX_PIN));
|
||||
TERN_(USE_Z4_MIN, _ATTACH(Z4_MIN_PIN));
|
||||
TERN_(HAS_Z_MIN_PROBE_PIN, _ATTACH(Z_MIN_PROBE_PIN));
|
||||
TERN_(HAS_I_MAX, _ATTACH(I_MAX_PIN));
|
||||
TERN_(HAS_I_MIN, _ATTACH(I_MIN_PIN));
|
||||
TERN_(HAS_J_MAX, _ATTACH(J_MAX_PIN));
|
||||
TERN_(HAS_J_MIN, _ATTACH(J_MIN_PIN));
|
||||
TERN_(HAS_K_MAX, _ATTACH(K_MAX_PIN));
|
||||
TERN_(HAS_K_MIN, _ATTACH(K_MIN_PIN));
|
||||
TERN_(HAS_U_MAX, _ATTACH(U_MAX_PIN));
|
||||
TERN_(HAS_U_MIN, _ATTACH(U_MIN_PIN));
|
||||
TERN_(HAS_V_MAX, _ATTACH(V_MAX_PIN));
|
||||
TERN_(HAS_V_MIN, _ATTACH(V_MIN_PIN));
|
||||
TERN_(HAS_W_MAX, _ATTACH(W_MAX_PIN));
|
||||
TERN_(HAS_W_MIN, _ATTACH(W_MIN_PIN));
|
||||
TERN_(USE_I_MAX, _ATTACH(I_MAX_PIN));
|
||||
TERN_(USE_I_MIN, _ATTACH(I_MIN_PIN));
|
||||
TERN_(USE_J_MAX, _ATTACH(J_MAX_PIN));
|
||||
TERN_(USE_J_MIN, _ATTACH(J_MIN_PIN));
|
||||
TERN_(USE_K_MAX, _ATTACH(K_MAX_PIN));
|
||||
TERN_(USE_K_MIN, _ATTACH(K_MIN_PIN));
|
||||
TERN_(USE_U_MAX, _ATTACH(U_MAX_PIN));
|
||||
TERN_(USE_U_MIN, _ATTACH(U_MIN_PIN));
|
||||
TERN_(USE_V_MAX, _ATTACH(V_MAX_PIN));
|
||||
TERN_(USE_V_MIN, _ATTACH(V_MIN_PIN));
|
||||
TERN_(USE_W_MAX, _ATTACH(W_MAX_PIN));
|
||||
TERN_(USE_W_MIN, _ATTACH(W_MIN_PIN));
|
||||
}
|
||||
|
@@ -134,8 +134,8 @@ static void IRAM_ATTR i2s_intr_handler_default(void *arg) {
|
||||
|
||||
if (high_priority_task_awoken == pdTRUE) portYIELD_FROM_ISR();
|
||||
|
||||
// clear interrupt
|
||||
I2S0.int_clr.val = I2S0.int_st.val; //clear pending interrupt
|
||||
// Clear pending interrupt
|
||||
I2S0.int_clr.val = I2S0.int_st.val;
|
||||
}
|
||||
|
||||
void stepperTask(void *parameter) {
|
||||
@@ -356,7 +356,7 @@ void i2s_push_sample() {
|
||||
// Every 4µs (when space in DMA buffer) toggle each expander PWM output using
|
||||
// the current duty cycle/frequency so they sync with any steps (once
|
||||
// through the DMA/FIFO buffers). PWM signal inversion handled by other functions
|
||||
LOOP_L_N(p, MAX_EXPANDER_BITS) {
|
||||
for (uint8_t p = 0; p < MAX_EXPANDER_BITS; ++p) {
|
||||
if (hal.pwm_pin_data[p].pwm_duty_ticks > 0) { // pin has active pwm?
|
||||
if (hal.pwm_pin_data[p].pwm_tick_count == 0) {
|
||||
if (TEST32(i2s_port_data, p)) { // hi->lo
|
||||
|
@@ -40,7 +40,7 @@
|
||||
#error "TMC220x Software Serial is not supported on ESP32."
|
||||
#endif
|
||||
|
||||
#if BOTH(WIFISUPPORT, ESP3D_WIFISUPPORT)
|
||||
#if ALL(WIFISUPPORT, ESP3D_WIFISUPPORT)
|
||||
#error "Only enable one WiFi option, either WIFISUPPORT or ESP3D_WIFISUPPORT."
|
||||
#endif
|
||||
|
||||
@@ -52,7 +52,7 @@
|
||||
#error "FAST_PWM_FAN is not available on TinyBee."
|
||||
#endif
|
||||
|
||||
#if BOTH(I2S_STEPPER_STREAM, BABYSTEPPING) && DISABLED(INTEGRATED_BABYSTEPPING)
|
||||
#if ALL(I2S_STEPPER_STREAM, BABYSTEPPING) && DISABLED(INTEGRATED_BABYSTEPPING)
|
||||
#error "BABYSTEPPING on I2S stream requires INTEGRATED_BABYSTEPPING."
|
||||
#endif
|
||||
|
||||
@@ -60,10 +60,10 @@
|
||||
#error "PULLDOWN pin mode is not available on ESP32 boards."
|
||||
#endif
|
||||
|
||||
#if BOTH(I2S_STEPPER_STREAM, LIN_ADVANCE) && DISABLED(EXPERIMENTAL_I2S_LA)
|
||||
#if ALL(I2S_STEPPER_STREAM, LIN_ADVANCE) && DISABLED(EXPERIMENTAL_I2S_LA)
|
||||
#error "I2S stream is currently incompatible with LIN_ADVANCE."
|
||||
#endif
|
||||
|
||||
#if BOTH(I2S_STEPPER_STREAM, PRINTCOUNTER) && PRINTCOUNTER_SAVE_INTERVAL > 0 && DISABLED(PRINTCOUNTER_SYNC)
|
||||
#if ALL(I2S_STEPPER_STREAM, PRINTCOUNTER) && PRINTCOUNTER_SAVE_INTERVAL > 0 && DISABLED(PRINTCOUNTER_SYNC)
|
||||
#error "PRINTCOUNTER_SAVE_INTERVAL may cause issues on ESP32 with an I2S expander. Define PRINTCOUNTER_SYNC in Configuration.h for an imperfect solution."
|
||||
#endif
|
||||
|
@@ -1,7 +1,9 @@
|
||||
/**
|
||||
* Marlin 3D Printer Firmware
|
||||
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
|
||||
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
|
||||
*
|
||||
* Based on Sprinter and grbl.
|
||||
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -22,7 +24,7 @@
|
||||
|
||||
#include "../../inc/MarlinConfigPre.h"
|
||||
|
||||
#if BOTH(WIFISUPPORT, OTASUPPORT)
|
||||
#if ALL(WIFISUPPORT, OTASUPPORT)
|
||||
|
||||
#include <WiFi.h>
|
||||
#include <ESPmDNS.h>
|
||||
@@ -50,7 +52,7 @@ void OTA_init() {
|
||||
})
|
||||
.onError([](ota_error_t error) {
|
||||
Serial.printf("Error[%u]: ", error);
|
||||
char *str;
|
||||
const char *str = "unknown";
|
||||
switch (error) {
|
||||
case OTA_AUTH_ERROR: str = "Auth Failed"; break;
|
||||
case OTA_BEGIN_ERROR: str = "Begin Failed"; break;
|
||||
|
@@ -1,7 +1,9 @@
|
||||
/**
|
||||
* Marlin 3D Printer Firmware
|
||||
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
|
||||
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
|
||||
*
|
||||
* Based on Sprinter and grbl.
|
||||
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
@@ -23,7 +23,7 @@
|
||||
|
||||
#include "../../inc/MarlinConfigPre.h"
|
||||
|
||||
#if BOTH(WIFISUPPORT, WEBSUPPORT)
|
||||
#if ALL(WIFISUPPORT, WEBSUPPORT)
|
||||
|
||||
#include "../../core/serial.h"
|
||||
|
||||
|
@@ -25,14 +25,14 @@
|
||||
|
||||
#include "../../inc/MarlinConfig.h"
|
||||
|
||||
#if EITHER(MKS_MINI_12864, FYSETC_MINI_12864_2_1)
|
||||
#if ANY(MKS_MINI_12864, FYSETC_MINI_12864_2_1)
|
||||
|
||||
#include <U8glib-HAL.h>
|
||||
#include "../shared/HAL_SPI.h"
|
||||
#include "HAL.h"
|
||||
#include "SPI.h"
|
||||
|
||||
#if ENABLED(SDSUPPORT)
|
||||
#if HAS_MEDIA
|
||||
#include "../../sd/cardreader.h"
|
||||
#if ENABLED(ESP3D_WIFISUPPORT)
|
||||
#include "sd_ESP32.h"
|
||||
@@ -41,7 +41,6 @@
|
||||
|
||||
static SPISettings spiConfig;
|
||||
|
||||
|
||||
#ifndef LCD_SPI_SPEED
|
||||
#ifdef SD_SPI_SPEED
|
||||
#define LCD_SPI_SPEED SD_SPI_SPEED // Assume SPI speed shared with SD
|
||||
@@ -101,6 +100,6 @@ uint8_t u8g_eps_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_pt
|
||||
return 1;
|
||||
}
|
||||
|
||||
#endif // EITHER(MKS_MINI_12864, FYSETC_MINI_12864_2_1)
|
||||
#endif // MKS_MINI_12864 || FYSETC_MINI_12864_2_1
|
||||
|
||||
#endif // ARDUINO_ARCH_ESP32
|
||||
|
@@ -23,7 +23,7 @@
|
||||
|
||||
#include "../../inc/MarlinConfigPre.h"
|
||||
|
||||
#if BOTH(WIFISUPPORT, WEBSUPPORT)
|
||||
#if ALL(WIFISUPPORT, WEBSUPPORT)
|
||||
|
||||
#include "../../inc/MarlinConfig.h"
|
||||
|
||||
|
@@ -19,6 +19,7 @@
|
||||
* along with this program. If not, see <https://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifdef __PLAT_LINUX__
|
||||
|
||||
#include "../../inc/MarlinConfig.h"
|
||||
@@ -52,8 +53,7 @@ uint8_t MarlinHAL::active_ch = 0;
|
||||
uint16_t MarlinHAL::adc_value() {
|
||||
const pin_t pin = analogInputToDigitalPin(active_ch);
|
||||
if (!VALID_PIN(pin)) return 0;
|
||||
const uint16_t data = ((Gpio::get(pin) >> 2) & 0x3FF);
|
||||
return data; // return 10bit value as Marlin expects
|
||||
return uint16_t((Gpio::get(pin) >> 2) & 0x3FF); // return 10bit value as Marlin expects
|
||||
}
|
||||
|
||||
void MarlinHAL::reboot() { /* Reset the application state and GPIO */ }
|
||||
|
@@ -1,9 +1,9 @@
|
||||
/**
|
||||
* Marlin 3D Printer Firmware
|
||||
*
|
||||
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
|
||||
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
|
||||
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com
|
||||
*
|
||||
* Based on Sprinter and grbl.
|
||||
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -80,8 +80,8 @@ extern MSerialT usb_serial;
|
||||
#define CRITICAL_SECTION_END()
|
||||
|
||||
// ADC
|
||||
#define HAL_ADC_VREF 5.0
|
||||
#define HAL_ADC_RESOLUTION 10
|
||||
#define HAL_ADC_VREF_MV 5000
|
||||
#define HAL_ADC_RESOLUTION 10
|
||||
|
||||
// ------------------------
|
||||
// Class Utilities
|
||||
|
@@ -28,6 +28,9 @@
|
||||
|
||||
#include <pinmapping.h>
|
||||
|
||||
#define strlcpy(A, B, C) strncpy(A, B, (C) - 1)
|
||||
#define strlcpy_P(A, B, C) strncpy_P(A, B, (C) - 1)
|
||||
|
||||
#define HIGH 0x01
|
||||
#define LOW 0x00
|
||||
|
||||
|
@@ -28,36 +28,33 @@
|
||||
* Translation of routines & variables used by pinsDebug.h
|
||||
*/
|
||||
|
||||
#define NUMBER_PINS_TOTAL NUM_DIGITAL_PINS
|
||||
#define pwm_details(pin) NOOP // (do nothing)
|
||||
#define pwm_status(pin) false // Print a pin's PWM status. Return true if it's currently a PWM pin.
|
||||
#define NUMBER_PINS_TOTAL NUM_DIGITAL_PINS
|
||||
#define IS_ANALOG(P) (DIGITAL_PIN_TO_ANALOG_PIN(P) >= 0 ? 1 : 0)
|
||||
#define digitalRead_mod(p) digitalRead(p)
|
||||
#define PRINT_PORT(p)
|
||||
#define GET_ARRAY_PIN(p) pin_array[p].pin
|
||||
#define PRINT_ARRAY_NAME(x) do{ sprintf_P(buffer, PSTR("%-" STRINGIFY(MAX_NAME_LENGTH) "s"), pin_array[x].name); SERIAL_ECHO(buffer); }while(0)
|
||||
#define PRINT_PIN(p) do{ sprintf_P(buffer, PSTR("%3d "), p); SERIAL_ECHO(buffer); }while(0)
|
||||
#define PRINT_PIN_ANALOG(p) do{ sprintf_P(buffer, PSTR(" (A%2d) "), DIGITAL_PIN_TO_ANALOG_PIN(pin)); SERIAL_ECHO(buffer); }while(0)
|
||||
#define MULTI_NAME_PAD 16 // space needed to be pretty if not first name assigned to a pin
|
||||
#define MULTI_NAME_PAD 16 // space needed to be pretty if not first name assigned to a pin
|
||||
|
||||
// active ADC function/mode/code values for PINSEL registers
|
||||
constexpr int8_t ADC_pin_mode(pin_t pin) {
|
||||
return (-1);
|
||||
}
|
||||
constexpr int8_t ADC_pin_mode(pin_t pin) { return -1; }
|
||||
|
||||
int8_t get_pin_mode(pin_t pin) {
|
||||
if (!VALID_PIN(pin)) return -1;
|
||||
return 0;
|
||||
}
|
||||
int8_t get_pin_mode(const pin_t pin) { return VALID_PIN(pin) ? 0 : -1; }
|
||||
|
||||
bool GET_PINMODE(pin_t pin) {
|
||||
int8_t pin_mode = get_pin_mode(pin);
|
||||
if (pin_mode == -1 || pin_mode == ADC_pin_mode(pin)) // found an invalid pin or active analog pin
|
||||
bool GET_PINMODE(const pin_t pin) {
|
||||
const int8_t pin_mode = get_pin_mode(pin);
|
||||
if (pin_mode == -1 || pin_mode == ADC_pin_mode(pin)) // Invalid pin or active analog pin
|
||||
return false;
|
||||
|
||||
return (Gpio::getMode(pin) != 0); //input/output state
|
||||
return (Gpio::getMode(pin) != 0); // Input/output state
|
||||
}
|
||||
|
||||
bool GET_ARRAY_IS_DIGITAL(pin_t pin) {
|
||||
bool GET_ARRAY_IS_DIGITAL(const pin_t pin) {
|
||||
return (!IS_ANALOG(pin) || get_pin_mode(pin) != ADC_pin_mode(pin));
|
||||
}
|
||||
|
||||
void pwm_details(const pin_t pin) {}
|
||||
bool pwm_status(const pin_t) { return false; }
|
||||
|
||||
void print_port(const pin_t) {}
|
||||
|
@@ -60,7 +60,6 @@
|
||||
|
||||
#define INVALID_SERVO 255 // flag indicating an invalid servo index
|
||||
|
||||
|
||||
// Types
|
||||
|
||||
typedef struct {
|
||||
|
@@ -24,7 +24,7 @@
|
||||
#include "../../core/macros.h"
|
||||
#include "../../inc/MarlinConfigPre.h"
|
||||
|
||||
#if BOTH(HAS_MARLINUI_U8GLIB, SDSUPPORT) && (LCD_PINS_D4 == SD_SCK_PIN || LCD_PINS_ENABLE == SD_MOSI_PIN || DOGLCD_SCK == SD_SCK_PIN || DOGLCD_MOSI == SD_MOSI_PIN)
|
||||
#if ALL(HAS_MARLINUI_U8GLIB, HAS_MEDIA) && (LCD_PINS_D4 == SD_SCK_PIN || LCD_PINS_EN == SD_MOSI_PIN || DOGLCD_SCK == SD_SCK_PIN || DOGLCD_MOSI == SD_MOSI_PIN)
|
||||
#define SOFTWARE_SPI // If the SD card and LCD adapter share the same SPI pins, then software SPI is currently
|
||||
// needed due to the speed and mode required for communicating with each device being different.
|
||||
// This requirement can be removed if the SPI access to these devices is updated to use
|
||||
|
@@ -1,9 +1,9 @@
|
||||
/**
|
||||
* Marlin 3D Printer Firmware
|
||||
*
|
||||
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
|
||||
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
|
||||
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com
|
||||
*
|
||||
* Based on Sprinter and grbl.
|
||||
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
@@ -1,8 +1,9 @@
|
||||
/**
|
||||
* Marlin 3D Printer Firmware
|
||||
*
|
||||
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
|
||||
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
|
||||
*
|
||||
* Based on Sprinter and grbl.
|
||||
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
@@ -23,11 +23,22 @@
|
||||
|
||||
#include "../../inc/MarlinConfig.h"
|
||||
#include "../shared/Delay.h"
|
||||
#include "../../../gcode/parser.h"
|
||||
#include "../../core/millis_t.h"
|
||||
|
||||
#include <usb/usb.h>
|
||||
#include <usb/usbcfg.h>
|
||||
#include <usb/usbhw.h>
|
||||
#include <usb/usbcore.h>
|
||||
#include <usb/cdc.h>
|
||||
#include <usb/cdcuser.h>
|
||||
#include <usb/mscuser.h>
|
||||
#include <CDCSerial.h>
|
||||
#include <usb/mscuser.h>
|
||||
|
||||
DefaultSerial1 USBSerial(false, UsbSerial);
|
||||
|
||||
uint32_t MarlinHAL::adc_result = 0;
|
||||
pin_t MarlinHAL::adc_pin = 0;
|
||||
|
||||
// U8glib required functions
|
||||
extern "C" {
|
||||
@@ -48,6 +59,138 @@ int freeMemory() {
|
||||
return result;
|
||||
}
|
||||
|
||||
extern "C" {
|
||||
#include <debug_frmwrk.h>
|
||||
int isLPC1769();
|
||||
void disk_timerproc();
|
||||
}
|
||||
|
||||
extern uint32_t MSC_SD_Init(uint8_t pdrv);
|
||||
|
||||
void SysTick_Callback() { disk_timerproc(); }
|
||||
|
||||
TERN_(POSTMORTEM_DEBUGGING, extern void install_min_serial());
|
||||
|
||||
void MarlinHAL::init() {
|
||||
|
||||
// Init LEDs
|
||||
#if PIN_EXISTS(LED)
|
||||
SET_DIR_OUTPUT(LED_PIN);
|
||||
WRITE_PIN_CLR(LED_PIN);
|
||||
#if PIN_EXISTS(LED2)
|
||||
SET_DIR_OUTPUT(LED2_PIN);
|
||||
WRITE_PIN_CLR(LED2_PIN);
|
||||
#if PIN_EXISTS(LED3)
|
||||
SET_DIR_OUTPUT(LED3_PIN);
|
||||
WRITE_PIN_CLR(LED3_PIN);
|
||||
#if PIN_EXISTS(LED4)
|
||||
SET_DIR_OUTPUT(LED4_PIN);
|
||||
WRITE_PIN_CLR(LED4_PIN);
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
// Flash status LED 3 times to indicate Marlin has started booting
|
||||
for (uint8_t i = 0; i < 6; ++i) {
|
||||
TOGGLE(LED_PIN);
|
||||
delay(100);
|
||||
}
|
||||
#endif
|
||||
|
||||
// Init Servo Pins
|
||||
#define INIT_SERVO(N) OUT_WRITE(SERVO##N##_PIN, LOW)
|
||||
#if HAS_SERVO_0
|
||||
INIT_SERVO(0);
|
||||
#endif
|
||||
#if HAS_SERVO_1
|
||||
INIT_SERVO(1);
|
||||
#endif
|
||||
#if HAS_SERVO_2
|
||||
INIT_SERVO(2);
|
||||
#endif
|
||||
#if HAS_SERVO_3
|
||||
INIT_SERVO(3);
|
||||
#endif
|
||||
#if HAS_SERVO_4
|
||||
INIT_SERVO(4);
|
||||
#endif
|
||||
#if HAS_SERVO_5
|
||||
INIT_SERVO(5);
|
||||
#endif
|
||||
|
||||
//debug_frmwrk_init();
|
||||
//_DBG("\n\nDebug running\n");
|
||||
// Initialize the SD card chip select pins as soon as possible
|
||||
#if PIN_EXISTS(SD_SS)
|
||||
OUT_WRITE(SD_SS_PIN, HIGH);
|
||||
#endif
|
||||
|
||||
#if PIN_EXISTS(ONBOARD_SD_CS) && ONBOARD_SD_CS_PIN != SD_SS_PIN
|
||||
OUT_WRITE(ONBOARD_SD_CS_PIN, HIGH);
|
||||
#endif
|
||||
|
||||
#ifdef LPC1768_ENABLE_CLKOUT_12M
|
||||
/**
|
||||
* CLKOUTCFG register
|
||||
* bit 8 (CLKOUT_EN) = enables CLKOUT signal. Disabled for now to prevent glitch when enabling GPIO.
|
||||
* bits 7:4 (CLKOUTDIV) = set to 0 for divider setting of /1
|
||||
* bits 3:0 (CLKOUTSEL) = set to 1 to select main crystal oscillator as CLKOUT source
|
||||
*/
|
||||
LPC_SC->CLKOUTCFG = (0<<8)|(0<<4)|(1<<0);
|
||||
// set P1.27 pin to function 01 (CLKOUT)
|
||||
PINSEL_CFG_Type PinCfg;
|
||||
PinCfg.Portnum = 1;
|
||||
PinCfg.Pinnum = 27;
|
||||
PinCfg.Funcnum = 1; // function 01 (CLKOUT)
|
||||
PinCfg.OpenDrain = 0; // not open drain
|
||||
PinCfg.Pinmode = 2; // no pull-up/pull-down
|
||||
PINSEL_ConfigPin(&PinCfg);
|
||||
// now set CLKOUT_EN bit
|
||||
SBI(LPC_SC->CLKOUTCFG, 8);
|
||||
#endif
|
||||
|
||||
USB_Init(); // USB Initialization
|
||||
USB_Connect(false); // USB clear connection
|
||||
delay(1000); // Give OS time to notice
|
||||
USB_Connect(true);
|
||||
|
||||
TERN_(HAS_SD_HOST_DRIVE, MSC_SD_Init(0)); // Enable USB SD card access
|
||||
|
||||
const millis_t usb_timeout = millis() + 2000;
|
||||
while (!USB_Configuration && PENDING(millis(), usb_timeout)) {
|
||||
delay(50);
|
||||
idletask();
|
||||
#if PIN_EXISTS(LED)
|
||||
TOGGLE(LED_PIN); // Flash quickly during USB initialization
|
||||
#endif
|
||||
}
|
||||
|
||||
HAL_timer_init();
|
||||
|
||||
TERN_(POSTMORTEM_DEBUGGING, install_min_serial()); // Install the min serial handler
|
||||
}
|
||||
|
||||
#include "../../sd/cardreader.h"
|
||||
|
||||
// HAL idle task
|
||||
void MarlinHAL::idletask() {
|
||||
#if HAS_SHARED_MEDIA
|
||||
// If Marlin is using the SD card we need to lock it to prevent access from
|
||||
// a PC via USB.
|
||||
// Other HALs use IS_SD_PRINTING() and IS_SD_FILE_OPEN() to check for access but
|
||||
// this will not reliably detect delete operations. To be safe we will lock
|
||||
// the disk if Marlin has it mounted. Unfortunately there is currently no way
|
||||
// to unmount the disk from the LCD menu.
|
||||
// if (IS_SD_PRINTING() || IS_SD_FILE_OPEN())
|
||||
if (card.isMounted())
|
||||
MSC_Aquire_Lock();
|
||||
else
|
||||
MSC_Release_Lock();
|
||||
#endif
|
||||
// Perform USB stack housekeeping
|
||||
MSC_RunDeferredCommands();
|
||||
}
|
||||
|
||||
void MarlinHAL::reboot() { NVIC_SystemReset(); }
|
||||
|
||||
uint8_t MarlinHAL::get_reset_source() {
|
||||
@@ -112,6 +255,8 @@ void flashFirmware(const int16_t) {
|
||||
|
||||
#endif // USE_WATCHDOG
|
||||
|
||||
#include "../../../gcode/parser.h"
|
||||
|
||||
// For M42/M43, scan command line for pin code
|
||||
// return index into pin map array if found and the pin is valid.
|
||||
// return dval if not found or not a valid pin.
|
||||
|
@@ -1,9 +1,9 @@
|
||||
/**
|
||||
* Marlin 3D Printer Firmware
|
||||
*
|
||||
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
|
||||
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
|
||||
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com
|
||||
*
|
||||
* Based on Sprinter and grbl.
|
||||
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -101,7 +101,7 @@ extern DefaultSerial1 USBSerial;
|
||||
#error "LCD_SERIAL_PORT must be from 0 to 3. You can also use -1 if the board supports Native USB."
|
||||
#endif
|
||||
#if HAS_DGUS_LCD
|
||||
#define SERIAL_GET_TX_BUFFER_FREE() LCD_SERIAL.available()
|
||||
#define LCD_SERIAL_TX_BUFFER_FREE() LCD_SERIAL.available()
|
||||
#endif
|
||||
#endif
|
||||
|
||||
@@ -127,7 +127,7 @@ extern DefaultSerial1 USBSerial;
|
||||
// K = 6, 565 samples, 500Hz sample rate, 1.13s convergence on full range step
|
||||
// Memory usage per ADC channel (bytes): 4 (32 Bytes for 8 channels)
|
||||
|
||||
#define HAL_ADC_VREF 3.3 // ADC voltage reference
|
||||
#define HAL_ADC_VREF_MV 3300 // ADC voltage reference
|
||||
|
||||
#define HAL_ADC_RESOLUTION 12 // 15 bit maximum, raw temperature is stored as int16_t
|
||||
#define HAL_ADC_FILTERED // Disable oversampling done in Marlin as ADC values already filtered in HAL
|
||||
@@ -165,7 +165,9 @@ int16_t PARSED_PIN_INDEX(const char code, const int16_t dval);
|
||||
// Defines
|
||||
// ------------------------
|
||||
|
||||
#define PLATFORM_M997_SUPPORT
|
||||
#ifndef PLATFORM_M997_SUPPORT
|
||||
#define PLATFORM_M997_SUPPORT
|
||||
#endif
|
||||
void flashFirmware(const int16_t);
|
||||
|
||||
#define HAL_CAN_SET_PWM_FREQ // This HAL supports PWM Frequency adjustment
|
||||
@@ -241,15 +243,18 @@ public:
|
||||
|
||||
// Begin ADC sampling on the given pin. Called from Temperature::isr!
|
||||
static uint32_t adc_result;
|
||||
static void adc_start(const pin_t pin) {
|
||||
adc_result = FilteredADC::read(pin) >> (16 - HAL_ADC_RESOLUTION); // returns 16bit value, reduce to required bits
|
||||
}
|
||||
static pin_t adc_pin;
|
||||
|
||||
static void adc_start(const pin_t pin) { adc_pin = pin; }
|
||||
|
||||
// Is the ADC ready for reading?
|
||||
static bool adc_ready() { return true; }
|
||||
static bool adc_ready() { return LPC176x::adc_hardware.done(LPC176x::pin_get_adc_channel(adc_pin)); }
|
||||
|
||||
// The current value of the ADC register
|
||||
static uint16_t adc_value() { return uint16_t(adc_result); }
|
||||
static uint16_t adc_value() {
|
||||
adc_result = FilteredADC::read(adc_pin) >> (16 - HAL_ADC_RESOLUTION); // returns 16bit value, reduce to required bits
|
||||
return uint16_t(adc_result);
|
||||
}
|
||||
|
||||
/**
|
||||
* Set the PWM duty cycle for the pin to the given value.
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user