Merge upstream changes from Marlin 2.1.2.2

buildroot/bin/build_all_examples

@@ -14,7 +14,9 @@
 # build_all_examples [...] branch [resume-from]
 #
 
-. mfutil
+HERE=`dirname $0`
+
+. "$HERE/mfutil"
 
 GITREPO=https://github.com/MarlinFirmware/Configurations.git
 STAT_FILE=./.pio/.buildall
@@ -123,7 +125,7 @@ CONF_TREE=$( ls -d "$TMP"/config/examples/*/ "$TMP"/config/examples/*/*/ "$TMP"/
 for CONF in $CONF_TREE ; do
 
   # Get a config's directory name
-  DIR=$( echo $CONF | sed "s|$TMP/config/examples/||" )
+  DIR=$( echo $CONF | "$SED" "s|$TMP/config/examples/||" )
 
   # If looking for a config, skip others
   [[ $FIRST_CONF ]] && [[ $FIRST_CONF != $DIR && "$FIRST_CONF/" != $DIR ]] && continue

buildroot/bin/build_example

@@ -5,7 +5,9 @@
 # Usage: build_example internal config-home config-folder
 #
 
-. mfutil
+HERE=`dirname $0`
+
+. "$HERE/mfutil"
 
 # Require 'internal' as the first argument
 [[ "$1" == "internal" ]] || { echo "Don't call this script directly, use build_all_examples instead." ; exit 1 ; }
@@ -32,7 +34,10 @@ $SED -i~ -e "20,30{/#error/d}" Marlin/Configuration.h
 rm Marlin/Configuration.h~
 unset IFS; set +f
 
+# Suppress fatal warnings
+echo -e "\n#define NO_CONTROLLER_CUSTOM_WIRING_WARNING" >> Marlin/Configuration.h
+
 echo "Building the firmware now..."
-$HERE/mftest -s -a -n1 || { echo "Failed"; exit 1; }
+"$HERE/mftest" -s -a -n1 || { echo "Failed"; exit 1; }
 
 echo "Success"

buildroot/bin/mftest

@@ -8,6 +8,8 @@
 
 [[ -d Marlin/src ]] || { echo "Please 'cd' to the Marlin repo root." ; exit 1 ; }
 
+which pio || { echo "Make sure 'pio' is in your execution PATH." ; exit 1 ;  }
+
 perror() { echo -e "$0: \033[0;31m$1 -- $2\033[0m" ; }
 errout() { echo -e "\033[0;31m$1\033[0m" ; }
 bugout() { ((DEBUG)) && echo -e "\033[0;32m$1\033[0m" ; }

buildroot/bin/mfutil

@@ -7,13 +7,12 @@
 which curl 1>/dev/null 2>&1 || { echo "curl not found! Please install it."; exit ; }
 which git 1>/dev/null 2>&1 || { echo "git not found! Please install it."; exit ; }
 
-SED=$(command -v gsed 2>/dev/null || command -v sed 2>/dev/null)
+SED=$(which gsed sed | head -n1)
 [[ -z "$SED" ]] && { echo "No sed found, please install sed" ; exit 1 ; }
 
 OPEN=$( which gnome-open xdg-open open | head -n1 )
 
 SELF=`basename "$0"`
-HERE=`dirname "$0"`
 
 # Check if called in the right location
 [[ -e "Marlin/src" ]] || { echo -e "This script must be called from a Marlin working copy with:\n ./buildroot/bin/$SELF $1" ; exit ; }

buildroot/bin/pins_set

@@ -9,7 +9,8 @@ SED=$(which gsed sed | head -n1)
 shift
 while [[ $# > 1 ]]; do
   PIN=$1 ; VAL=$2
-  eval "${SED} -i '/^[[:blank:]]*\(\/\/\)*[[:blank:]]*\(#define \+${PIN}\b\).*$/{s//\2 ${VAL}/;h};\${x;/./{x;q0};x;q9}' Marlin/src/pins/$DIR/pins_${NAM}.h" ||
-  (echo "ERROR: pins_set Can't find ${PIN}" >&2 && exit 9)
+  FOUT="${DIR}/pins_${NAM}.h"
+  eval "${SED} -i '/^[[:blank:]]*\(\/\/\)*[[:blank:]]*\(#define \+${PIN}\b\).*$/{s//\2 ${VAL}/;h};\${x;/./{x;q0};x;q9}' Marlin/src/pins/${FOUT}" ||
+  (echo "ERROR: pins_set Can't find ${PIN} in ${FOUT}" >&2 && exit 9)
   shift 2
 done

buildroot/bin/uncrust

@@ -4,9 +4,10 @@
 #
 
 TMPDIR=`mktemp -d`
+HERE=`dirname "$0"`
 
 # Reformat a single file to tmp/
-if uncrustify -l CPP -c ./buildroot/share/extras/uncrustify.cfg -f "$1" >$TMPDIR/uncrustify.out ; then
+if uncrustify -l CPP -c "$HERE/../share/extras/uncrustify.cfg" -f "$1" >$TMPDIR/uncrustify.out ; then
   cp "$TMPDIR/uncrustify.out" "$1"  ; # Replace the original file
 else
   echo "Something went wrong with uncrustify."

buildroot/bin/use_example_configs

@@ -8,28 +8,37 @@
 #   use_example_configs release-2.0.9.4:Creality/CR-10/CrealityV1
 #
 # If a configpath has spaces (or quotes) escape them or enquote the path
+# If no branch: prefix is given use configs based on the current branch name.
+# e.g., For `latest-2.1.x` name the working branch something like "my_work-2.1.x."
+#       The branch or tag must first exist at MarlinFirmware/Configurations.
+#       The fallback branch is bugfix-2.1.x.
 #
 
 which curl >/dev/null && TOOL='curl -L -s -S -f -o wgot'
 which wget >/dev/null && TOOL='wget -q -O wgot'
 
 CURR=$(git branch 2>/dev/null | grep ^* | sed 's/\* //g')
-[[ $CURR == "bugfix-2.0.x" ]] && BRANCH=bugfix-2.0.x || BRANCH=bugfix-2.1.x
-
-REPO=$BRANCH
+case "$CURR" in
+   bugfix-2.*.x ) BRANCH=$CURR ;;
+  *-2.1.x|2.1.x ) BRANCH=latest-2.1.x ;;
+  *-2.0.x|2.0.x ) BRANCH=latest-2.0.x ;;
+  *-1.1.x|1.1.x ) BRANCH=latest-1.1.x ;;
+  *-1.0.x|1.0.x ) BRANCH=latest-1.0.x ;;
+              * ) BRANCH=bugfix-2.1.x ;;
+esac
 
 if [[ $# > 0 ]]; then
   IFS=: read -r PART1 PART2 <<< "$@"
-  [[ -n $PART2 ]] && { UDIR="$PART2" ; REPO="$PART1" ; } \
+  [[ -n $PART2 ]] && { UDIR="$PART2" ; BRANCH="$PART1" ; } \
                   || { UDIR="$PART1" ; }
   RDIR="${UDIR// /%20}"
-  echo "Fetching $UDIR configurations from $REPO..."
+  echo "Fetching $UDIR configurations from $BRANCH..."
   EXAMPLES="examples/$RDIR"
 else
   EXAMPLES="default"
 fi
 
-CONFIGS="https://raw.githubusercontent.com/MarlinFirmware/Configurations/$REPO/config/${EXAMPLES}"
+CONFIGS="https://raw.githubusercontent.com/MarlinFirmware/Configurations/$BRANCH/config/${EXAMPLES}"
 
 restore_configs
 

buildroot/share/PlatformIO/boards/marlin_CREALITY_STM32F401RE.json

@@ -15,11 +15,11 @@
       ]
     ],
     "ldscript": "ldscript.ld",
-    "mcu": "stm32f401rct6",
-    "variant": "MARLIN_CREALITY_STM32F401RC"
+    "mcu": "stm32f401ret6",
+    "variant": "MARLIN_CREALITY_STM32F401RE"
   },
   "debug": {
-    "jlink_device": "STM32F401RC",
+    "jlink_device": "STM32F401RE",
     "openocd_target": "stm32f4x",
     "svd_path": "STM32F40x.svd",
     "tools": {
@@ -45,11 +45,11 @@
     "arduino",
     "stm32cube"
   ],
-  "name": "STM32F401RC (64k RAM. 256k Flash)",
+  "name": "STM32F401RE (64k RAM. 512k Flash)",
   "upload": {
     "disable_flushing": false,
     "maximum_ram_size": 65536,
-    "maximum_size": 262144,
+    "maximum_size": 514288,
     "protocol": "stlink",
     "protocols": [
       "stlink",
@@ -60,6 +60,6 @@
     "use_1200bps_touch": false,
     "wait_for_upload_port": false
   },
-  "url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f401rc.html",
+  "url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f401re.html",
   "vendor": "Generic"
 }

buildroot/share/PlatformIO/boards/marlin_FYSETC_CHEETAH_V30.json

@@ -0,0 +1,35 @@
+{
+  "build": {
+    "cpu": "cortex-m4",
+    "extra_flags": "-DSTM32F446xx",
+    "f_cpu": "180000000L",
+    "mcu": "stm32f446ret6",
+    "variant": "MARLIN_F446VE"
+  },
+  "connectivity": [
+    "can"
+  ],
+  "debug": {
+    "jlink_device": "STM32F446RE",
+    "openocd_target": "stm32f4x",
+    "svd_path": "STM32F446x.svd"
+  },
+  "frameworks": [
+    "arduino",
+    "stm32cube"
+  ],
+  "name": "3D Printer control board",
+  "upload": {
+    "maximum_ram_size": 131072,
+    "maximum_size": 524288,
+    "protocol": "stlink",
+    "protocols": [
+      "jlink",
+      "stlink",
+      "blackmagic",
+      "serial"
+    ]
+  },
+  "url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html",
+  "vendor": "FYSETC"
+}

buildroot/share/PlatformIO/boards/marlin_STM32H723VG.json

@@ -4,16 +4,16 @@
     "cpu": "cortex-m7",
     "extra_flags": "-DSTM32H7xx -DSTM32H723xx",
     "f_cpu": "550000000L",
-    "mcu": "stm32h723vet6",
+    "mcu": "stm32h723vgt6",
     "product_line": "STM32H723xx",
-    "variant": "MARLIN_H723Vx"
+    "variant": "MARLIN_H723VG"
   },
   "connectivity": [
     "can",
     "ethernet"
   ],
   "debug": {
-    "jlink_device": "STM32H723VE",
+    "jlink_device": "STM32H723VG",
     "openocd_target": "stm32h7x",
     "svd_path": "STM32H7x3.svd",
     "tools": {
@@ -39,11 +39,11 @@
     "arduino",
     "stm32cube"
   ],
-  "name": "STM32H723VE (564k RAM. 512k Flash)",
+  "name": "STM32H723VG (564k RAM. 1024k Flash)",
   "upload": {
     "disable_flushing": false,
     "maximum_ram_size": 577536,
-    "maximum_size": 524288,
+    "maximum_size": 1048576,
     "protocol": "stlink",
     "protocols": [
       "stlink",
@@ -56,6 +56,6 @@
     "use_1200bps_touch": false,
     "wait_for_upload_port": false
   },
-  "url": "https://www.st.com/en/microcontrollers-microprocessors/stm32h723ze.html",
+  "url": "https://www.st.com/en/microcontrollers-microprocessors/stm32h723vg.html",
   "vendor": "ST"
 }

buildroot/share/PlatformIO/boards/marlin_STM32H723ZE.json

@@ -6,7 +6,7 @@
     "f_cpu": "550000000L",
     "mcu": "stm32h723zet6",
     "product_line": "STM32H723xx",
-    "variant": "MARLIN_H723Zx"
+    "variant": "MARLIN_H723ZE"
   },
   "connectivity": [
     "can",

buildroot/share/PlatformIO/boards/marlin_STM32H743VI.json

@@ -6,7 +6,7 @@
     "f_cpu": "480000000L",
     "mcu": "stm32h743vit6",
     "product_line": "STM32H743xx",
-    "variant": "MARLIN_H743Vx"
+    "variant": "MARLIN_H743VI"
   },
   "connectivity": [
     "can",

buildroot/share/PlatformIO/debugging/launch.json

@@ -45,6 +45,15 @@
             //"program": "${workspaceRoot}/.pio/build/simulator_windows/MarlinSimulator",
             //"targetArchitecture": "arm64",
             "MIMode": "lldb"
+        },
+        {
+            "name": "Launch Sim (Windows gdb)",
+            "request": "launch",
+            "type": "cppdbg",
+            "cwd": "${workspaceRoot}",
+            "program": "${workspaceRoot}/.pio/build/simulator_windows/debug/MarlinSimulator.exe",
+            "MIMode": "gdb",
+            "miDebuggerPath": "C:/msys64/mingw64/bin/gdb.exe"
         }
     ]
 }

buildroot/share/PlatformIO/ldscripts/creality.ld

@@ -1,7 +1,7 @@
 MEMORY
 {
   ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K - 40
-  rom (rx)  : ORIGIN = 0x08007000, LENGTH = 512K - 28K
+  rom (rx)  : ORIGIN = 0x08007000, LENGTH = 512K - 64K
 }
 
 /* Provide memory region aliases for common.inc */

buildroot/share/PlatformIO/ldscripts/creality256k.ld

@@ -0,0 +1,14 @@
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K - 40
+  rom (rx)  : ORIGIN = 0x08007000, LENGTH = 256K - 28K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

buildroot/share/PlatformIO/scripts/chitu_crypt.py

@@ -9,7 +9,7 @@ if pioutil.is_pio_build():
     board = marlin.env.BoardConfig()
 
     def calculate_crc(contents, seed):
-        accumulating_xor_value = seed;
+        accumulating_xor_value = seed
 
         for i in range(0, len(contents), 4):
             value = struct.unpack('<I', contents[ i : i + 4])[0]
@@ -68,7 +68,7 @@ if pioutil.is_pio_build():
         uid_value = uuid.uuid4()
         file_key = int(uid_value.hex[0:8], 16)
 
-        xor_crc = 0xEF3D4323;
+        xor_crc = 0xEF3D4323
 
         # the input file is exepcted to be in chunks of 0x800
         # so round the size
@@ -123,4 +123,4 @@ if pioutil.is_pio_build():
         fwpath.unlink()
 
     marlin.relocate_firmware("0x08008800")
-    marlin.add_post_action(encrypt);
+    marlin.add_post_action(encrypt)

buildroot/share/PlatformIO/scripts/common-dependencies.h

@@ -33,7 +33,7 @@
 //
 #if ENABLED(SR_LCD_3W_NL)
   // Feature checks for SR_LCD_3W_NL
-#elif EITHER(LCD_I2C_TYPE_MCP23017, LCD_I2C_TYPE_MCP23008)
+#elif ANY(LCD_I2C_TYPE_MCP23017, LCD_I2C_TYPE_MCP23008)
   #define USES_LIQUIDTWI2
 #elif ENABLED(LCD_I2C_TYPE_PCA8574)
   #define USES_LIQUIDCRYSTAL_I2C
@@ -54,21 +54,21 @@
     #define HAS_MENU_BACKLASH
   #endif
   #if ENABLED(LCD_BED_TRAMMING)
-    #define HAS_MENU_BED_CORNERS
+    #define HAS_MENU_BED_TRAMMING
   #endif
   #if ENABLED(CANCEL_OBJECTS)
     #define HAS_MENU_CANCELOBJECT
   #endif
-  #if EITHER(DELTA_CALIBRATION_MENU, DELTA_AUTO_CALIBRATION)
+  #if ANY(DELTA_CALIBRATION_MENU, DELTA_AUTO_CALIBRATION)
     #define HAS_MENU_DELTA_CALIBRATE
   #endif
-  #if EITHER(LED_CONTROL_MENU, CASE_LIGHT_MENU)
+  #if ANY(LED_CONTROL_MENU, CASE_LIGHT_MENU)
     #define HAS_MENU_LED
   #endif
   #if ENABLED(ADVANCED_PAUSE_FEATURE)
     #define HAS_MENU_FILAMENT
   #endif
-  #if ENABLED(SDSUPPORT)
+  #if HAS_MEDIA
     #define HAS_MENU_MEDIA
   #endif
   #if ENABLED(MIXING_EXTRUDER)
@@ -99,7 +99,7 @@
     #define HAS_MENU_TOUCH_SCREEN
   #endif
   #if ENABLED(ASSISTED_TRAMMING_WIZARD)
-    #define HAS_MENU_TRAMMING
+    #define HAS_MENU_TRAMMING_WIZARD
   #endif
   #if ENABLED(AUTO_BED_LEVELING_UBL)
     #define HAS_MENU_UBL

buildroot/share/PlatformIO/scripts/common-dependencies.py

@@ -5,7 +5,9 @@
 import pioutil
 if pioutil.is_pio_build():
 
-    import subprocess,os,re
+    import subprocess,os,re,fnmatch,glob
+    srcfilepattern = re.compile(r".*[.](cpp|c)$")
+    marlinbasedir = os.path.join(os.getcwd(), "Marlin/")
     Import("env")
 
     from platformio.package.meta import PackageSpec
@@ -53,10 +55,11 @@ if pioutil.is_pio_build():
         # Get a reference to the FEATURE_CONFIG under construction
         feat = FEATURE_CONFIG[feature]
 
-        # Split up passed lines on commas or newlines and iterate
-        # Add common options to the features config under construction
-        # For lib_deps replace a previous instance of the same library
-        atoms = re.sub(r',\s*', '\n', flines).strip().split('\n')
+        # Split up passed lines on commas or newlines and iterate.
+        # Take care to convert Windows '\' paths to Unix-style '/'.
+        # Add common options to the features config under construction.
+        # For lib_deps replace a previous instance of the same library.
+        atoms = re.sub(r',\s*', '\n', flines.replace('\\', '/')).strip().split('\n')
         for line in atoms:
             parts = line.split('=')
             name = parts.pop(0)
@@ -91,7 +94,7 @@ if pioutil.is_pio_build():
                     val = None
                 if val:
                     opt = mat[1].upper()
-                    blab("%s.custom_marlin.%s = '%s'" % ( env['PIOENV'], opt, val ))
+                    blab("%s.custom_marlin.%s = '%s'" % ( env['PIOENV'], opt, val ), 2)
                     add_to_feat_cnf(opt, val)
 
     def get_all_known_libs():
@@ -128,6 +131,7 @@ if pioutil.is_pio_build():
     def apply_features_config():
         load_features()
         blab("========== Apply enabled features...")
+        build_filters = ' '.join(env.GetProjectOption('build_src_filter'))
         for feature in FEATURE_CONFIG:
             if not env.MarlinHas(feature):
                 continue
@@ -174,23 +178,87 @@ if pioutil.is_pio_build():
 
             if 'build_src_filter' in feat:
                 blab("========== Adding build_src_filter for %s... " % feature, 2)
-                build_src_filter = ' '.join(env.GetProjectOption('build_src_filter'))
-                # first we need to remove the references to the same folder
-                my_srcs = re.findall(r'[+-](<.*?>)', feat['build_src_filter'])
-                cur_srcs = re.findall(r'[+-](<.*?>)', build_src_filter)
-                for d in my_srcs:
-                    if d in cur_srcs:
-                        build_src_filter = re.sub(r'[+-]' + d, '', build_src_filter)
-
-                build_src_filter = feat['build_src_filter'] + ' ' + build_src_filter
-                set_env_field('build_src_filter', [build_src_filter])
-                env.Replace(SRC_FILTER=build_src_filter)
+                build_filters = build_filters + ' ' + feat['build_src_filter']
+                # Just append the filter in the order that the build environment specifies.
+                # Important here is the order of entries in the "features.ini" file.
 
             if 'lib_ignore' in feat:
                 blab("========== Adding lib_ignore for %s... " % feature, 2)
                 lib_ignore = env.GetProjectOption('lib_ignore') + [feat['lib_ignore']]
                 set_env_field('lib_ignore', lib_ignore)
 
+        build_src_filter = ""
+        if True:
+            # Build the actual equivalent build_src_filter list based on the inclusions by the features.
+            # PlatformIO doesn't do it this way, but maybe in the future....
+            cur_srcs = set()
+            # Remove the references to the same folder
+            my_srcs = re.findall(r'([+-]<.*?>)', build_filters)
+            for d in my_srcs:
+                # Assume normalized relative paths
+                plain = d[2:-1]
+                if d[0] == '+':
+                    def addentry(fullpath, info=None):
+                        relp = os.path.relpath(fullpath, marlinbasedir)
+                        if srcfilepattern.match(relp):
+                            if info:
+                                blab("Added src file %s (%s)" % (relp, str(info)), 3)
+                            else:
+                                blab("Added src file %s " % relp, 3)
+                            cur_srcs.add(relp)
+                    # Special rule: If a direct folder is specified add all files within.
+                    fullplain = os.path.join(marlinbasedir, plain)
+                    if os.path.isdir(fullplain):
+                        blab("Directory content addition for %s " % plain, 3)
+                        gpattern = os.path.join(fullplain, "**")
+                        for fname in glob.glob(gpattern, recursive=True):
+                            addentry(fname, "dca")
+                    else:
+                        # Add all the things from the pattern by GLOB.
+                        def srepl(matchi):
+                            g0 = matchi.group(0)
+                            return r"**" + g0[1:]
+                        gpattern = re.sub(r'[*]($|[^*])', srepl, plain)
+                        gpattern = os.path.join(marlinbasedir, gpattern)
+
+                        for fname in glob.glob(gpattern, recursive=True):
+                            addentry(fname)
+                else:
+                    # Special rule: If a direct folder is specified then remove all files within.
+                    def onremove(relp, info=None):
+                        if info:
+                            blab("Removed src file %s (%s)" % (relp, str(info)), 3)
+                        else:
+                            blab("Removed src file %s " % relp, 3)
+                    fullplain = os.path.join(marlinbasedir, plain)
+                    if os.path.isdir(fullplain):
+                        blab("Directory content removal for %s " % plain, 2)
+                        def filt(x):
+                            common = os.path.commonpath([plain, x])
+                            if not common == os.path.normpath(plain): return True
+                            onremove(x, "dcr")
+                            return False
+                        cur_srcs = set(filter(filt, cur_srcs))
+                    else:
+                        # Remove matching source entries.
+                        def filt(x):
+                            if not fnmatch.fnmatch(x, plain): return True
+                            onremove(x)
+                            return False
+                        cur_srcs = set(filter(filt, cur_srcs))
+            # Transform the resulting set into a string.
+            for x in cur_srcs:
+                if build_src_filter != "": build_src_filter += ' '
+                build_src_filter += "+<" + x + ">"
+
+            #blab("Final build_src_filter: " + build_src_filter, 3)
+        else:
+            build_src_filter = build_filters
+
+        # Update in PlatformIO
+        set_env_field('build_src_filter', [build_src_filter])
+        env.Replace(SRC_FILTER=build_src_filter)
+
     #
     # Use the compiler to get a list of all enabled features
     #
@@ -213,7 +281,7 @@ if pioutil.is_pio_build():
     #
     def MarlinHas(env, feature):
         load_marlin_features()
-        r = re.compile('^' + feature + '$')
+        r = re.compile('^' + feature + '$', re.IGNORECASE)
         found = list(filter(r.match, env['MARLIN_FEATURES']))
 
         # Defines could still be 'false' or '0', so check
@@ -226,6 +294,8 @@ if pioutil.is_pio_build():
                 elif val in env['MARLIN_FEATURES']:
                     some_on = env.MarlinHas(val)
 
+        #blab("%s is %s" % (feature, str(some_on)), 2)
+
         return some_on
 
     validate_pio()

buildroot/share/PlatformIO/scripts/configuration.py

@@ -1,8 +1,9 @@
+#!/usr/bin/env python3
 #
 # configuration.py
 # Apply options from config.ini to the existing Configuration headers
 #
-import re, shutil, configparser
+import re, shutil, configparser, datetime
 from pathlib import Path
 
 verbose = 0
@@ -43,6 +44,7 @@ def apply_opt(name, val, conf=None):
                 if val in ("on", "", None):
                     newline = re.sub(r'^(\s*)//+\s*(#define)(\s{1,3})?(\s*)', r'\1\2 \4', line)
                 elif val == "off":
+                    # TODO: Comment more lines in a multi-line define with \ continuation
                     newline = re.sub(r'^(\s*)(#define)(\s{1,3})?(\s*)', r'\1//\2 \4', line)
                 else:
                     # For options with values, enable and set the value
@@ -88,9 +90,38 @@ def apply_opt(name, val, conf=None):
                 elif not isdef:
                     break
                 linenum += 1
-            lines.insert(linenum, f"{prefix}#define {added:30} // Added by config.ini\n")
+            currtime = datetime.datetime.now().strftime("%Y-%m-%d %H:%M:%S")
+            lines.insert(linenum, f"{prefix}#define {added:30} // Added by config.ini {currtime}\n")
             fullpath.write_text(''.join(lines), encoding='utf-8')
 
+# Disable all (most) defined options in the configuration files.
+# Everything in the named sections. Section hint for exceptions may be added.
+def disable_all_options():
+    # Create a regex to match the option and capture parts of the line
+    regex = re.compile(r'^(\s*)(#define\s+)([A-Z0-9_]+\b)(\s?)(\s*)(.*?)(\s*)(//.*)?$', re.IGNORECASE)
+
+    # Disable all enabled options in both Config files
+    for file in ("Configuration.h", "Configuration_adv.h"):
+        fullpath = config_path(file)
+        lines = fullpath.read_text(encoding='utf-8').split('\n')
+        found = False
+        for i in range(len(lines)):
+            line = lines[i]
+            match = regex.match(line)
+            if match:
+                name = match[3].upper()
+                if name in ('CONFIGURATION_H_VERSION', 'CONFIGURATION_ADV_H_VERSION'): continue
+                if name.startswith('_'): continue
+                found = True
+                # Comment out the define
+                # TODO: Comment more lines in a multi-line define with \ continuation
+                lines[i] = re.sub(r'^(\s*)(#define)(\s{1,3})?(\s*)', r'\1//\2 \4', line)
+                blab(f"Disable {name}")
+
+        # If the option was found, write the modified lines
+        if found:
+            fullpath.write_text('\n'.join(lines), encoding='utf-8')
+
 # Fetch configuration files from GitHub given the path.
 # Return True if any files were fetched.
 def fetch_example(url):
@@ -130,7 +161,7 @@ def fetch_example(url):
 def section_items(cp, sectkey):
     return cp.items(sectkey) if sectkey in cp.sections() else []
 
-# Apply all items from a config section
+# Apply all items from a config section. Ignore ini_ items outside of config:base and config:root.
 def apply_ini_by_name(cp, sect):
     iniok = True
     if sect in ('config:base', 'config:root'):
@@ -194,7 +225,7 @@ def apply_config_ini(cp):
             cp2 = configparser.ConfigParser()
             cp2.read(config_path(ckey))
             apply_sections(cp2, sect)
-            ckey = 'base';
+            ckey = 'base'
 
         # (Allow 'example/' as a shortcut for 'examples/')
         elif ckey.startswith('example/'):
@@ -206,7 +237,17 @@ def apply_config_ini(cp):
             fetch_example(ckey)
             ckey = 'base'
 
-        if ckey == 'all':
+        #
+        # [flatten] Write out Configuration.h and Configuration_adv.h files with
+        #           just the enabled options and all other content removed.
+        #
+        #if ckey == '[flatten]':
+        #   write_flat_configs()
+
+        if ckey == '[disable]':
+            disable_all_options()
+
+        elif ckey == 'all':
             apply_sections(cp)
 
         else:

buildroot/share/PlatformIO/scripts/download_mks_assets.py

@@ -14,7 +14,7 @@ if pioutil.is_pio_build():
     assets_path = Path(env.Dictionary("PROJECT_BUILD_DIR"), env.Dictionary("PIOENV"), "assets")
 
     def download_mks_assets():
-        print("Downloading MKS Assets")
+        print("Downloading MKS Assets for TFT_LVGL_UI")
         r = requests.get(url, stream=True)
         # the user may have a very clean workspace,
         # so create the PROJECT_LIBDEPS_DIR directory if not exits
@@ -25,7 +25,7 @@ if pioutil.is_pio_build():
                 fd.write(chunk)
 
     def copy_mks_assets():
-        print("Copying MKS Assets")
+        print("Copying MKS Assets for TFT_LVGL_UI")
         output_path = Path(tempfile.mkdtemp())
         zip_obj = zipfile.ZipFile(zip_path, 'r')
         zip_obj.extractall(output_path)

buildroot/share/PlatformIO/scripts/fix_framework_weakness.py

@@ -23,7 +23,7 @@ if pioutil.is_pio_build():
 
             assert isfile(original_file) and isfile(src_file)
             shutil.copyfile(original_file, backup_file)
-            shutil.copyfile(src_file, original_file);
+            shutil.copyfile(src_file, original_file)
 
             def _touch(path):
                 with open(path, "w") as fp:

buildroot/share/PlatformIO/scripts/generic_create_variant.py

@@ -5,7 +5,8 @@
 # the appropriate framework variants folder, so that its contents
 # will be picked up by PlatformIO just like any other variant.
 #
-import pioutil
+import pioutil, re
+marlin_variant_pattern = re.compile("marlin_.*")
 if pioutil.is_pio_build():
     import shutil,marlin
     from pathlib import Path
@@ -30,10 +31,11 @@ if pioutil.is_pio_build():
         }
         platform_name = framewords[platform.__class__.__name__]
     else:
-        platform_name = PackageSpec(platform_packages[0]).name
-
-    if platform_name in [ "usb-host-msc", "usb-host-msc-cdc-msc", "usb-host-msc-cdc-msc-2", "usb-host-msc-cdc-msc-3", "tool-stm32duino", "biqu-bx-workaround", "main" ]:
-        platform_name = "framework-arduinoststm32"
+        spec = PackageSpec(platform_packages[0])
+        if spec.uri and '@' in spec.uri:
+            platform_name = re.sub(r'@.+', '', spec.uri)
+        else:
+            platform_name = spec.name
 
     FRAMEWORK_DIR = Path(platform.get_package_dir(platform_name))
     assert FRAMEWORK_DIR.is_dir()
@@ -44,15 +46,20 @@ if pioutil.is_pio_build():
     variant = board.get("build.variant")
     #series = mcu_type[:7].upper() + "xx"
 
-    # Prepare a new empty folder at the destination
-    variant_dir = FRAMEWORK_DIR / "variants" / variant
-    if variant_dir.is_dir():
-        shutil.rmtree(variant_dir)
-    if not variant_dir.is_dir():
-        variant_dir.mkdir()
+    # Only prepare a new variant if the PlatformIO configuration provides it (board_build.variant).
+    # This check is important to avoid deleting official board config variants.
+    if marlin_variant_pattern.match(str(variant).lower()):
+        # Prepare a new empty folder at the destination
+        variant_dir = FRAMEWORK_DIR / "variants" / variant
+        if variant_dir.is_dir():
+            shutil.rmtree(variant_dir)
+        if not variant_dir.is_dir():
+            variant_dir.mkdir()
 
-    # Source dir is a local variant sub-folder
-    source_dir = Path("buildroot/share/PlatformIO/variants", variant)
-    assert source_dir.is_dir()
+        # Source dir is a local variant sub-folder
+        source_dir = Path("buildroot/share/PlatformIO/variants", variant)
+        assert source_dir.is_dir()
 
-    marlin.copytree(source_dir, variant_dir)
+        print("Copying variant " + str(variant) + " to framework directory...")
+
+        marlin.copytree(source_dir, variant_dir)

buildroot/share/PlatformIO/scripts/jgaurora_a5s_a1_with_bootloader.py

@@ -32,4 +32,4 @@ if pioutil.is_pio_build():
         fw_path.rename(fws_path)
 
     import marlin
-    marlin.add_post_action(addboot);
+    marlin.add_post_action(addboot)

buildroot/share/PlatformIO/scripts/marlin.py

@@ -70,4 +70,4 @@ def encrypt_mks(source, target, env, new_name):
         fwpath.unlink()
 
 def add_post_action(action):
-    env.AddPostAction(str(Path("$BUILD_DIR", "${PROGNAME}.bin")), action);
+    env.AddPostAction(str(Path("$BUILD_DIR", "${PROGNAME}.bin")), action)

buildroot/share/PlatformIO/scripts/offset_and_rename.py

@@ -1,7 +1,7 @@
 #
 # offset_and_rename.py
 #
-# - If 'build.offset' is provided, either by JSON or by the environment...
+# - If 'board_build.offset' is provided, either by JSON or by the environment...
 #   - Set linker flag LD_FLASH_OFFSET and relocate the VTAB based on 'build.offset'.
 #   - Set linker flag LD_MAX_DATA_SIZE based on 'build.maximum_ram_size'.
 #   - Define STM32_FLASH_SIZE from 'upload.maximum_size' for use by Flash-based EEPROM emulation.
@@ -60,6 +60,10 @@ if pioutil.is_pio_build():
 
         def rename_target(source, target, env):
             from pathlib import Path
-            Path(target[0].path).replace(Path(target[0].dir.path, new_name))
+            from datetime import datetime
+            from os import path
+            _newpath = Path(target[0].dir.path, datetime.now().strftime(new_name.replace('{date}', '%Y%m%d').replace('{time}', '%H%M%S')))
+            Path(target[0].path).replace(_newpath)
+            env['PROGNAME'] = path.splitext(_newpath)[0]
 
         marlin.add_post_action(rename_target)

buildroot/share/PlatformIO/scripts/preflight-checks.py

@@ -72,7 +72,7 @@ if pioutil.is_pio_build():
         result = check_envs("env:"+build_env, board_envs, config)
 
         if not result:
-            err = "Error: Build environment '%s' is incompatible with %s. Use one of these: %s" % \
+            err = "Error: Build environment '%s' is incompatible with %s. Use one of these environments: %s" % \
                   ( build_env, motherboard, ", ".join([ e[4:] for e in board_envs if e.startswith("env:") ]) )
             raise SystemExit(err)
 
@@ -90,7 +90,7 @@ if pioutil.is_pio_build():
         # Find the name.cpp.o or name.o and remove it
         #
         def rm_ofile(subdir, name):
-            build_dir = Path(env['PROJECT_BUILD_DIR'], build_env);
+            build_dir = Path(env['PROJECT_BUILD_DIR'], build_env)
             for outdir in (build_dir, build_dir / "debug"):
                 for ext in (".cpp.o", ".o"):
                     fpath = outdir / "src/src" / subdir / (name + ext)

buildroot/share/PlatformIO/scripts/random-bin.py

@@ -1,9 +0,0 @@
-#
-# random-bin.py
-# Set a unique firmware name based on current date and time
-#
-import pioutil
-if pioutil.is_pio_build():
-    from datetime import datetime
-    Import("env")
-    env['PROGNAME'] = datetime.now().strftime("firmware-%Y%m%d-%H%M%S")

buildroot/share/PlatformIO/scripts/schema.py

@@ -2,8 +2,14 @@
 #
 # schema.py
 #
-# Used by signature.py via common-dependencies.py to generate a schema file during the PlatformIO build.
-# This script can also be run standalone from within the Marlin repo to generate all schema files.
+# Used by signature.py via common-dependencies.py to generate a schema file during the PlatformIO build
+# when CONFIG_EXPORT is defined in the configuration.
+#
+# This script can also be run standalone from within the Marlin repo to generate JSON and YAML schema files.
+#
+# This script is a companion to abm/js/schema.js in the MarlinFirmware/AutoBuildMarlin project, which has
+# been extended to evaluate conditions and can determine what options are actually enabled, not just which
+# options are uncommented. That will be migrated to this script for standalone migration.
 #
 import re,json
 from pathlib import Path
@@ -74,7 +80,26 @@ def load_boards():
     return ''
 
 #
-# Extract a schema from the current configuration files
+# Extract the current configuration files in the form of a structured schema.
+# Contains the full schema for the configuration files, not just the enabled options,
+# Contains the current values of the options, not just data structure, so "schema" is a slight misnomer.
+#
+# The returned object is a nested dictionary with the following indexing:
+#
+#  - schema[filekey][section][define_name] = define_info
+#
+# Where the define_info contains the following keyed fields:
+#    - section  = The @section the define is in
+#    - name     = The name of the define
+#    - enabled  = True if the define is enabled (not commented out)
+#    - line     = The line number of the define
+#    - sid      = A serial ID for the define
+#    - value    = The value of the define, if it has one
+#    - type     = The type of the define, if it has one
+#    - requires = The conditions that must be met for the define to be enabled
+#    - comment  = The comment for the define, if it has one
+#    - units    = The units for the define, if it has one
+#    - options  = The options for the define, if it has one
 #
 def extract():
     # Load board names from boards.h
@@ -85,7 +110,8 @@ def extract():
         NORMAL          = 0 # No condition yet
         BLOCK_COMMENT   = 1 # Looking for the end of the block comment
         EOL_COMMENT     = 2 # EOL comment started, maybe add the next comment?
-        GET_SENSORS     = 3 # Gathering temperature sensor options
+        SLASH_COMMENT   = 3 # Block-like comment, starting with aligned //
+        GET_SENSORS     = 4 # Gathering temperature sensor options
         ERROR           = 9 # Syntax error
 
     # List of files to process, with shorthand
@@ -94,6 +120,8 @@ def extract():
     sch_out = { 'basic':{}, 'advanced':{} }
     # Regex for #define NAME [VALUE] [COMMENT] with sanitized line
     defgrep = re.compile(r'^(//)?\s*(#define)\s+([A-Za-z0-9_]+)\s*(.*?)\s*(//.+)?$')
+    # Pattern to match a float value
+    flt = r'[-+]?\s*(\d+\.|\d*\.\d+)([eE][-+]?\d+)?[fF]?'
     # Defines to ignore
     ignore = ('CONFIGURATION_H_VERSION', 'CONFIGURATION_ADV_H_VERSION', 'CONFIG_EXAMPLES_DIR', 'CONFIG_EXPORT')
     # Start with unknown state
@@ -107,6 +135,7 @@ def extract():
             line_number = 0         # Counter for the line number of the file
             conditions = []         # Create a condition stack for the current file
             comment_buff = []       # A temporary buffer for comments
+            prev_comment = ''       # Copy before reset for an EOL comment
             options_json = ''       # A buffer for the most recent options JSON found
             eol_options = False     # The options came from end of line, so only apply once
             join_line = False       # A flag that the line should be joined with the previous one
@@ -143,9 +172,13 @@ def extract():
                     if not defmatch and the_line.startswith('//'):
                         comment_buff.append(the_line[2:].strip())
                     else:
-                        last_added_ref['comment'] = ' '.join(comment_buff)
-                        comment_buff = []
                         state = Parse.NORMAL
+                        cline = ' '.join(comment_buff)
+                        comment_buff = []
+                        if cline != '':
+                            # A (block or slash) comment was already added
+                            cfield = 'notes' if 'comment' in last_added_ref else 'comment'
+                            last_added_ref[cfield] = cline
 
                 def use_comment(c, opt, sec, bufref):
                     if c.startswith(':'):               # If the comment starts with : then it has magic JSON
@@ -162,6 +195,15 @@ def extract():
                         bufref.append(c)
                     return opt, sec
 
+                # For slash comments, capture consecutive slash comments.
+                # The comment will be applied to the next #define.
+                if state == Parse.SLASH_COMMENT:
+                    if not defmatch and the_line.startswith('//'):
+                        use_comment(the_line[2:].strip(), options_json, section, comment_buff)
+                        continue
+                    else:
+                        state = Parse.NORMAL
+
                 # In a block comment, capture lines up to the end of the comment.
                 # Assume nothing follows the comment closure.
                 if state in (Parse.BLOCK_COMMENT, Parse.GET_SENSORS):
@@ -178,19 +220,19 @@ def extract():
                         state = Parse.NORMAL
 
                     # Strip the leading '*' from block comments
-                    if cline.startswith('*'): cline = cline[1:].strip()
+                    cline = re.sub(r'^\* ?', '', cline)
 
                     # Collect temperature sensors
                     if state == Parse.GET_SENSORS:
                         sens = re.match(r'^(-?\d+)\s*:\s*(.+)$', cline)
                         if sens:
                             s2 = sens[2].replace("'","''")
-                            options_json += f"{sens[1]}:'{s2}', "
+                            options_json += f"{sens[1]}:'{sens[1]} - {s2}', "
 
                     elif state == Parse.BLOCK_COMMENT:
 
                         # Look for temperature sensors
-                        if cline == "Temperature sensors available:":
+                        if re.match(r'temperature sensors.*:', cline, re.IGNORECASE):
                             state, cline = Parse.GET_SENSORS, "Temperature Sensors"
 
                         options_json, section = use_comment(cline, options_json, section, comment_buff)
@@ -216,15 +258,19 @@ def extract():
                         # Comment after a define may be continued on the following lines
                         if defmatch != None and cpos > 10:
                             state = Parse.EOL_COMMENT
+                            prev_comment = '\n'.join(comment_buff)
                             comment_buff = []
+                        else:
+                            state = Parse.SLASH_COMMENT
 
                     # Process the start of a new comment
                     if cpos != -1:
+                        comment_buff = []
                         cline, line = line[cpos+2:].strip(), line[:cpos].strip()
 
                         if state == Parse.BLOCK_COMMENT:
                             # Strip leading '*' from block comments
-                            if cline.startswith('*'): cline = cline[1:].strip()
+                            cline = re.sub(r'^\* ?', '', cline)
                         else:
                             # Expire end-of-line options after first use
                             if cline.startswith(':'): eol_options = True
@@ -295,32 +341,33 @@ def extract():
                         }
 
                         # Type is based on the value
-                        if val == '':
-                            value_type = 'switch'
-                        elif re.match(r'^(true|false)$', val):
-                            value_type = 'bool'
-                            val = val == 'true'
-                        elif re.match(r'^[-+]?\s*\d+$', val):
-                            value_type = 'int'
-                            val = int(val)
-                        elif re.match(r'[-+]?\s*(\d+\.|\d*\.\d+)([eE][-+]?\d+)?[fF]?', val):
-                            value_type = 'float'
-                            val = float(val.replace('f',''))
-                        else:
-                            value_type = 'string'   if val[0] == '"' \
-                                    else 'char'     if val[0] == "'" \
-                                    else 'state'    if re.match(r'^(LOW|HIGH)$', val) \
-                                    else 'enum'     if re.match(r'^[A-Za-z0-9_]{3,}$', val) \
-                                    else 'int[]'    if re.match(r'^{(\s*[-+]?\s*\d+\s*(,\s*)?)+}$', val) \
-                                    else 'float[]'  if re.match(r'^{(\s*[-+]?\s*(\d+\.|\d*\.\d+)([eE][-+]?\d+)?[fF]?\s*(,\s*)?)+}$', val) \
-                                    else 'array'    if val[0] == '{' \
-                                    else ''
+                        value_type = \
+                             'switch'  if val == '' \
+                        else 'bool'    if re.match(r'^(true|false)$', val) \
+                        else 'int'     if re.match(r'^[-+]?\s*\d+$', val) \
+                        else 'ints'    if re.match(r'^([-+]?\s*\d+)(\s*,\s*[-+]?\s*\d+)+$', val) \
+                        else 'floats'  if re.match(rf'({flt}(\s*,\s*{flt})+)', val) \
+                        else 'float'   if re.match(f'^({flt})$', val) \
+                        else 'string'  if val[0] == '"' \
+                        else 'char'    if val[0] == "'" \
+                        else 'state'   if re.match(r'^(LOW|HIGH)$', val) \
+                        else 'enum'    if re.match(r'^[A-Za-z0-9_]{3,}$', val) \
+                        else 'int[]'   if re.match(r'^{\s*[-+]?\s*\d+(\s*,\s*[-+]?\s*\d+)*\s*}$', val) \
+                        else 'float[]' if re.match(r'^{{\s*{flt}(\s*,\s*{flt})*\s*}}$', val) \
+                        else 'array'   if val[0] == '{' \
+                        else ''
+
+                        val = (val == 'true')           if value_type == 'bool' \
+                        else int(val)                   if value_type == 'int' \
+                        else val.replace('f','')        if value_type == 'floats' \
+                        else float(val.replace('f','')) if value_type == 'float' \
+                        else val
 
                         if val != '': define_info['value'] = val
                         if value_type != '': define_info['type'] = value_type
 
                         # Join up accumulated conditions with &&
-                        if conditions: define_info['requires'] = ' && '.join(sum(conditions, []))
+                        if conditions: define_info['requires'] = '(' + ') && ('.join(sum(conditions, [])) + ')'
 
                         # If the comment_buff is not empty, add the comment to the info
                         if comment_buff:
@@ -383,25 +430,35 @@ def main():
 
     if schema:
 
-        # Get the first command line argument
+        # Get the command line arguments after the script name
         import sys
-        if len(sys.argv) > 1:
-            arg = sys.argv[1]
-        else:
-            arg = 'some'
+        args = sys.argv[1:]
+        if len(args) == 0: args = ['some']
+
+        # Does the given array intersect at all with args?
+        def inargs(c): return len(set(args) & set(c)) > 0
+
+        # Help / Unknown option
+        unk = not inargs(['some','json','jsons','group','yml','yaml'])
+        if (unk): print(f"Unknown option: '{args[0]}'")
+        if inargs(['-h', '--help']) or unk:
+            print("Usage: schema.py [some|json|jsons|group|yml|yaml]...")
+            print("       some  = json + yml")
+            print("       jsons = json + group")
+            return
 
         # JSON schema
-        if arg in ['some', 'json', 'jsons']:
+        if inargs(['some', 'json', 'jsons']):
             print("Generating JSON ...")
             dump_json(schema, Path('schema.json'))
 
         # JSON schema (wildcard names)
-        if arg in ['group', 'jsons']:
+        if inargs(['group', 'jsons']):
             group_options(schema)
             dump_json(schema, Path('schema_grouped.json'))
 
         # YAML
-        if arg in ['some', 'yml', 'yaml']:
+        if inargs(['some', 'yml', 'yaml']):
             try:
                 import yaml
             except ImportError:

buildroot/share/PlatformIO/scripts/signature.py

@@ -1,3 +1,4 @@
+#!/usr/bin/env python3
 #
 # signature.py
 #
@@ -7,24 +8,54 @@ import subprocess,re,json,hashlib
 from datetime import datetime
 from pathlib import Path
 
-#
-# Return all macro names in a header as an array, so we can take
-# the intersection with the preprocessor output, giving a decent
-# reflection of all enabled options that (probably) came from the
-# configuration files. We end up with the actual configured state,
-# better than what the config files say. You can then use the
-# resulting config.ini to produce more exact configuration files.
-#
-def extract_defines(filepath):
+def enabled_defines(filepath):
+    '''
+    Return all enabled #define items from a given C header file in a dictionary.
+    A "#define" in a multi-line comment could produce a false positive if it's not
+    preceded by a non-space character (like * in a multi-line comment).
+
+    Output:
+    Each entry is a dictionary with a 'name' and a 'section' key. We end up with:
+        { MOTHERBOARD: { name: "MOTHERBOARD", section: "hardware" }, ... }
+
+    The 'name' key might get dropped as redundant, but it's useful for debugging.
+
+    Because the option names are the keys, only the last occurrence is retained.
+    Use the Schema class for a more complete list of options, soon with full parsing.
+
+    This list is used to filter what is actually a config-defined option versus
+    defines from elsewhere.
+
+    While the Schema class parses the configurations on its own, this script will
+    get the preprocessor output and get the intersection of the enabled options from
+    our crude scraping method and the actual compiler output.
+    We end up with the actual configured state,
+    better than what the config files say. You can then use the
+    a decent reflection of all enabled options that (probably) came from
+    resulting config.ini to produce more exact configuration files.
+    '''
+    outdict = {}
+    section = "user"
+    spatt = re.compile(r".*@section +([-a-zA-Z0-9_\s]+)$") # must match @section ...
+
     f = open(filepath, encoding="utf8").read().split("\n")
+
+    # Get the full contents of the file and remove all block comments.
+    # This will avoid false positives from #defines in comments
+    f = re.sub(r'/\*.*?\*/', '', '\n'.join(f), flags=re.DOTALL).split("\n")
+
     a = []
     for line in f:
         sline = line.strip()
+        m = re.match(spatt, sline) # @section ...
+        if m:
+            section = m.group(1).strip()
+            continue
         if sline[:7] == "#define":
             # Extract the key here (we don't care about the value)
             kv = sline[8:].strip().split()
-            a.append(kv[0])
-    return a
+            outdict[kv[0]] = { 'name':kv[0], 'section': section }
+    return outdict
 
 # Compute the SHA256 hash of a file
 def get_file_sha256sum(filepath):
@@ -43,160 +74,247 @@ def compress_file(filepath, storedname, outpath):
     with zipfile.ZipFile(outpath, 'w', compression=zipfile.ZIP_BZIP2, compresslevel=9) as zipf:
         zipf.write(filepath, arcname=storedname, compress_type=zipfile.ZIP_BZIP2, compresslevel=9)
 
-#
-# Compute the build signature. The idea is to extract all defines in the configuration headers
-# to build a unique reversible signature from this build so it can be included in the binary
-# We can reverse the signature to get a 1:1 equivalent configuration file
-#
 def compute_build_signature(env):
-    if 'BUILD_SIGNATURE' in env:
-        return
-
-    # Definitions from these files will be kept
-    files_to_keep = [ 'Marlin/Configuration.h', 'Marlin/Configuration_adv.h' ]
+    '''
+    Compute the build signature by extracting all configuration settings and
+    building a unique reversible signature that can be included in the binary.
+    The signature can be reversed to get a 1:1 equivalent configuration file.
+    '''
+    if 'BUILD_SIGNATURE' in env: return
+    env.Append(BUILD_SIGNATURE=1)
 
     build_path = Path(env['PROJECT_BUILD_DIR'], env['PIOENV'])
-
-    # Check if we can skip processing
-    hashes = ''
-    for header in files_to_keep:
-        hashes += get_file_sha256sum(header)[0:10]
-
     marlin_json = build_path / 'marlin_config.json'
     marlin_zip = build_path / 'mc.zip'
 
-    # Read existing config file
+    # Definitions from these files will be kept
+    header_paths = [ 'Marlin/Configuration.h', 'Marlin/Configuration_adv.h' ]
+
+    # Check if we can skip processing
+    hashes = ''
+    for header in header_paths:
+        hashes += get_file_sha256sum(header)[0:10]
+
+    # Read a previously exported JSON file
+    # Same configuration, skip recomputing the build signature
+    same_hash = False
     try:
         with marlin_json.open() as infile:
             conf = json.load(infile)
-            if conf['__INITIAL_HASH'] == hashes:
-                # Same configuration, skip recomputing the building signature
+            same_hash = conf['__INITIAL_HASH'] == hashes
+            if same_hash:
                 compress_file(marlin_json, 'marlin_config.json', marlin_zip)
-                return
     except:
         pass
 
-    # Get enabled config options based on preprocessor
-    from preprocessor import run_preprocessor
-    complete_cfg = run_preprocessor(env)
-
-    # Dumb #define extraction from the configuration files
+    # Extract "enabled" #define lines by scraping the configuration files.
+    # This data also contains the @section for each option.
     conf_defines = {}
-    all_defines = []
-    for header in files_to_keep:
-        defines = extract_defines(header)
-        # To filter only the define we want
-        all_defines += defines
-        # To remember from which file it cames from
-        conf_defines[header.split('/')[-1]] = defines
+    conf_names = []
+    for hpath in header_paths:
+        # Get defines in the form of { name: { name:..., section:... }, ... }
+        defines = enabled_defines(hpath)
+        # Get all unique define names into a flat array
+        conf_names += defines.keys()
+        # Remember which file these defines came from
+        conf_defines[hpath.split('/')[-1]] = defines
 
+    # Get enabled config options based on running GCC to preprocess the config files.
+    # The result is a list of line strings, each starting with '#define'.
+    from preprocessor import run_preprocessor
+    build_output = run_preprocessor(env)
+
+    # Dumb regex to filter out some dumb macros
     r = re.compile(r"\(+(\s*-*\s*_.*)\)+")
 
-    # First step is to collect all valid macros
-    defines = {}
-    for line in complete_cfg:
-
-        # Split the define from the value
+    # Extract all the #define lines in the build output as key/value pairs
+    build_defines = {}
+    for line in build_output:
+        # Split the define from the value.
         key_val = line[8:].strip().decode().split(' ')
         key, value = key_val[0], ' '.join(key_val[1:])
-
         # Ignore values starting with two underscore, since it's low level
-        if len(key) > 2 and key[0:2] == "__" :
-            continue
-        # Ignore values containing a parenthesis (likely a function macro)
-        if '(' in key and ')' in key:
-            continue
-
+        if len(key) > 2 and key[0:2] == "__": continue
+        # Ignore values containing parentheses (likely a function macro)
+        if '(' in key and ')' in key: continue
         # Then filter dumb values
-        if r.match(value):
-            continue
+        if r.match(value): continue
 
-        defines[key] = value if len(value) else ""
+        build_defines[key] = value if len(value) else ""
 
     #
     # Continue to gather data for CONFIGURATION_EMBEDDING or CONFIG_EXPORT
     #
-    if not ('CONFIGURATION_EMBEDDING' in defines or 'CONFIG_EXPORT' in defines):
+    if not ('CONFIGURATION_EMBEDDING' in build_defines or 'CONFIG_EXPORT' in build_defines):
         return
 
-    # Second step is to filter useless macro
-    resolved_defines = {}
-    for key in defines:
+    # Filter out useless macros from the output
+    cleaned_build_defines = {}
+    for key in build_defines:
         # Remove all boards now
-        if key.startswith("BOARD_") and key != "BOARD_INFO_NAME":
-            continue
-        # Remove all keys ending by "_NAME" as it does not make a difference to the configuration
-        if key.endswith("_NAME") and key != "CUSTOM_MACHINE_NAME":
-            continue
+        if key.startswith("BOARD_") and key != "BOARD_INFO_NAME": continue
         # Remove all keys ending by "_T_DECLARED" as it's a copy of extraneous system stuff
-        if key.endswith("_T_DECLARED"):
-            continue
+        if key.endswith("_T_DECLARED"): continue
         # Remove keys that are not in the #define list in the Configuration list
-        if key not in all_defines + [ 'DETAILED_BUILD_VERSION', 'STRING_DISTRIBUTION_DATE' ]:
-            continue
+        if key not in conf_names + [ 'DETAILED_BUILD_VERSION', 'STRING_DISTRIBUTION_DATE' ]: continue
+        # Add to a new dictionary for simplicity
+        cleaned_build_defines[key] = build_defines[key]
 
-        # Don't be that smart guy here
-        resolved_defines[key] = defines[key]
-
-    # Generate a build signature now
-    # We are making an object that's a bit more complex than a basic dictionary here
-    data = {}
-    data['__INITIAL_HASH'] = hashes
-    # First create a key for each header here
+    # And we only care about defines that (most likely) came from the config files
+    # Build a dictionary of dictionaries with keys: 'name', 'section', 'value'
+    # { 'file1': { 'option': { 'name':'option', 'section':..., 'value':... }, ... }, 'file2': { ... } }
+    real_config = {}
     for header in conf_defines:
-        data[header] = {}
-
-    # Then populate the object where each key is going to (that's a O(N^2) algorithm here...)
-    for key in resolved_defines:
-        for header in conf_defines:
+        real_config[header] = {}
+        for key in cleaned_build_defines:
             if key in conf_defines[header]:
-                data[header][key] = resolved_defines[key]
+                if key[0:2] == '__': continue
+                val = cleaned_build_defines[key]
+                real_config[header][key] = { 'file':header, 'name': key, 'value': val, 'section': conf_defines[header][key]['section']}
 
-    # Every python needs this toy
     def tryint(key):
-        try:
-            return int(defines[key])
-        except:
-            return 0
+        try: return int(build_defines[key])
+        except: return 0
 
+    # Get the CONFIG_EXPORT value and do an extended dump if > 100
+    # For example, CONFIG_EXPORT 102 will make a 'config.ini' with a [config:] group for each schema @section
     config_dump = tryint('CONFIG_EXPORT')
+    extended_dump = config_dump > 100
+    if extended_dump: config_dump -= 100
 
     #
     # Produce an INI file if CONFIG_EXPORT == 2
     #
     if config_dump == 2:
         print("Generating config.ini ...")
+
+        ini_fmt = '{0:40} = {1}'
+        ext_fmt = '{0:40}   {1}'
+        ignore = ('CONFIGURATION_H_VERSION', 'CONFIGURATION_ADV_H_VERSION', 'CONFIG_EXPORT')
+
+        if extended_dump:
+            # Extended export will dump config options by section
+
+            # We'll use Schema class to get the sections
+            try:
+                conf_schema = schema.extract()
+            except Exception as exc:
+                print("Error: " + str(exc))
+                exit(1)
+
+            # Then group options by schema @section
+            sections = {}
+            for header in real_config:
+                for name in real_config[header]:
+                    #print(f"  name: {name}")
+                    if name not in ignore:
+                        ddict = real_config[header][name]
+                        #print(f"   real_config[{header}][{name}]:", ddict)
+                        sect = ddict['section']
+                        if sect not in sections: sections[sect] = {}
+                        sections[sect][name] = ddict
+
+            # Get all sections as a list of strings, with spaces and dashes replaced by underscores
+            long_list = [ re.sub(r'[- ]+', '_', x).lower() for x in sections.keys() ]
+            # Make comma-separated lists of sections with 64 characters or less
+            sec_lines = []
+            while len(long_list):
+                line = long_list.pop(0) + ', '
+                while len(long_list) and len(line) + len(long_list[0]) < 64 - 1:
+                    line += long_list.pop(0) + ', '
+                sec_lines.append(line.strip())
+            sec_lines[-1] = sec_lines[-1][:-1] # Remove the last comma
+
+        else:
+            sec_lines = ['all']
+
+        # Build the ini_use_config item
+        sec_list = ini_fmt.format('ini_use_config', sec_lines[0])
+        for line in sec_lines[1:]: sec_list += '\n' + ext_fmt.format('', line)
+
         config_ini = build_path / 'config.ini'
         with config_ini.open('w') as outfile:
-            ignore = ('CONFIGURATION_H_VERSION', 'CONFIGURATION_ADV_H_VERSION', 'CONFIG_EXPORT')
             filegrp = { 'Configuration.h':'config:basic', 'Configuration_adv.h':'config:advanced' }
-            vers = defines["CONFIGURATION_H_VERSION"]
+            vers = build_defines["CONFIGURATION_H_VERSION"]
             dt_string = datetime.now().strftime("%Y-%m-%d at %H:%M:%S")
-            ini_fmt = '{0:40}{1}\n'
+
             outfile.write(
-                '#\n'
-                + '# Marlin Firmware\n'
-                + '# config.ini - Options to apply before the build\n'
-                + '#\n'
-                + f'# Generated by Marlin build on {dt_string}\n'
-                + '#\n'
-                + '\n'
-                + '[config:base]\n'
-                + ini_fmt.format('ini_use_config', ' = all')
-                + ini_fmt.format('ini_config_vers', f' = {vers}')
-            )
-            # Loop through the data array of arrays
-            for header in data:
-                if header.startswith('__'):
-                    continue
-                outfile.write('\n[' + filegrp[header] + ']\n')
-                for key in sorted(data[header]):
-                    if key not in ignore:
-                        val = 'on' if data[header][key] == '' else data[header][key]
-                        outfile.write(ini_fmt.format(key.lower(), ' = ' + val))
+f'''#
+# Marlin Firmware
+# config.ini - Options to apply before the build
+#
+# Generated by Marlin build on {dt_string}
+#
+[config:base]
+#
+# ini_use_config - A comma-separated list of actions to apply to the Configuration files.
+#                  The actions will be applied in the listed order.
+#  - none
+#    Ignore this file and don't apply any configuration options
+#
+#  - base
+#    Just apply the options in config:base to the configuration
+#
+#  - minimal
+#    Just apply the options in config:minimal to the configuration
+#
+#  - all
+#    Apply all 'config:*' sections in this file to the configuration
+#
+#  - another.ini
+#    Load another INI file with a path relative to this config.ini file (i.e., within Marlin/)
+#
+#  - https://me.myserver.com/path/to/configs
+#    Fetch configurations from any URL.
+#
+#  - example/Creality/Ender-5 Plus @ bugfix-2.1.x
+#    Fetch example configuration files from the MarlinFirmware/Configurations repository
+#    https://raw.githubusercontent.com/MarlinFirmware/Configurations/bugfix-2.1.x/config/examples/Creality/Ender-5%20Plus/
+#
+#  - example/default @ release-2.0.9.7
+#    Fetch default configuration files from the MarlinFirmware/Configurations repository
+#    https://raw.githubusercontent.com/MarlinFirmware/Configurations/release-2.0.9.7/config/default/
+#
+#  - [disable]
+#    Comment out all #defines in both Configuration.h and Configuration_adv.h. This is useful
+#    to start with a clean slate before applying any config: options, so only the options explicitly
+#    set in config.ini will be enabled in the configuration.
+#
+#  - [flatten] (Not yet implemented)
+#    Produce a flattened set of Configuration.h and Configuration_adv.h files with only the enabled
+#    #defines and no comments. A clean look, but context-free.
+#
+{sec_list}
+{ini_fmt.format('ini_config_vers', vers)}
+'''         )
+
+            if extended_dump:
+
+                # Loop through the sections
+                for skey in sorted(sections):
+                    #print(f"  skey: {skey}")
+                    sani = re.sub(r'[- ]+', '_', skey).lower()
+                    outfile.write(f"\n[config:{sani}]\n")
+                    opts = sections[skey]
+                    for name in sorted(opts):
+                        val = opts[name]['value']
+                        if val == '': val = 'on'
+                        #print(f"  {name} = {val}")
+                        outfile.write(ini_fmt.format(name.lower(), val) + '\n')
+
+            else:
+
+                # Standard export just dumps config:basic and config:advanced sections
+                for header in real_config:
+                    outfile.write(f'\n[{filegrp[header]}]\n')
+                    for name in sorted(real_config[header]):
+                        if name not in ignore:
+                            val = real_config[header][name]['value']
+                            if val == '': val = 'on'
+                            outfile.write(ini_fmt.format(name.lower(), val) + '\n')
 
     #
-    # Produce a schema.json file if CONFIG_EXPORT == 3
+    # CONFIG_EXPORT 3 = schema.json, 4 = schema.yml
     #
     if config_dump >= 3:
         try:
@@ -207,7 +325,7 @@ def compute_build_signature(env):
 
         if conf_schema:
             #
-            # Produce a schema.json file if CONFIG_EXPORT == 3
+            # 3 = schema.json
             #
             if config_dump in (3, 13):
                 print("Generating schema.json ...")
@@ -217,7 +335,7 @@ def compute_build_signature(env):
                     schema.dump_json(conf_schema, build_path / 'schema_grouped.json')
 
             #
-            # Produce a schema.yml file if CONFIG_EXPORT == 4
+            # 4 = schema.yml
             #
             elif config_dump == 4:
                 print("Generating schema.yml ...")
@@ -231,33 +349,58 @@ def compute_build_signature(env):
                     import yaml
                 schema.dump_yaml(conf_schema, build_path / 'schema.yml')
 
-    # Append the source code version and date
-    data['VERSION'] = {}
-    data['VERSION']['DETAILED_BUILD_VERSION'] = resolved_defines['DETAILED_BUILD_VERSION']
-    data['VERSION']['STRING_DISTRIBUTION_DATE'] = resolved_defines['STRING_DISTRIBUTION_DATE']
-    try:
-        curver = subprocess.check_output(["git", "describe", "--match=NeVeRmAtCh", "--always"]).strip()
-        data['VERSION']['GIT_REF'] = curver.decode()
-    except:
-        pass
-
     #
     # Produce a JSON file for CONFIGURATION_EMBEDDING or CONFIG_EXPORT == 1
+    # Skip if an identical JSON file was already present.
     #
-    if config_dump == 1 or 'CONFIGURATION_EMBEDDING' in defines:
+    if not same_hash and (config_dump == 1 or 'CONFIGURATION_EMBEDDING' in build_defines):
         with marlin_json.open('w') as outfile:
-            json.dump(data, outfile, separators=(',', ':'))
+
+            json_data = {}
+            if extended_dump:
+                print("Extended dump ...")
+                for header in real_config:
+                    confs = real_config[header]
+                    json_data[header] = {}
+                    for name in confs:
+                        c = confs[name]
+                        s = c['section']
+                        if s not in json_data[header]: json_data[header][s] = {}
+                        json_data[header][s][name] = c['value']
+            else:
+                for header in real_config:
+                    conf = real_config[header]
+                    #print(f"real_config[{header}]", conf)
+                    for name in conf:
+                        json_data[name] = conf[name]['value']
+
+            json_data['__INITIAL_HASH'] = hashes
+
+            # Append the source code version and date
+            json_data['VERSION'] = {
+                'DETAILED_BUILD_VERSION': cleaned_build_defines['DETAILED_BUILD_VERSION'],
+                'STRING_DISTRIBUTION_DATE': cleaned_build_defines['STRING_DISTRIBUTION_DATE']
+            }
+            try:
+                curver = subprocess.check_output(["git", "describe", "--match=NeVeRmAtCh", "--always"]).strip()
+                json_data['VERSION']['GIT_REF'] = curver.decode()
+            except:
+                pass
+
+            json.dump(json_data, outfile, separators=(',', ':'))
 
     #
     # The rest only applies to CONFIGURATION_EMBEDDING
     #
-    if not 'CONFIGURATION_EMBEDDING' in defines:
+    if not 'CONFIGURATION_EMBEDDING' in build_defines:
+        (build_path / 'mc.zip').unlink(missing_ok=True)
         return
 
     # Compress the JSON file as much as we can
-    compress_file(marlin_json, 'marlin_config.json', marlin_zip)
+    if not same_hash:
+        compress_file(marlin_json, 'marlin_config.json', marlin_zip)
 
-    # Generate a C source file for storing this array
+    # Generate a C source file containing the entire ZIP file as an array
     with open('Marlin/src/mczip.h','wb') as result_file:
         result_file.write(
               b'#ifndef NO_CONFIGURATION_EMBEDDING_WARNING\n'
@@ -269,8 +412,11 @@ def compute_build_signature(env):
         for b in (build_path / 'mc.zip').open('rb').read():
             result_file.write(b' 0x%02X,' % b)
             count += 1
-            if count % 16 == 0:
-                result_file.write(b'\n ')
-        if count % 16:
-            result_file.write(b'\n')
+            if count % 16 == 0: result_file.write(b'\n ')
+        if count % 16: result_file.write(b'\n')
         result_file.write(b'};\n')
+
+if __name__ == "__main__":
+    # Build required. From command line just explain usage.
+    print("Use schema.py to export JSON and YAML from the command-line.")
+    print("Build Marlin with CONFIG_EXPORT 2 to export 'config.ini'.")

buildroot/share/PlatformIO/variants/MARLIN_BIGTREE_OCTOPUS_PRO_V1_F429/variant.h

@@ -27,118 +27,118 @@ extern "C" {
  *        Pins
  *----------------------------------------------------------------------------*/
 
-#define PA0   0  //D0
-#define PA1   1  //D1
-#define PA2   2  //D2
-#define PA3   3  //D3
-#define PA4   4  //D4
-#define PA5   5  //D5
-#define PA6   6  //D6
-#define PA7   7  //D7
-#define PA8   8  //D8
-#define PA9   9  //D9
-#define PA10  10 //D10
-#define PA11  11 //D11
-#define PA12  12 //D12
-#define PA13  13 //D13
-#define PA14  14 //D14
-#define PA15  15 //D15
-#define PB0   16 //D16
-#define PB1   17 //D17
-#define PB2   18 //D18
-#define PB3   19 //D19
-#define PB4   20 //D20
-#define PB5   21 //D21
-#define PB6   22 //D22
-#define PB7   23 //D23
-#define PB8   24 //D24
-#define PB9   25 //D25
-#define PB10  26 //D26
-#define PB11  27 //D27
-#define PB12  28 //D28
-#define PB13  29 //D29
-#define PB14  30 //D30
-#define PB15  31 //D31
-#define PC0   32 //D32
-#define PC1   33 //D33
-#define PC2   34 //D34
-#define PC3   35 //D35
-#define PC4   36 //D36
-#define PC5   37 //D37
-#define PC6   38 //D38
-#define PC7   39 //D39
-#define PC8   40 //D40
-#define PC9   41 //D41
-#define PC10  42 //D42
-#define PC11  43 //D43
-#define PC12  44 //D44
-#define PC13  45 //D45
-#define PC14  46 //D46
-#define PC15  47 //D47
-#define PD0   48 //D48
-#define PD1   49 //D49
-#define PD2   50 //D50
-#define PD3   51 //D51
-#define PD4   52 //D52
-#define PD5   53 //D53
-#define PD6   54 //D54
-#define PD7   55 //D55
-#define PD8   56 //D56
-#define PD9   57 //D57
-#define PD10  58 //D58
-#define PD11  59 //D59
-#define PD12  60 //D60
-#define PD13  61 //D61
-#define PD14  62 //D62
-#define PD15  63 //D63
-#define PE0   64 //D64
-#define PE1   65 //D65
-#define PE2   66 //D66
-#define PE3   67 //D67
-#define PE4   68 //D68
-#define PE5   69 //D69
-#define PE6   70 //D70
-#define PE7   71 //D71
-#define PE8   72 //D72
-#define PE9   73 //D73
-#define PE10  74 //D74
-#define PE11  75 //D75
-#define PE12  76 //D76
-#define PE13  77 //D77
-#define PE14  78 //D78
-#define PE15  79 //D79
-#define PF0   80 //D64
-#define PF1   81 //D65
-#define PF2   82 //D66
-#define PF3   83 //D67
-#define PF4   84 //D68
-#define PF5   85 //D69
-#define PF6   86 //D70
-#define PF7   87 //D71
-#define PF8   88 //D72
-#define PF9   89 //D73
-#define PF10  90 //D74
-#define PF11  91 //D75
-#define PF12  92 //D76
-#define PF13  93 //D77
-#define PF14  94 //D78
-#define PF15  95 //D79
-#define PG0   96 //D64
-#define PG1   97 //D65
-#define PG2   98 //D66
-#define PG3   99 //D67
-#define PG4   100 //D68
-#define PG5   101 //D69
-#define PG6   102 //D70
-#define PG7   103 //D71
-#define PG8   104 //D72
-#define PG9   105 //D73
-#define PG10  106 //D74
-#define PG11  107 //D75
-#define PG12  108 //D76
-#define PG13  109 //D77
-#define PG14  110 //D78
-#define PG15  111 //D79
+#define PA0    0
+#define PA1    1
+#define PA2    2
+#define PA3    3
+#define PA4    4
+#define PA5    5
+#define PA6    6
+#define PA7    7
+#define PA8    8
+#define PA9    9
+#define PA10  10
+#define PA11  11
+#define PA12  12
+#define PA13  13
+#define PA14  14
+#define PA15  15
+#define PB0   16
+#define PB1   17
+#define PB2   18
+#define PB3   19
+#define PB4   20
+#define PB5   21
+#define PB6   22
+#define PB7   23
+#define PB8   24
+#define PB9   25
+#define PB10  26
+#define PB11  27
+#define PB12  28
+#define PB13  29
+#define PB14  30
+#define PB15  31
+#define PC0   32
+#define PC1   33
+#define PC2   34
+#define PC3   35
+#define PC4   36
+#define PC5   37
+#define PC6   38
+#define PC7   39
+#define PC8   40
+#define PC9   41
+#define PC10  42
+#define PC11  43
+#define PC12  44
+#define PC13  45
+#define PC14  46
+#define PC15  47
+#define PD0   48
+#define PD1   49
+#define PD2   50
+#define PD3   51
+#define PD4   52
+#define PD5   53
+#define PD6   54
+#define PD7   55
+#define PD8   56
+#define PD9   57
+#define PD10  58
+#define PD11  59
+#define PD12  60
+#define PD13  61
+#define PD14  62
+#define PD15  63
+#define PE0   64
+#define PE1   65
+#define PE2   66
+#define PE3   67
+#define PE4   68
+#define PE5   69
+#define PE6   70
+#define PE7   71
+#define PE8   72
+#define PE9   73
+#define PE10  74
+#define PE11  75
+#define PE12  76
+#define PE13  77
+#define PE14  78
+#define PE15  79
+#define PF0   80
+#define PF1   81
+#define PF2   82
+#define PF3   83
+#define PF4   84
+#define PF5   85
+#define PF6   86
+#define PF7   87
+#define PF8   88
+#define PF9   89
+#define PF10  90
+#define PF11  91
+#define PF12  92
+#define PF13  93
+#define PF14  94
+#define PF15  95
+#define PG0   96
+#define PG1   97
+#define PG2   98
+#define PG3   99
+#define PG4  100
+#define PG5  101
+#define PG6  102
+#define PG7  103
+#define PG8  104
+#define PG9  105
+#define PG10 106
+#define PG11 107
+#define PG12 108
+#define PG13 109
+#define PG14 110
+#define PG15 111
 
 // This must be a literal with the same value as PEND
 #define NUM_DIGITAL_PINS        112

buildroot/share/PlatformIO/variants/MARLIN_BIGTREE_OCTOPUS_V1/variant.h

@@ -27,118 +27,118 @@ extern "C" {
  *        Pins
  *----------------------------------------------------------------------------*/
 
-#define PA0   0  //D0
-#define PA1   1  //D1
-#define PA2   2  //D2
-#define PA3   3  //D3
-#define PA4   4  //D4
-#define PA5   5  //D5
-#define PA6   6  //D6
-#define PA7   7  //D7
-#define PA8   8  //D8
-#define PA9   9  //D9
-#define PA10  10 //D10
-#define PA11  11 //D11
-#define PA12  12 //D12
-#define PA13  13 //D13
-#define PA14  14 //D14
-#define PA15  15 //D15
-#define PB0   16 //D16
-#define PB1   17 //D17
-#define PB2   18 //D18
-#define PB3   19 //D19
-#define PB4   20 //D20
-#define PB5   21 //D21
-#define PB6   22 //D22
-#define PB7   23 //D23
-#define PB8   24 //D24
-#define PB9   25 //D25
-#define PB10  26 //D26
-#define PB11  27 //D27
-#define PB12  28 //D28
-#define PB13  29 //D29
-#define PB14  30 //D30
-#define PB15  31 //D31
-#define PC0   32 //D32
-#define PC1   33 //D33
-#define PC2   34 //D34
-#define PC3   35 //D35
-#define PC4   36 //D36
-#define PC5   37 //D37
-#define PC6   38 //D38
-#define PC7   39 //D39
-#define PC8   40 //D40
-#define PC9   41 //D41
-#define PC10  42 //D42
-#define PC11  43 //D43
-#define PC12  44 //D44
-#define PC13  45 //D45
-#define PC14  46 //D46
-#define PC15  47 //D47
-#define PD0   48 //D48
-#define PD1   49 //D49
-#define PD2   50 //D50
-#define PD3   51 //D51
-#define PD4   52 //D52
-#define PD5   53 //D53
-#define PD6   54 //D54
-#define PD7   55 //D55
-#define PD8   56 //D56
-#define PD9   57 //D57
-#define PD10  58 //D58
-#define PD11  59 //D59
-#define PD12  60 //D60
-#define PD13  61 //D61
-#define PD14  62 //D62
-#define PD15  63 //D63
-#define PE0   64 //D64
-#define PE1   65 //D65
-#define PE2   66 //D66
-#define PE3   67 //D67
-#define PE4   68 //D68
-#define PE5   69 //D69
-#define PE6   70 //D70
-#define PE7   71 //D71
-#define PE8   72 //D72
-#define PE9   73 //D73
-#define PE10  74 //D74
-#define PE11  75 //D75
-#define PE12  76 //D76
-#define PE13  77 //D77
-#define PE14  78 //D78
-#define PE15  79 //D79
-#define PF0   80 //D64
-#define PF1   81 //D65
-#define PF2   82 //D66
-#define PF3   83 //D67
-#define PF4   84 //D68
-#define PF5   85 //D69
-#define PF6   86 //D70
-#define PF7   87 //D71
-#define PF8   88 //D72
-#define PF9   89 //D73
-#define PF10  90 //D74
-#define PF11  91 //D75
-#define PF12  92 //D76
-#define PF13  93 //D77
-#define PF14  94 //D78
-#define PF15  95 //D79
-#define PG0   96 //D64
-#define PG1   97 //D65
-#define PG2   98 //D66
-#define PG3   99 //D67
-#define PG4   100 //D68
-#define PG5   101 //D69
-#define PG6   102 //D70
-#define PG7   103 //D71
-#define PG8   104 //D72
-#define PG9   105 //D73
-#define PG10  106 //D74
-#define PG11  107 //D75
-#define PG12  108 //D76
-#define PG13  109 //D77
-#define PG14  110 //D78
-#define PG15  111 //D79
+#define PA0    0
+#define PA1    1
+#define PA2    2
+#define PA3    3
+#define PA4    4
+#define PA5    5
+#define PA6    6
+#define PA7    7
+#define PA8    8
+#define PA9    9
+#define PA10  10
+#define PA11  11
+#define PA12  12
+#define PA13  13
+#define PA14  14
+#define PA15  15
+#define PB0   16
+#define PB1   17
+#define PB2   18
+#define PB3   19
+#define PB4   20
+#define PB5   21
+#define PB6   22
+#define PB7   23
+#define PB8   24
+#define PB9   25
+#define PB10  26
+#define PB11  27
+#define PB12  28
+#define PB13  29
+#define PB14  30
+#define PB15  31
+#define PC0   32
+#define PC1   33
+#define PC2   34
+#define PC3   35
+#define PC4   36
+#define PC5   37
+#define PC6   38
+#define PC7   39
+#define PC8   40
+#define PC9   41
+#define PC10  42
+#define PC11  43
+#define PC12  44
+#define PC13  45
+#define PC14  46
+#define PC15  47
+#define PD0   48
+#define PD1   49
+#define PD2   50
+#define PD3   51
+#define PD4   52
+#define PD5   53
+#define PD6   54
+#define PD7   55
+#define PD8   56
+#define PD9   57
+#define PD10  58
+#define PD11  59
+#define PD12  60
+#define PD13  61
+#define PD14  62
+#define PD15  63
+#define PE0   64
+#define PE1   65
+#define PE2   66
+#define PE3   67
+#define PE4   68
+#define PE5   69
+#define PE6   70
+#define PE7   71
+#define PE8   72
+#define PE9   73
+#define PE10  74
+#define PE11  75
+#define PE12  76
+#define PE13  77
+#define PE14  78
+#define PE15  79
+#define PF0   80
+#define PF1   81
+#define PF2   82
+#define PF3   83
+#define PF4   84
+#define PF5   85
+#define PF6   86
+#define PF7   87
+#define PF8   88
+#define PF9   89
+#define PF10  90
+#define PF11  91
+#define PF12  92
+#define PF13  93
+#define PF14  94
+#define PF15  95
+#define PG0   96
+#define PG1   97
+#define PG2   98
+#define PG3   99
+#define PG4  100
+#define PG5  101
+#define PG6  102
+#define PG7  103
+#define PG8  104
+#define PG9  105
+#define PG10 106
+#define PG11 107
+#define PG12 108
+#define PG13 109
+#define PG14 110
+#define PG15 111
 
 // This must be a literal with the same value as PEND
 #define NUM_DIGITAL_PINS        112

buildroot/share/PlatformIO/variants/MARLIN_CREALITY_STM32F401RC/variant.h

@@ -23,9 +23,8 @@
 extern "C" {
 #endif // __cplusplus
 
-
-//                  | DIGITAL | ANALOG | USART     | TWI      | SPI                    | SPECIAL   |
-//                  |---------|--------|-----------|----------|------------------------|-----------|
+                 // | DIGITAL | ANALOG | USART     | TWI      | SPI                    | SPECIAL   |
+                 // |---------|--------|-----------|----------|------------------------|-----------|
 #define PA0  0   // | 0       | A0     |           |          |                        |           |
 #define PA1  1   // | 1       | A1     |           |          |                        |           |
 #define PA2  2   // | 2       | A2     | USART2_TX |          |                        |           |
@@ -42,7 +41,7 @@ extern "C" {
 #define PA13 13  // | 13      |        |           |          |                        | SWD_SWDIO |
 #define PA14 14  // | 14      |        |           |          |                        | SWD_SWCLK |
 #define PA15 15  // | 15      |        |           |          | SPI3_SS, (SPI1_SS)     |           |
-//                  |---------|--------|-----------|----------|------------------------|-----------|
+                 // |---------|--------|-----------|----------|------------------------|-----------|
 #define PB0  16  // | 16      | A8     |           |          |                        |           |
 #define PB1  17  // | 17      | A9     |           |          |                        |           |
 #define PB2  18  // | 18      |        |           |          |                        | BOOT1     |
@@ -58,7 +57,7 @@ extern "C" {
 #define PB13 28  // | 28      |        |           |          | SPI2_SCK               |           |
 #define PB14 29  // | 29      |        |           |          | SPI2_MISO              |           |
 #define PB15 30  // | 30      |        |           |          | SPI2_MOSI              |           |
-//                  |---------|--------|-----------|----------|------------------------|-----------|
+                 // |---------|--------|-----------|----------|------------------------|-----------|
 #define PC0  31  // | 31      | A10    |           |          |                        |           |
 #define PC1  32  // | 32      | A11    |           |          |                        |           |
 #define PC2  33  // | 33      | A12    |           |          | SPI2_MISO              |           |
@@ -75,12 +74,12 @@ extern "C" {
 #define PC13 44  // | 44      |        |           |          |                        |           |
 #define PC14 45  // | 45      |        |           |          |                        | OSC32_IN  |
 #define PC15 46  // | 46      |        |           |          |                        | OSC32_OUT |
-//                  |---------|--------|-----------|----------|------------------------|-----------|
+                 // |---------|--------|-----------|----------|------------------------|-----------|
 #define PD2  47  // | 47      |        |           |          |                        |           |
-//                  |---------|--------|-----------|----------|------------------------|-----------|
+                 // |---------|--------|-----------|----------|------------------------|-----------|
 #define PH0  48  // | 48      |        |           |          |                        | OSC_IN    |
 #define PH1  49  // | 49      |        |           |          |                        | OSC_OUT   |
-//                  |---------|--------|-----------|----------|------------------------|-----------|
+                 // |---------|--------|-----------|----------|------------------------|-----------|
 
 // This must be a literal
 #define NUM_DIGITAL_PINS        50

buildroot/share/PlatformIO/variants/MARLIN_CREALITY_STM32F401RE/PeripheralPins.c

@@ -0,0 +1,252 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2019, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ * Automatically generated from STM32F401R[(B-C)|(D-E)]Tx.xml
+ */
+#include "Arduino.h"
+#include "PeripheralPins.h"
+
+/* =====
+ * Note: Commented lines are alternative possibilities which are not used per default.
+ *       If you change them, you will have to know what you do
+ * =====
+ */
+
+//*** ADC ***
+
+#ifdef HAL_ADC_MODULE_ENABLED
+WEAK const PinMap PinMap_ADC[] = {
+  {PA_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
+  {PA_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
+  {PA_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
+  {PA_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
+  {PA_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
+  {PA_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
+  {PA_6,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
+  {PA_7,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
+  {PB_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
+  {PB_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
+  {PC_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
+  {PC_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
+  {PC_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
+  {PC_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
+  {PC_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
+  {PC_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
+  {NC,    NP,    0}
+};
+#endif
+
+//*** No DAC ***
+
+//*** I2C ***
+
+#ifdef HAL_I2C_MODULE_ENABLED
+WEAK const PinMap PinMap_I2C_SDA[] = {
+  {PB_3,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C2)},
+  {PB_4,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C3)},
+  {PB_7,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_9,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PC_9,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+  {NC,    NP,    0}
+};
+
+WEAK const PinMap PinMap_I2C_SCL[] = {
+  {PA_8,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+  {PB_6,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_8,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+  {NC,    NP,    0}
+};
+#endif
+
+//*** PWM ***
+
+#ifdef HAL_TIM_MODULE_ENABLED
+WEAK const PinMap PinMap_PWM[] = {
+  //{PA_0,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+  {PA_0,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
+  //{PA_1,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
+  {PA_1,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
+  //{PA_2,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
+  {PA_2,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
+  //{PA_2,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
+  //{PA_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
+  {PA_3,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
+  //{PA_3,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
+  {PA_5,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+  {PA_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+  //{PA_7,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+  {PA_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+  {PA_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
+  {PA_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
+  {PA_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
+  {PA_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
+  {PA_15, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+  //{PB_0,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+  {PB_0,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
+  //{PB_1,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+  {PB_1,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
+  {PB_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
+  {PB_4,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+  {PB_5,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+  {PB_6,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
+  {PB_7,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
+  {PB_8,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
+  //{PB_8,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
+  {PB_9,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
+  //{PB_9,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
+  {PB_10, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
+  {PB_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+  {PB_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+  {PB_15, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+  {PC_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+  {PC_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+  {PC_8,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
+  {PC_9,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
+  {NC,    NP,    0}
+};
+#endif
+
+//*** SERIAL ***
+
+#ifdef HAL_UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_TX[] = {
+  {PA_2,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PA_9,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PA_11, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  {PB_6,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PC_6,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  {NC,    NP,    0}
+};
+
+WEAK const PinMap PinMap_UART_RX[] = {
+  {PA_3,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PA_10, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PA_12, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  {PB_7,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PC_7,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  {NC,    NP,    0}
+};
+
+WEAK const PinMap PinMap_UART_RTS[] = {
+  {PA_1,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PA_12, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {NC,    NP,    0}
+};
+
+WEAK const PinMap PinMap_UART_CTS[] = {
+  {PA_0,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PA_11, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {NC,    NP,    0}
+};
+#endif
+
+//*** SPI ***
+
+#ifdef HAL_SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_MOSI[] = {
+  {PA_7,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  //{PB_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PB_5,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_3,  SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {NC,    NP,    0}
+};
+
+WEAK const PinMap PinMap_SPI_MISO[] = {
+  {PA_6,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  //{PB_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PB_4,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_2,  SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {NC,    NP,    0}
+};
+
+WEAK const PinMap PinMap_SPI_SCLK[] = {
+  {PA_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  //{PB_3,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PB_3,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {NC,    NP,    0}
+};
+
+WEAK const PinMap PinMap_SPI_SSEL[] = {
+  {PA_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  //{PA_4,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  //{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {PB_9,  SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {NC,    NP,    0}
+};
+#endif
+
+//*** No CAN ***
+
+//*** No ETHERNET ***
+
+//*** No QUADSPI ***
+
+//*** USB ***
+
+#ifdef HAL_PCD_MODULE_ENABLED
+WEAK const PinMap PinMap_USB_OTG_FS[] = {
+#ifndef ARDUINO_CoreBoard_F401RC
+  {PA_8,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
+  {PA_9,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS
+  {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID
+#endif
+  {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM
+  {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP
+  {NC,    NP,    0}
+};
+#endif
+
+//*** No USB_OTG_HS ***
+
+//*** SD ***
+
+#ifdef HAL_SD_MODULE_ENABLED
+WEAK const PinMap PinMap_SD[] = {
+  {PB_8,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D4
+  {PB_9,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D5
+  {PC_6,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D6
+  {PC_7,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D7
+  {PC_8,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D0
+  {PC_9,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D1
+  {PC_10, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D2
+  {PC_11, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D3
+  {PC_12, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CK
+  {PD_2,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CMD
+  {NC,    NP,    0}
+};
+#endif

buildroot/share/PlatformIO/variants/MARLIN_CREALITY_STM32F401RE/PinNamesVar.h

@@ -0,0 +1,33 @@
+/* SYS_WKUP */
+#ifdef PWR_WAKEUP_PIN1
+  SYS_WKUP1 = PA_0,
+#endif
+#ifdef PWR_WAKEUP_PIN2
+  SYS_WKUP2 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN3
+  SYS_WKUP3 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN4
+  SYS_WKUP4 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN5
+  SYS_WKUP5 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN6
+  SYS_WKUP6 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN7
+  SYS_WKUP7 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN8
+  SYS_WKUP8 = NC,
+#endif
+/* USB */
+#ifdef USBCON
+  USB_OTG_FS_SOF = PA_8,
+  USB_OTG_FS_VBUS = PA_9,
+  USB_OTG_FS_ID = PA_10,
+  USB_OTG_FS_DM = PA_11,
+  USB_OTG_FS_DP = PA_12,
+#endif

buildroot/share/PlatformIO/variants/MARLIN_CREALITY_STM32F401RE/hal_conf_custom.h

@@ -0,0 +1,495 @@
+/**
+  ******************************************************************************
+  * @file    stm32f4xx_hal_conf.h
+  * @brief   HAL configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F4xx_HAL_CONF_CUSTOM
+#define __STM32F4xx_HAL_CONF_CUSTOM
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+ /**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+#define HAL_MODULE_ENABLED
+#define HAL_ADC_MODULE_ENABLED
+#define HAL_CRC_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+#define HAL_IWDG_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_RTC_MODULE_ENABLED
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_TIM_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+//#define HAL_PCD_MODULE_ENABLED // Automatically added if any type of USB is enabled, as in Arduino IDE. (STM32 v3.10700.191028)
+
+//#define HAL_CAN_MODULE_ENABLED
+//#define HAL_CAN_LEGACY_MODULE_ENABLED
+//#define HAL_CEC_MODULE_ENABLED
+//#define HAL_CRYP_MODULE_ENABLED
+//#define HAL_DAC_MODULE_ENABLED
+//#define HAL_DCMI_MODULE_ENABLED
+//#define HAL_DMA2D_MODULE_ENABLED
+//#define HAL_ETH_MODULE_ENABLED
+//#define HAL_NAND_MODULE_ENABLED
+//#define HAL_NOR_MODULE_ENABLED
+//#define HAL_PCCARD_MODULE_ENABLED
+//#define HAL_SRAM_MODULE_ENABLED
+//#define HAL_SDRAM_MODULE_ENABLED
+//#define HAL_HASH_MODULE_ENABLED
+//#define HAL_EXTI_MODULE_ENABLED
+//#define HAL_SMBUS_MODULE_ENABLED
+//#define HAL_I2S_MODULE_ENABLED
+//#define HAL_LTDC_MODULE_ENABLED
+//#define HAL_DSI_MODULE_ENABLED
+//#define HAL_QSPI_MODULE_ENABLED
+//#define HAL_RNG_MODULE_ENABLED
+//#define HAL_SAI_MODULE_ENABLED
+#define HAL_SD_MODULE_ENABLED
+//#define HAL_UART_MODULE_ENABLED
+//#define HAL_USART_MODULE_ENABLED
+//#define HAL_IRDA_MODULE_ENABLED
+//#define HAL_SMARTCARD_MODULE_ENABLED
+//#define HAL_WWDG_MODULE_ENABLED
+//#define HAL_HCD_MODULE_ENABLED
+//#define HAL_FMPI2C_MODULE_ENABLED
+//#define HAL_SPDIFRX_MODULE_ENABLED
+//#define HAL_DFSDM_MODULE_ENABLED
+//#define HAL_LPTIM_MODULE_ENABLED
+//#define HAL_MMC_MODULE_ENABLED
+
+/* ########################## HSE/HSI Values adaptation ##################### */
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#ifndef HSE_VALUE
+#define HSE_VALUE              8000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#ifndef HSE_STARTUP_TIMEOUT
+#define HSE_STARTUP_TIMEOUT    100U      /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#ifndef HSI_VALUE
+#define HSI_VALUE              16000000U /*!< Value of the Internal oscillator in Hz */
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#ifndef LSI_VALUE
+#define LSI_VALUE               32000U    /*!< LSI Typical Value in Hz */
+#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations
+in voltage and temperature. */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  */
+#ifndef LSE_VALUE
+#define LSE_VALUE               32768U    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#ifndef LSE_STARTUP_TIMEOUT
+#define LSE_STARTUP_TIMEOUT    5000U     /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S peripheral
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#ifndef EXTERNAL_CLOCK_VALUE
+#define EXTERNAL_CLOCK_VALUE     12288000U /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+#if !defined (VDD_VALUE)
+#define  VDD_VALUE                    3300U /*!< Value of VDD in mv */
+#endif
+#if !defined (TICK_INT_PRIORITY)
+#define  TICK_INT_PRIORITY            0x00U /*!< tick interrupt priority */
+#endif
+#if !defined (USE_RTOS)
+#define  USE_RTOS                     0U
+#endif
+#if !defined (PREFETCH_ENABLE)
+#define  PREFETCH_ENABLE              1U
+#endif
+#if !defined (INSTRUCTION_CACHE_ENABLE)
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#endif
+#if !defined (DATA_CACHE_ENABLE)
+#define  DATA_CACHE_ENABLE            1U
+#endif
+
+#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
+#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
+#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
+#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
+#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
+#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
+#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
+#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
+#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
+#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
+#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
+#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
+#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
+#define  USE_HAL_FMPI2C_REGISTER_CALLBACKS      0U /* FMPI2C register callback disabled    */
+#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
+#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
+#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
+#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
+#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
+#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
+#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
+#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
+#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
+#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
+#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
+#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
+#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
+#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
+#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
+#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
+#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
+#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
+#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
+#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## Ethernet peripheral configuration ##################### */
+
+/* Section 1 : Ethernet peripheral configuration */
+
+/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
+#define MAC_ADDR0   2U
+#define MAC_ADDR1   0U
+#define MAC_ADDR2   0U
+#define MAC_ADDR3   0U
+#define MAC_ADDR4   0U
+#define MAC_ADDR5   0U
+
+/* Definition of the Ethernet driver buffers size and count */
+#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
+#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
+#define ETH_RXBUFNB                    ((uint32_t)4U)       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
+#define ETH_TXBUFNB                    ((uint32_t)4U)       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
+
+/* Section 2: PHY configuration section */
+
+/* DP83848_PHY_ADDRESS Address*/
+#define DP83848_PHY_ADDRESS           0x01U
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
+#define PHY_RESET_DELAY                 0x000000FFU
+/* PHY Configuration delay */
+#define PHY_CONFIG_DELAY                0x00000FFFU
+
+#define PHY_READ_TO                     0x0000FFFFU
+#define PHY_WRITE_TO                    0x0000FFFFU
+
+/* Section 3: Common PHY Registers */
+
+#define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
+#define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
+
+#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
+#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
+#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
+#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
+#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
+#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
+#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
+#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
+#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
+#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
+
+#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
+#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
+#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
+
+/* Section 4: Extended PHY Registers */
+#define PHY_SR                          ((uint16_t)0x10U)    /*!< PHY status register Offset                      */
+
+#define PHY_SPEED_STATUS                ((uint16_t)0x0002U)  /*!< PHY Speed mask                                  */
+#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004U)  /*!< PHY Duplex mask                                 */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+#ifndef USE_SPI_CRC
+#define USE_SPI_CRC                     0U
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32f4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32f4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32f4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32f4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32f4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32f4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CAN_MODULE_ENABLED
+#include "stm32f4xx_hal_can.h"
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
+#include "stm32f4xx_hal_can_legacy.h"
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32f4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32f4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+#include "stm32f4xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32f4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+#include "stm32f4xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+#include "stm32f4xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32f4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32f4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32f4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32f4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_PCCARD_MODULE_ENABLED
+#include "stm32f4xx_hal_pccard.h"
+#endif /* HAL_PCCARD_MODULE_ENABLED */
+
+#ifdef HAL_SDRAM_MODULE_ENABLED
+#include "stm32f4xx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+#include "stm32f4xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32f4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32f4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32f4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32f4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+#include "stm32f4xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32f4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32f4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32f4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32f4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+#include "stm32f4xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32f4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32f4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32f4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32f4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32f4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32f4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32f4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32f4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+#include "stm32f4xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_DSI_MODULE_ENABLED
+#include "stm32f4xx_hal_dsi.h"
+#endif /* HAL_DSI_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32f4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+#include "stm32f4xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_FMPI2C_MODULE_ENABLED
+#include "stm32f4xx_hal_fmpi2c.h"
+#endif /* HAL_FMPI2C_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+#include "stm32f4xx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_DFSDM_MODULE_ENABLED
+#include "stm32f4xx_hal_dfsdm.h"
+#endif /* HAL_DFSDM_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32f4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+#include "stm32f4xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F4xx_HAL_CONF_CUSTOM_H */
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

buildroot/share/PlatformIO/variants/MARLIN_CREALITY_STM32F401RE/ldscript.ld

@@ -0,0 +1,186 @@
+/*
+*****************************************************************************
+**
+**  File        : ldscript.ld
+**
+**  Abstract    : Linker script for STM32F401RETx Device with
+**                512KByte FLASH, 96KByte RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**
+**  Distribution: The file is distributed as is, without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2014 Ac6</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of Ac6 nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x20010000;    /* end of RAM */
+
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200;      /* required amount of heap  */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+FLASH (rx)     : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 64K
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into FLASH */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data goes into FLASH */
+  .text ALIGN(4):
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data goes into FLASH */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+  .ARM : {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >FLASH
+
+  .preinit_array     :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH
+
+  /* used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+  } >RAM AT> FLASH
+
+
+  /* Uninitialized data section */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss secion */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough RAM left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}

buildroot/share/PlatformIO/variants/MARLIN_CREALITY_STM32F401RE/variant.cpp

@@ -0,0 +1,238 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#include "pins_arduino.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// Digital PinName array
+const PinName digitalPin[] = {
+  PA_0,  // Digital pin 0
+  PA_1,  // Digital pin 1
+  PA_2,  // Digital pin 2
+  PA_3,  // Digital pin 3
+  PA_4,  // Digital pin 4
+  PA_5,  // Digital pin 5
+  PA_6,  // Digital pin 6
+  PA_7,  // Digital pin 7
+  PA_8,  // Digital pin 8
+  PA_9,  // Digital pin 9
+  PA_10, // Digital pin 10
+  PA_11, // Digital pin 11
+  PA_12, // Digital pin 12
+  PA_13, // Digital pin 13
+  PA_14, // Digital pin 14
+  PA_15, // Digital pin 15
+
+  PB_0,  // Digital pin 16
+  PB_1,  // Digital pin 17
+  PB_2,  // Digital pin 18
+  PB_3,  // Digital pin 19
+  PB_4,  // Digital pin 20
+  PB_5,  // Digital pin 21
+  PB_6,  // Digital pin 22
+  PB_7,  // Digital pin 23
+  PB_8,  // Digital pin 24
+  PB_9,  // Digital pin 25
+  PB_10, // Digital pin 26
+  PB_12, // Digital pin 27
+  PB_13, // Digital pin 28
+  PB_14, // Digital pin 29
+  PB_15, // Digital pin 30
+
+  PC_0,  // Digital pin 31
+  PC_1,  // Digital pin 32
+  PC_2,  // Digital pin 33
+  PC_3,  // Digital pin 34
+  PC_4,  // Digital pin 35
+  PC_5,  // Digital pin 36
+  PC_6,  // Digital pin 37
+  PC_7,  // Digital pin 38
+  PC_8,  // Digital pin 39
+  PC_9,  // Digital pin 40
+  PC_10, // Digital pin 41
+  PC_11, // Digital pin 42
+  PC_12, // Digital pin 43
+  PC_13, // Digital pin 44
+  PC_14, // Digital pin 45
+  PC_15, // Digital pin 46
+
+  PD_2,  // Digital pin 47
+
+  PH_0,  // Digital pin 48, used by the external oscillator
+  PH_1   // Digital pin 49, used by the external oscillator
+};
+
+// Analog (Ax) pin number array
+const uint32_t analogInputPin[] = {
+  0,  // A0,  PA0
+  1,  // A1,  PA1
+  2,  // A2,  PA2
+  3,  // A3,  PA3
+  4,  // A4,  PA4
+  5,  // A5,  PA5
+  6,  // A6,  PA6
+  7,  // A7,  PA7
+  16, // A8,  PB0
+  17, // A9,  PB1
+  31, // A10, PC0
+  32, // A11, PC1
+  33, // A12, PC2
+  34, // A13, PC3
+  35, // A14, PC4
+  36  // A15, PC5
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+// ----------------------------------------------------------------------------
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * @brief  Configures the System clock source, PLL Multiplier and Divider factors,
+ *               AHB/APBx prescalers and Flash settings
+ * @note   This function should be called only once the RCC clock configuration
+ *         is reset to the default reset state (done in SystemInit() function).
+ * @param  None
+ * @retval None
+ */
+
+/******************************************************************************/
+/*            PLL (clocked by HSE) used as System clock source                */
+/******************************************************************************/
+static uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct;
+  RCC_ClkInitTypeDef RCC_ClkInitStruct;
+
+  /* The voltage scaling allows optimizing the power consumption when the device is
+  clocked below the maximum system frequency, to update the voltage scaling value
+  regarding system frequency refer to product datasheet. */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
+
+  // Enable HSE oscillator and activate PLL with HSE as source
+  RCC_OscInitStruct.OscillatorType      = RCC_OSCILLATORTYPE_HSE;
+  if (bypass == 0) {
+    RCC_OscInitStruct.HSEState          = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
+  } else {
+    RCC_OscInitStruct.HSEState          = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
+  }
+
+  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM            = HSE_VALUE / 1000000L; // Expects an 8 MHz external clock by default. Redefine HSE_VALUE if not
+  RCC_OscInitStruct.PLL.PLLN            = 336;           // VCO output clock = 336 MHz (1 MHz * 336)
+  RCC_OscInitStruct.PLL.PLLP            = RCC_PLLP_DIV4; // PLLCLK = 84 MHz (336 MHz / 4)
+  RCC_OscInitStruct.PLL.PLLQ            = 7;             // USB clock = 48 MHz (336 MHz / 7) --> OK for USB
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    return 0; // FAIL
+  }
+
+  // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK; // 84 MHz
+  RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;         // 84 MHz
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;           // 42 MHz
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;           // 84 MHz
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
+    return 0; // FAIL
+  }
+
+  /* Output clock on MCO1 pin(PA8) for debugging purpose */
+  /*
+  if (bypass == 0)
+    HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz
+  else
+    HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz
+  */
+
+  return 1; // OK
+}
+
+/******************************************************************************/
+/*            PLL (clocked by HSI) used as System clock source                */
+/******************************************************************************/
+uint8_t SetSysClock_PLL_HSI(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct;
+  RCC_ClkInitTypeDef RCC_ClkInitStruct;
+
+  /* The voltage scaling allows optimizing the power consumption when the device is
+    clocked below the maximum system frequency, to update the voltage scaling value
+    regarding system frequency refer to product datasheet. */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
+
+  // Enable HSI oscillator and activate PLL with HSI as source
+  RCC_OscInitStruct.OscillatorType      = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSIState            = RCC_HSI_ON;
+  RCC_OscInitStruct.HSEState            = RCC_HSE_OFF;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM            = 16;            // VCO input clock = 1 MHz (16 MHz / 16)
+  RCC_OscInitStruct.PLL.PLLN            = 336;           // VCO output clock = 336 MHz (1 MHz * 336)
+  RCC_OscInitStruct.PLL.PLLP            = RCC_PLLP_DIV4; // PLLCLK = 84 MHz (336 MHz / 4)
+  RCC_OscInitStruct.PLL.PLLQ            = 7;             // USB clock = 48 MHz (336 MHz / 7) --> freq is ok but not precise enough
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    return 0; // FAIL
+  }
+
+  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
+  RCC_ClkInitStruct.ClockType      = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+  RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK; // 84 MHz
+  RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;         // 84 MHz
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;           // 42 MHz
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;           // 84 MHz
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
+    return 0; // FAIL
+  }
+
+  /* Output clock on MCO1 pin(PA8) for debugging purpose */
+  //HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
+
+  return 1; // OK
+}
+
+WEAK void SystemClock_Config(void)
+{
+  /* 1- If fail try to start with HSE and external xtal */
+  if (SetSysClock_PLL_HSE(0) == 0) {
+    /* 2- Try to start with HSE and external clock */
+    if (SetSysClock_PLL_HSE(1) == 0) {
+      /* 3- If fail start with HSI clock */
+      if (SetSysClock_PLL_HSI() == 0) {
+        Error_Handler();
+      }
+    }
+  }
+  /* Output clock on MCO2 pin(PC9) for debugging purpose */
+  //HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_4);
+}
+
+#ifdef __cplusplus
+}
+#endif

buildroot/share/PlatformIO/variants/MARLIN_CREALITY_STM32F401RE/variant.h

@@ -0,0 +1,150 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef _VARIANT_ARDUINO_STM32_
+#define _VARIANT_ARDUINO_STM32_
+
+#ifdef __cplusplus
+extern "C" {
+#endif // __cplusplus
+
+                 // | DIGITAL | ANALOG | USART     | TWI      | SPI                    | SPECIAL   |
+                 // |---------|--------|-----------|----------|------------------------|-----------|
+#define PA0   0  // | 0       | A0     |           |          |                        |           |
+#define PA1   1  // | 1       | A1     |           |          |                        |           |
+#define PA2   2  // | 2       | A2     | USART2_TX |          |                        |           |
+#define PA3   3  // | 3       | A3     | USART2_RX |          |                        |           |
+#define PA4   4  // | 4       | A4     |           |          | SPI1_SS, (SPI3_SS)     |           |
+#define PA5   5  // | 5       | A5     |           |          | SPI1_SCK               |           |
+#define PA6   6  // | 6       | A6     |           |          | SPI1_MISO              |           |
+#define PA7   7  // | 7       | A7     |           |          | SPI1_MOSI              |           |
+#define PA8   8  // | 8       |        |           | TWI3_SCL |                        |           |
+#define PA9   9  // | 9       |        | USART1_TX |          |                        |           |
+#define PA10 10  // | 10      |        | USART1_RX |          |                        |           |
+#define PA11 11  // | 11      |        | USART6_TX |          |                        |           |
+#define PA12 12  // | 12      |        | USART6_RX |          |                        |           |
+#define PA13 13  // | 13      |        |           |          |                        | SWD_SWDIO |
+#define PA14 14  // | 14      |        |           |          |                        | SWD_SWCLK |
+#define PA15 15  // | 15      |        |           |          | SPI3_SS, (SPI1_SS)     |           |
+                 // |---------|--------|-----------|----------|------------------------|-----------|
+#define PB0  16  // | 16      | A8     |           |          |                        |           |
+#define PB1  17  // | 17      | A9     |           |          |                        |           |
+#define PB2  18  // | 18      |        |           |          |                        | BOOT1     |
+#define PB3  19  // | 19      |        |           | TWI2_SDA | SPI3_SCK,  (SPI1_SCK)  |           |
+#define PB4  20  // | 20      |        |           | TWI3_SDA | SPI3_MISO, (SPI1_MISO) |           |
+#define PB5  21  // | 21      |        |           |          | SPI3_MOSI, (SPI1_MOSI) |           |
+#define PB6  22  // | 22      |        | USART1_TX | TWI1_SCL |                        |           |
+#define PB7  23  // | 23      |        | USART1_RX | TWI1_SDA |                        |           |
+#define PB8  24  // | 24      |        |           | TWI1_SCL |                        |           |
+#define PB9  25  // | 25      |        |           | TWI1_SDA | SPI2_SS                |           |
+#define PB10 26  // | 26      |        |           | TWI2_SCL | SPI2_SCK               |           |
+#define PB12 27  // | 27      |        |           |          | SPI2_SS                |           |
+#define PB13 28  // | 28      |        |           |          | SPI2_SCK               |           |
+#define PB14 29  // | 29      |        |           |          | SPI2_MISO              |           |
+#define PB15 30  // | 30      |        |           |          | SPI2_MOSI              |           |
+                 // |---------|--------|-----------|----------|------------------------|-----------|
+#define PC0  31  // | 31      | A10    |           |          |                        |           |
+#define PC1  32  // | 32      | A11    |           |          |                        |           |
+#define PC2  33  // | 33      | A12    |           |          | SPI2_MISO              |           |
+#define PC3  34  // | 34      | A13    |           |          | SPI2_MOSI              |           |
+#define PC4  35  // | 35      | A14    |           |          |                        |           |
+#define PC5  36  // | 36      | A15    |           |          |                        |           |
+#define PC6  37  // | 37      |        | USART6_TX |          |                        |           |
+#define PC7  38  // | 38      |        | USART6_RX |          |                        |           |
+#define PC8  39  // | 39      |        |           |          |                        |           |
+#define PC9  40  // | 40      |        |           | TWI3_SDA |                        |           |
+#define PC10 41  // | 41      |        |           |          | SPI3_SCK               |           |
+#define PC11 42  // | 42      |        |           |          | SPI3_MISO              |           |
+#define PC12 43  // | 43      |        |           |          | SPI3_MOSI              |           |
+#define PC13 44  // | 44      |        |           |          |                        |           |
+#define PC14 45  // | 45      |        |           |          |                        | OSC32_IN  |
+#define PC15 46  // | 46      |        |           |          |                        | OSC32_OUT |
+                 // |---------|--------|-----------|----------|------------------------|-----------|
+#define PD2  47  // | 47      |        |           |          |                        |           |
+                 // |---------|--------|-----------|----------|------------------------|-----------|
+#define PH0  48  // | 48      |        |           |          |                        | OSC_IN    |
+#define PH1  49  // | 49      |        |           |          |                        | OSC_OUT   |
+                 // |---------|--------|-----------|----------|------------------------|-----------|
+
+// This must be a literal
+#define NUM_DIGITAL_PINS        50
+#define NUM_ANALOG_INPUTS       16
+
+// SPI definitions
+#define PIN_SPI_SS              PA4
+#define PIN_SPI_SS1             PA4
+#define PIN_SPI_MOSI            PA7
+#define PIN_SPI_MISO            PA6
+#define PIN_SPI_SCK             PA5
+
+
+// Timer Definitions
+#define TIMER_TONE              TIM2
+#define TIMER_SERVO             TIM11
+#define TIMER_SERIAL            TIM5
+
+// UART Definitions
+//#define ENABLE_HWSERIAL1        done automatically by the #define SERIAL_UART_INSTANCE below
+#define ENABLE_HWSERIAL2
+
+
+// Define here Serial instance number to map on Serial generic name (if not already used by SerialUSB)
+#define SERIAL_UART_INSTANCE    1 //1 for Serial = Serial1 (USART1)
+
+// Default pin used for 'Serial' instance
+// Mandatory for Firmata
+#define PIN_SERIAL_RX           PA10
+#define PIN_SERIAL_TX           PA9
+
+// Used when user instanciate a hardware Serial using its peripheral name.
+// Example: HardwareSerial mySerial(USART3);
+// will use PIN_SERIAL3_RX and PIN_SERIAL3_TX if defined.
+#define PIN_SERIAL1_RX          PA10
+#define PIN_SERIAL1_TX          PA9
+#define PIN_SERIAL2_RX          PA3
+#define PIN_SERIAL2_TX          PA2
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+/*----------------------------------------------------------------------------
+ *        Arduino objects - C++ only
+ *----------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+  // These serial port names are intended to allow libraries and architecture-neutral
+  // sketches to automatically default to the correct port name for a particular type
+  // of use.  For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
+  // the first hardware serial port whose RX/TX pins are not dedicated to another use.
+  //
+  // SERIAL_PORT_MONITOR        Port which normally prints to the Arduino Serial Monitor
+  //
+  // SERIAL_PORT_USBVIRTUAL     Port which is USB virtual serial
+  //
+  // SERIAL_PORT_LINUXBRIDGE    Port which connects to a Linux system via Bridge library
+  //
+  // SERIAL_PORT_HARDWARE       Hardware serial port, physical RX & TX pins.
+  //
+  // SERIAL_PORT_HARDWARE_OPEN  Hardware serial ports which are open for use.  Their RX & TX
+  //                            pins are NOT connected to anything by default.
+  #define SERIAL_PORT_MONITOR         Serial
+  #define SERIAL_PORT_HARDWARE        Serial1
+  #define SERIAL_PORT_HARDWARE_OPEN   Serial2
+#endif
+
+#endif /* _VARIANT_ARDUINO_STM32_ */

buildroot/share/PlatformIO/variants/MARLIN_F103Rx/PinNamesVar.h

@@ -27,4 +27,4 @@
 #ifdef USBCON
   USB_DM = PA_11,
   USB_DP = PA_12,
-#endif
+#endif

buildroot/share/PlatformIO/variants/MARLIN_F103Rx/variant.h

@@ -26,8 +26,8 @@ extern "C" {
 
 // *   = F103R8-B-C-D-E-F-G
 // **  = F103RC-D-E-F-G
-//                  | DIGITAL | ANALOG         | USART                    | TWI       | SPI                   | SPECIAL   |
-//                  |---------|----------------|--------------------------|-----------|-----------------------|-----------|
+//                      | DIGITAL | ANALOG         | USART                    | TWI       | SPI                   | SPECIAL   |
+//                      |---------|----------------|--------------------------|-----------|-----------------------|-----------|
 #define PA0  PIN_A0  // | 0       | A0             |                          |           |                       |           |
 #define PA1  PIN_A1  // | 1       | A1             |                          |           |                       |           |
 #define PA2  PIN_A2  // | 2       | A2             | USART2_TX                |           |                       |           |
@@ -36,53 +36,53 @@ extern "C" {
 #define PA5  PIN_A5  // | 5       | A5             |                          |           | SPI1_SCK              |           |
 #define PA6  PIN_A6  // | 6       | A6             |                          |           | SPI1_MISO             |           |
 #define PA7  PIN_A7  // | 7       | A7             |                          |           | SPI1_MOSI             |           |
-#define PA8  8   // | 8       |                |                          |           |                       |           |
-#define PA9  9   // | 9       |                | USART1_TX                |           |                       |           |
-#define PA10 10  // | 10      |                | USART1_RX                |           |                       |           |
-#define PA11 11  // | 11      |                |                          |           |                       | USB_DM    |
-#define PA12 12  // | 12      |                |                          |           |                       | USB_DP    |
-#define PA13 13  // | 13      |                |                          |           |                       | SWD_SWDIO |
-#define PA14 14  // | 14      |                |                          |           |                       | SWD_SWCLK |
-#define PA15 15  // | 15      |                |                          |           | SPI1_SS/SPI3_SS**     |           |
-//                  |---------|----------------|--------------------------|-----------|-----------------------|-----------|
+#define PA8  8       // | 8       |                |                          |           |                       |           |
+#define PA9  9       // | 9       |                | USART1_TX                |           |                       |           |
+#define PA10 10      // | 10      |                | USART1_RX                |           |                       |           |
+#define PA11 11      // | 11      |                |                          |           |                       | USB_DM    |
+#define PA12 12      // | 12      |                |                          |           |                       | USB_DP    |
+#define PA13 13      // | 13      |                |                          |           |                       | SWD_SWDIO |
+#define PA14 14      // | 14      |                |                          |           |                       | SWD_SWCLK |
+#define PA15 15      // | 15      |                |                          |           | SPI1_SS/SPI3_SS**     |           |
+//                      |---------|----------------|--------------------------|-----------|-----------------------|-----------|
 #define PB0  PIN_A8  // | 16      | A8             |                          |           |                       |           |
 #define PB1  PIN_A9  // | 17      | A9             |                          |           |                       |           |
-#define PB2  18  // | 18      |                |                          |           |                       | BOOT1     |
-#define PB3  19  // | 19      |                |                          |           | SPI1_SCK/SPI3_SCK**   |           |
-#define PB4  20  // | 20      |                |                          |           | SPI1_MISO/SPI3_MISO** |           |
-#define PB5  21  // | 21      |                |                          |           | SPI1_MOSI/SPI3_MOSI** |           |
-#define PB6  22  // | 22      |                | USART1_TX                | TWI1_SCL  |                       |           |
-#define PB7  23  // | 23      |                | USART1_RX                | TWI1_SDA  |                       |           |
-#define PB8  24  // | 24      |                |                          | TWI1_SCL  |                       |           |
-#define PB9  25  // | 25      |                |                          | TWI1_SDA  |                       |           |
-#define PB10 26  // | 26      |                | USART3_TX*               | TWI2_SCL* |                       |           |
-#define PB11 27  // | 27      |                | USART3_RX*               | TWI2_SDA* |                       |           |
-#define PB12 28  // | 28      |                |                          |           | SPI2_SS*              |           |
-#define PB13 29  // | 29      |                |                          |           | SPI2_SCK*             |           |
-#define PB14 30  // | 30      |                |                          |           | SPI2_MISO*            |           |
-#define PB15 31  // | 31      |                |                          |           | SPI2_MOSI*            |           |
-//                  |---------|----------------|--------------------------|-----------|-----------------------|-----------|
+#define PB2  18      // | 18      |                |                          |           |                       | BOOT1     |
+#define PB3  19      // | 19      |                |                          |           | SPI1_SCK/SPI3_SCK**   |           |
+#define PB4  20      // | 20      |                |                          |           | SPI1_MISO/SPI3_MISO** |           |
+#define PB5  21      // | 21      |                |                          |           | SPI1_MOSI/SPI3_MOSI** |           |
+#define PB6  22      // | 22      |                | USART1_TX                | TWI1_SCL  |                       |           |
+#define PB7  23      // | 23      |                | USART1_RX                | TWI1_SDA  |                       |           |
+#define PB8  24      // | 24      |                |                          | TWI1_SCL  |                       |           |
+#define PB9  25      // | 25      |                |                          | TWI1_SDA  |                       |           |
+#define PB10 26      // | 26      |                | USART3_TX*               | TWI2_SCL* |                       |           |
+#define PB11 27      // | 27      |                | USART3_RX*               | TWI2_SDA* |                       |           |
+#define PB12 28      // | 28      |                |                          |           | SPI2_SS*              |           |
+#define PB13 29      // | 29      |                |                          |           | SPI2_SCK*             |           |
+#define PB14 30      // | 30      |                |                          |           | SPI2_MISO*            |           |
+#define PB15 31      // | 31      |                |                          |           | SPI2_MOSI*            |           |
+//                      |---------|----------------|--------------------------|-----------|-----------------------|-----------|
 #define PC0  PIN_A10 // | 32      | A10            |                          |           |                       |           |
 #define PC1  PIN_A11 // | 33      | A11            |                          |           |                       |           |
 #define PC2  PIN_A12 // | 34      | A12            |                          |           |                       |           |
 #define PC3  PIN_A13 // | 35      | A13            |                          |           |                       |           |
 #define PC4  PIN_A14 // | 36      | A14            |                          |           |                       |           |
 #define PC5  PIN_A15 // | 37      | A15            |                          |           |                       |           |
-#define PC6  38  // | 38      |                |                          |           |                       |           |
-#define PC7  39  // | 39      |                |                          |           |                       |           |
-#define PC8  40  // | 40      |                |                          |           |                       |           |
-#define PC9  41  // | 41      |                |                          |           |                       |           |
-#define PC10 42  // | 42      |                | USART3_TX*/UART4_TX**    |           |                       |           |
-#define PC11 43  // | 43      |                | USART3_RX*/UART4_RX**    |           |                       |           |
-#define PC12 44  // | 44      |                | UART5_TX**               |           |                       |           |
-#define PC13 45  // | 45      |                |                          |           |                       |           |
-#define PC14 46  // | 46      |                |                          |           |                       | OSC32_IN  |
-#define PC15 47  // | 47      |                |                          |           |                       | OSC32_OUT |
-//                  |---------|----------------|--------------------------|-----------|-----------------------|-----------|
-#define PD0  48  // | 48      |                |                          |           |                       | OSC_IN    |
-#define PD1  49  // | 48      |                |                          |           |                       | OSC_OUT   |
-#define PD2  50  // | 50      |                | UART5_RX**               |           |                       |           |
-//                  |---------|----------------|--------------------------|-----------|-----------------------|-----------|
+#define PC6  38      // | 38      |                |                          |           |                       |           |
+#define PC7  39      // | 39      |                |                          |           |                       |           |
+#define PC8  40      // | 40      |                |                          |           |                       |           |
+#define PC9  41      // | 41      |                |                          |           |                       |           |
+#define PC10 42      // | 42      |                | USART3_TX*/UART4_TX**    |           |                       |           |
+#define PC11 43      // | 43      |                | USART3_RX*/UART4_RX**    |           |                       |           |
+#define PC12 44      // | 44      |                | UART5_TX**               |           |                       |           |
+#define PC13 45      // | 45      |                |                          |           |                       |           |
+#define PC14 46      // | 46      |                |                          |           |                       | OSC32_IN  |
+#define PC15 47      // | 47      |                |                          |           |                       | OSC32_OUT |
+//                      |---------|----------------|--------------------------|-----------|-----------------------|-----------|
+#define PD0  48      // | 48      |                |                          |           |                       | OSC_IN    |
+#define PD1  49      // | 48      |                |                          |           |                       | OSC_OUT   |
+#define PD2  50      // | 50      |                | UART5_RX**               |           |                       |           |
+//                      |---------|----------------|--------------------------|-----------|-----------------------|-----------|
 
 // This must be a literal
 #define NUM_DIGITAL_PINS        51

buildroot/share/PlatformIO/variants/MARLIN_F407ZE/PeripheralPins.c

@@ -413,7 +413,7 @@ const PinMap PinMap_USB_OTG_HS[] = {
     */
   {NC,    NP,    0}
 };
-
+#endif
 
 #ifdef HAL_SD_MODULE_ENABLED
 WEAK const PinMap PinMap_SD[] = {
@@ -430,4 +430,3 @@ WEAK const PinMap PinMap_SD[] = {
   {NC,    NP,    0}
 };
 #endif
-#endif

buildroot/share/PlatformIO/variants/MARLIN_F407ZE/variant.h

@@ -27,118 +27,118 @@ extern "C" {
  *        Pins
  *----------------------------------------------------------------------------*/
 
-#define PA0   0  //D0
-#define PA1   1  //D1
-#define PA2   2  //D2
-#define PA3   3  //D3
-#define PA4   4  //D4
-#define PA5   5  //D5
-#define PA6   6  //D6
-#define PA7   7  //D7
-#define PA8   8  //D8
-#define PA9   9  //D9
-#define PA10  10 //D10
-#define PA11  11 //D11
-#define PA12  12 //D12
-#define PA13  13 //D13
-#define PA14  14 //D14
-#define PA15  15 //D15
-#define PB0   16 //D16
-#define PB1   17 //D17
-#define PB2   18 //D18
-#define PB3   19 //D19
-#define PB4   20 //D20
-#define PB5   21 //D21
-#define PB6   22 //D22
-#define PB7   23 //D23
-#define PB8   24 //D24
-#define PB9   25 //D25
-#define PB10  26 //D26
-#define PB11  27 //D27
-#define PB12  28 //D28
-#define PB13  29 //D29
-#define PB14  30 //D30
-#define PB15  31 //D31
-#define PC0   32 //D32
-#define PC1   33 //D33
-#define PC2   34 //D34
-#define PC3   35 //D35
-#define PC4   36 //D36
-#define PC5   37 //D37
-#define PC6   38 //D38
-#define PC7   39 //D39
-#define PC8   40 //D40
-#define PC9   41 //D41
-#define PC10  42 //D42
-#define PC11  43 //D43
-#define PC12  44 //D44
-#define PC13  45 //D45
-#define PC14  46 //D46
-#define PC15  47 //D47
-#define PD0   48 //D48
-#define PD1   49 //D49
-#define PD2   50 //D50
-#define PD3   51 //D51
-#define PD4   52 //D52
-#define PD5   53 //D53
-#define PD6   54 //D54
-#define PD7   55 //D55
-#define PD8   56 //D56
-#define PD9   57 //D57
-#define PD10  58 //D58
-#define PD11  59 //D59
-#define PD12  60 //D60
-#define PD13  61 //D61
-#define PD14  62 //D62
-#define PD15  63 //D63
-#define PE0   64 //D64
-#define PE1   65 //D65
-#define PE2   66 //D66
-#define PE3   67 //D67
-#define PE4   68 //D68
-#define PE5   69 //D69
-#define PE6   70 //D70
-#define PE7   71 //D71
-#define PE8   72 //D72
-#define PE9   73 //D73
-#define PE10  74 //D74
-#define PE11  75 //D75
-#define PE12  76 //D76
-#define PE13  77 //D77
-#define PE14  78 //D78
-#define PE15  79 //D79
-#define PF0   80 //D64
-#define PF1   81 //D65
-#define PF2   82 //D66
-#define PF3   83 //D67
-#define PF4   84 //D68
-#define PF5   85 //D69
-#define PF6   86 //D70
-#define PF7   87 //D71
-#define PF8   88 //D72
-#define PF9   89 //D73
-#define PF10  90 //D74
-#define PF11  91 //D75
-#define PF12  92 //D76
-#define PF13  93 //D77
-#define PF14  94 //D78
-#define PF15  95 //D79
-#define PG0   96 //D64
-#define PG1   97 //D65
-#define PG2   98 //D66
-#define PG3   99 //D67
-#define PG4   100 //D68
-#define PG5   101 //D69
-#define PG6   102 //D70
-#define PG7   103 //D71
-#define PG8   104 //D72
-#define PG9   105 //D73
-#define PG10  106 //D74
-#define PG11  107 //D75
-#define PG12  108 //D76
-#define PG13  109 //D77
-#define PG14  110 //D78
-#define PG15  111 //D79
+#define PA0    0
+#define PA1    1
+#define PA2    2
+#define PA3    3
+#define PA4    4
+#define PA5    5
+#define PA6    6
+#define PA7    7
+#define PA8    8
+#define PA9    9
+#define PA10  10
+#define PA11  11
+#define PA12  12
+#define PA13  13
+#define PA14  14
+#define PA15  15
+#define PB0   16
+#define PB1   17
+#define PB2   18
+#define PB3   19
+#define PB4   20
+#define PB5   21
+#define PB6   22
+#define PB7   23
+#define PB8   24
+#define PB9   25
+#define PB10  26
+#define PB11  27
+#define PB12  28
+#define PB13  29
+#define PB14  30
+#define PB15  31
+#define PC0   32
+#define PC1   33
+#define PC2   34
+#define PC3   35
+#define PC4   36
+#define PC5   37
+#define PC6   38
+#define PC7   39
+#define PC8   40
+#define PC9   41
+#define PC10  42
+#define PC11  43
+#define PC12  44
+#define PC13  45
+#define PC14  46
+#define PC15  47
+#define PD0   48
+#define PD1   49
+#define PD2   50
+#define PD3   51
+#define PD4   52
+#define PD5   53
+#define PD6   54
+#define PD7   55
+#define PD8   56
+#define PD9   57
+#define PD10  58
+#define PD11  59
+#define PD12  60
+#define PD13  61
+#define PD14  62
+#define PD15  63
+#define PE0   64
+#define PE1   65
+#define PE2   66
+#define PE3   67
+#define PE4   68
+#define PE5   69
+#define PE6   70
+#define PE7   71
+#define PE8   72
+#define PE9   73
+#define PE10  74
+#define PE11  75
+#define PE12  76
+#define PE13  77
+#define PE14  78
+#define PE15  79
+#define PF0   80
+#define PF1   81
+#define PF2   82
+#define PF3   83
+#define PF4   84
+#define PF5   85
+#define PF6   86
+#define PF7   87
+#define PF8   88
+#define PF9   89
+#define PF10  90
+#define PF11  91
+#define PF12  92
+#define PF13  93
+#define PF14  94
+#define PF15  95
+#define PG0   96
+#define PG1   97
+#define PG2   98
+#define PG3   99
+#define PG4  100
+#define PG5  101
+#define PG6  102
+#define PG7  103
+#define PG8  104
+#define PG9  105
+#define PG10 106
+#define PG11 107
+#define PG12 108
+#define PG13 109
+#define PG14 110
+#define PG15 111
 
 // This must be a literal with the same value as PEND
 #define NUM_DIGITAL_PINS        112

buildroot/share/PlatformIO/variants/MARLIN_FYSETC_CHEETAH_V20/variant.h

@@ -23,9 +23,8 @@
 extern "C" {
 #endif // __cplusplus
 
-
-//                  | DIGITAL | ANALOG | USART     | TWI      | SPI                    | SPECIAL   |
-//                  |---------|--------|-----------|----------|------------------------|-----------|
+                 // | DIGITAL | ANALOG | USART     | TWI      | SPI                    | SPECIAL   |
+                 // |---------|--------|-----------|----------|------------------------|-----------|
 #define PA0  A0  // | 0       | A0     |           |          |                        |           |
 #define PA1  A1  // | 1       | A1     |           |          |                        |           |
 #define PA2  A2  // | 2       | A2     | USART2_TX |          |                        |           |
@@ -42,7 +41,7 @@ extern "C" {
 #define PA13 13  // | 13      |        |           |          |                        | SWD_SWDIO |
 #define PA14 14  // | 14      |        |           |          |                        | SWD_SWCLK |
 #define PA15 15  // | 15      |        |           |          | SPI3_SS, (SPI1_SS)     |           |
-//                  |---------|--------|-----------|----------|------------------------|-----------|
+                 // |---------|--------|-----------|----------|------------------------|-----------|
 #define PB0  A8  // | 16      | A8     |           |          |                        |           |
 #define PB1  A9  // | 17      | A9     |           |          |                        |           |
 #define PB2  18  // | 18      |        |           |          |                        | BOOT1     |
@@ -58,7 +57,7 @@ extern "C" {
 #define PB13 28  // | 28      |        |           |          | SPI2_SCK               |           |
 #define PB14 29  // | 29      |        |           |          | SPI2_MISO              |           |
 #define PB15 30  // | 30      |        |           |          | SPI2_MOSI              |           |
-//                  |---------|--------|-----------|----------|------------------------|-----------|
+                 // |---------|--------|-----------|----------|------------------------|-----------|
 #define PC0  A10 // | 31      | A10    |           |          |                        |           |
 #define PC1  A11 // | 32      | A11    |           |          |                        |           |
 #define PC2  A12 // | 33      | A12    |           |          | SPI2_MISO              |           |
@@ -75,12 +74,12 @@ extern "C" {
 #define PC13 44  // | 44      |        |           |          |                        |           |
 #define PC14 45  // | 45      |        |           |          |                        | OSC32_IN  |
 #define PC15 46  // | 46      |        |           |          |                        | OSC32_OUT |
-//                  |---------|--------|-----------|----------|------------------------|-----------|
+                 // |---------|--------|-----------|----------|------------------------|-----------|
 #define PD2  47  // | 47      |        |           |          |                        |           |
-//                  |---------|--------|-----------|----------|------------------------|-----------|
+                 // |---------|--------|-----------|----------|------------------------|-----------|
 #define PH0  48  // | 48      |        |           |          |                        | OSC_IN    |
 #define PH1  49  // | 49      |        |           |          |                        | OSC_OUT   |
-//                  |---------|--------|-----------|----------|------------------------|-----------|
+                 // |---------|--------|-----------|----------|------------------------|-----------|
 
 // This must be a literal
 #define NUM_DIGITAL_PINS        50

buildroot/share/PlatformIO/variants/MARLIN_FYSETC_S6/variant.h

@@ -27,86 +27,86 @@ extern "C" {
  *        Pins
  *----------------------------------------------------------------------------*/
 
-#define PA0   0  //D0
-#define PA1   1  //D1
-#define PA2   2  //D2
-#define PA3   3  //D3
-#define PA4   4  //D4
-#define PA5   5  //D5
-#define PA6   6  //D6
-#define PA7   7  //D7
-#define PA8   8  //D8
-#define PA9   9  //D9
-#define PA10  10 //D10
-#define PA11  11 //D11
-#define PA12  12 //D12
-#define PA13  13 //D13
-#define PA14  14 //D14
-#define PA15  15 //D15
-#define PB0   16 //D16
-#define PB1   17 //D17
-#define PB2   18 //D18
-#define PB3   19 //D19
-#define PB4   20 //D20
-#define PB5   21 //D21
-#define PB6   22 //D22
-#define PB7   23 //D23
-#define PB8   24 //D24
-#define PB9   25 //D25
-#define PB10  26 //D26
-#define PB11  27 //D27
-#define PB12  28 //D28
-#define PB13  29 //D29
-#define PB14  30 //D30
-#define PB15  31 //D31
-#define PC0   32 //D32
-#define PC1   33 //D33
-#define PC2   34 //D34
-#define PC3   35 //D35
-#define PC4   36 //D36
-#define PC5   37 //D37
-#define PC6   38 //D38
-#define PC7   39 //D39
-#define PC8   40 //D40
-#define PC9   41 //D41
-#define PC10  42 //D42
-#define PC11  43 //D43
-#define PC12  44 //D44
-#define PC13  45 //D45
-#define PC14  46 //D46
-#define PC15  47 //D47
-#define PD0   48 //D48
-#define PD1   49 //D49
-#define PD2   50 //D50
-#define PD3   51 //D51
-#define PD4   52 //D52
-#define PD5   53 //D53
-#define PD6   54 //D54
-#define PD7   55 //D55
-#define PD8   56 //D56
-#define PD9   57 //D57
-#define PD10  58 //D58
-#define PD11  59 //D59
-#define PD12  60 //D60
-#define PD13  61 //D61
-#define PD14  62 //D62
-#define PD15  63 //D63
-#define PE0   64 //D64
-#define PE1   65 //D65
-#define PE2   66 //D66
-#define PE3   67 //D67
-#define PE4   68 //D68
-#define PE5   69 //D69
-#define PE6   70 //D70
-#define PE7   71 //D71
-#define PE8   72 //D72
-#define PE9   73 //D73
-#define PE10  74 //D74
-#define PE11  75 //D75
-#define PE12  76 //D76
-#define PE13  77 //D77
-#define PE14  78 //D78
-#define PE15  79 //D79
+#define PA0     0
+#define PA1     1
+#define PA2     2
+#define PA3     3
+#define PA4     4
+#define PA5     5
+#define PA6     6
+#define PA7     7
+#define PA8     8
+#define PA9     9
+#define PA10  10
+#define PA11  11
+#define PA12  12
+#define PA13  13
+#define PA14  14
+#define PA15  15
+#define PB0   16
+#define PB1   17
+#define PB2   18
+#define PB3   19
+#define PB4   20
+#define PB5   21
+#define PB6   22
+#define PB7   23
+#define PB8   24
+#define PB9   25
+#define PB10  26
+#define PB11  27
+#define PB12  28
+#define PB13  29
+#define PB14  30
+#define PB15  31
+#define PC0   32
+#define PC1   33
+#define PC2   34
+#define PC3   35
+#define PC4   36
+#define PC5   37
+#define PC6   38
+#define PC7   39
+#define PC8   40
+#define PC9   41
+#define PC10  42
+#define PC11  43
+#define PC12  44
+#define PC13  45
+#define PC14  46
+#define PC15  47
+#define PD0   48
+#define PD1   49
+#define PD2   50
+#define PD3   51
+#define PD4   52
+#define PD5   53
+#define PD6   54
+#define PD7   55
+#define PD8   56
+#define PD9   57
+#define PD10  58
+#define PD11  59
+#define PD12  60
+#define PD13  61
+#define PD14  62
+#define PD15  63
+#define PE0   64
+#define PE1   65
+#define PE2   66
+#define PE3   67
+#define PE4   68
+#define PE5   69
+#define PE6   70
+#define PE7   71
+#define PE8   72
+#define PE9   73
+#define PE10  74
+#define PE11  75
+#define PE12  76
+#define PE13  77
+#define PE14  78
+#define PE15  79
 
 // This must be a literal with the same value as PEND
 #define NUM_DIGITAL_PINS        87

buildroot/share/PlatformIO/variants/MARLIN_FYSETC_SPIDER_KING407/PeripheralPins.c

@@ -191,7 +191,7 @@ WEAK const PinMap PinMap_PWM[] = {
   {PD_15, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4    FAN2_PIN
   //{PE_5,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
   //{PE_6,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
-  {PE_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N   FAN_PIN
+  {PE_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N   FAN0_PIN
   {PE_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1    FAN1_PIN
   {PE_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N   HEATER_BED_PIN
   //{PE_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2

buildroot/share/PlatformIO/variants/MARLIN_H723VG/variant_MARLIN_STM32H723VG.h

@@ -161,6 +161,7 @@
 #define NUM_DIGITAL_PINS        82
 #define NUM_DUALPAD_PINS        2
 #define NUM_ANALOG_INPUTS       16
+#define NUM_ANALOG_FIRST        PA0
 
 // On-board LED pin number
 #ifndef LED_BUILTIN

buildroot/share/PlatformIO/variants/MARLIN_H723ZE/variant_MARLIN_STM32H723ZE.cpp

@@ -128,7 +128,9 @@ const PinName digitalPin[] = {
   PH_0,   // D110
   PH_1,   // D111
   PC_2_C, // D112/A26
-  PC_3_C  // D113/A27
+  PC_3_C, // D113/A27
+  PC_2,   // D114/A28
+  PC_3    // D115/A29
 };
 
 // Analog (Ax) pin number array
@@ -160,7 +162,9 @@ const uint32_t analogInputPin[] = {
   91, // A24, PF13
   92, // A25, PF14
   112, // A26, PC2_C
-  113 // A27, PC3_C
+  113, // A27, PC3_C
+  114, // A28, PC2
+  115  // A29, PC3
 };
 
 void MPU_Config(void)

buildroot/share/PlatformIO/variants/MARLIN_H723ZE/variant_MARLIN_STM32H723ZE.h

@@ -129,6 +129,8 @@
 #define PH1                     111
 #define PC2_C                   PIN_A26
 #define PC3_C                   PIN_A27
+#define PC2                     PC2_C
+#define PC3                     PC3_C
 
 // Alternate pins number
 #define PA0_ALT1                (PA0  | ALT1)
@@ -197,9 +199,10 @@
 #define PF9_ALT2                (PF9  | ALT2)
 #define PG13_ALT1               (PG13 | ALT1)
 
-#define NUM_DIGITAL_PINS        114
+#define NUM_DIGITAL_PINS        116
 #define NUM_DUALPAD_PINS        2
-#define NUM_ANALOG_INPUTS       28
+#define NUM_ANALOG_INPUTS       30
+#define NUM_ANALOG_FIRST        PA0
 
 // On-board LED pin number
 #ifndef LED_BUILTIN

buildroot/share/PlatformIO/variants/MARLIN_H743VI/variant_MARLIN_STM32H743VI.h

@@ -160,6 +160,7 @@
 #define NUM_DIGITAL_PINS        82
 #define NUM_DUALPAD_PINS        2
 #define NUM_ANALOG_INPUTS       16
+#define NUM_ANALOG_FIRST        PA0
 
 // On-board LED pin number
 #ifndef LED_BUILTIN

buildroot/share/PlatformIO/variants/MARLIN_TH3D_EZBOARD_V2/PeripheralPins.c

@@ -161,7 +161,7 @@ WEAK const PinMap PinMap_PWM[] = {
   //{PB_14, TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)},  // TIM8_CH2N
   //{PB_14, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1
 
-  //{PB_15, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)},  // TIM1_CH3N  LCD_PINS_ENABLE
+  //{PB_15, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)},  // TIM1_CH3N  LCD_PINS_EN
   //{PB_15, TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)},  // TIM8_CH3N
   //{PB_15, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2
 
@@ -292,7 +292,7 @@ WEAK const PinMap PinMap_USB_OTG_HS[] = {
   //{PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID   CS (LCD)
   //{PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS        LCD_PINS_D4
   //{PB_14, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM   MISO (LCD)
-  //{PB_15, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP   LCD_PINS_ENABLE
+  //{PB_15, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP   LCD_PINS_EN
 #else
   //{PA_3,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0  Z_STEP
   //{PA_5,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK  SPI-SCK

buildroot/share/PlatformIO/variants/MARLIN_TH3D_EZBOARD_V2/variant.h

@@ -27,8 +27,8 @@ extern "C" {
  *        Pins (STM32F405RG and STM32F415RG)
  *----------------------------------------------------------------------------*/
 
-//                  | DIGITAL | ANALOG IN  | ANALOG OUT | UART/USART            | TWI                  | SPI                               | SPECIAL   |
-//                  |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
+//                      | DIGITAL | ANALOG IN  | ANALOG OUT | UART/USART            | TWI                  | SPI                               | SPECIAL   |
+//                      |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
 #define PA0  PIN_A0  // | 0       | A0 (ADC1)  |            | UART4_TX              |                      |                                   |           |
 #define PA1  PIN_A1  // | 1       | A1 (ADC1)  |            | UART4_RX              |                      |                                   |           |
 #define PA2  PIN_A2  // | 2       | A2 (ADC1)  |            | USART2_TX             |                      |                                   |           |
@@ -37,54 +37,54 @@ extern "C" {
 #define PA5  PIN_A5  // | 5       | A5 (ADC1)  | DAC_OUT2   |                       |                      | SPI1_SCK                          |           |
 #define PA6  PIN_A6  // | 6       | A6 (ADC1)  |            |                       |                      | SPI1_MISO                         |           |
 #define PA7  PIN_A7  // | 7       | A7 (ADC1)  |            |                       |                      | SPI1_MOSI                         |           |
-#define PA8  8   // | 8       |            |            |                       | TWI3_SCL             |                                   |           |
-#define PA9  9   // | 9       |            |            | USART1_TX             |                      | SPI2_SCK                          |           |
-#define PA10 10  // | 10      |            |            | USART1_RX             |                      |                                   |           |
-#define PA11 11  // | 11      |            |            |                       |                      |                                   |           |
-#define PA12 12  // | 12      |            |            |                       |                      |                                   |           |
-#define PA13 13  // | 13      |            |            |                       |                      |                                   | SWD_SWDIO |
-#define PA14 14  // | 14      |            |            |                       |                      |                                   | SWD_SWCLK |
-#define PA15 15  // | 15      |            |            |                       |                      | SPI3_SS, (SPI1_SS)                |           |
-//                  |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
+#define PA8  8       // | 8       |            |            |                       | TWI3_SCL             |                                   |           |
+#define PA9  9       // | 9       |            |            | USART1_TX             |                      | SPI2_SCK                          |           |
+#define PA10 10      // | 10      |            |            | USART1_RX             |                      |                                   |           |
+#define PA11 11      // | 11      |            |            |                       |                      |                                   |           |
+#define PA12 12      // | 12      |            |            |                       |                      |                                   |           |
+#define PA13 13      // | 13      |            |            |                       |                      |                                   | SWD_SWDIO |
+#define PA14 14      // | 14      |            |            |                       |                      |                                   | SWD_SWCLK |
+#define PA15 15      // | 15      |            |            |                       |                      | SPI3_SS, (SPI1_SS)                |           |
+//                      |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
 #define PB0  PIN_A8  // | 16      | A8 (ADC1)  |            |                       |                      |                                   |           |
 #define PB1  PIN_A9  // | 17      | A9 (ADC1)  |            |                       |                      |                                   |           |
-#define PB2  18  // | 18      |            |            |                       |                      |                                   | BOOT1     |
-#define PB3  19  // | 19      |            |            |                       |                      | SPI3_SCK,  (SPI1_SCK)             |           |
-#define PB4  20  // | 20      |            |            |                       |                      | SPI3_MISO, (SPI1_MISO)            |           |
-#define PB5  21  // | 21      |            |            |                       |                      | SPI3_MOSI, (SPI1_MOSI)            |           |
-#define PB6  22  // | 22      |            |            | USART1_TX             | TWI1_SCL             |                                   |           |
-#define PB7  23  // | 23      |            |            | USART1_RX             | TWI1_SDA             |                                   |           |
-#define PB8  24  // | 24      |            |            |                       | TWI1_SCL             |                                   |           |
-#define PB9  25  // | 25      |            |            |                       | TWI1_SDA             | SPI2_SS                           |           |
-#define PB10 26  // | 26      |            |            | USART3_TX             | TWI2_SCL             | SPI2_SCK                          |           |
-#define PB11 27  // | 27      |            |            | USART3_RX             | TWI2_SDA             |                                   |           |
-#define PB12 28  // | 28      |            |            |                       |                      | SPI2_SS                           |           |
-#define PB13 29  // | 29      |            |            |                       |                      | SPI2_SCK                          |           |
-#define PB14 30  // | 30      |            |            |                       |                      | SPI2_MISO                         |           |
-#define PB15 31  // | 31      |            |            |                       |                      | SPI2_MOSI                         |           |
-//                  |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
+#define PB2  18      // | 18      |            |            |                       |                      |                                   | BOOT1     |
+#define PB3  19      // | 19      |            |            |                       |                      | SPI3_SCK,  (SPI1_SCK)             |           |
+#define PB4  20      // | 20      |            |            |                       |                      | SPI3_MISO, (SPI1_MISO)            |           |
+#define PB5  21      // | 21      |            |            |                       |                      | SPI3_MOSI, (SPI1_MOSI)            |           |
+#define PB6  22      // | 22      |            |            | USART1_TX             | TWI1_SCL             |                                   |           |
+#define PB7  23      // | 23      |            |            | USART1_RX             | TWI1_SDA             |                                   |           |
+#define PB8  24      // | 24      |            |            |                       | TWI1_SCL             |                                   |           |
+#define PB9  25      // | 25      |            |            |                       | TWI1_SDA             | SPI2_SS                           |           |
+#define PB10 26      // | 26      |            |            | USART3_TX             | TWI2_SCL             | SPI2_SCK                          |           |
+#define PB11 27      // | 27      |            |            | USART3_RX             | TWI2_SDA             |                                   |           |
+#define PB12 28      // | 28      |            |            |                       |                      | SPI2_SS                           |           |
+#define PB13 29      // | 29      |            |            |                       |                      | SPI2_SCK                          |           |
+#define PB14 30      // | 30      |            |            |                       |                      | SPI2_MISO                         |           |
+#define PB15 31      // | 31      |            |            |                       |                      | SPI2_MOSI                         |           |
+//                      |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
 #define PC0  PIN_A10 // | 32      | A10 (ADC1) |            |                       |                      |                                   |           |
 #define PC1  PIN_A11 // | 33      | A11 (ADC1) |            |                       |                      |                                   |           |
 #define PC2  PIN_A12 // | 34      | A12 (ADC1) |            |                       |                      | SPI2_MISO                         |           |
 #define PC3  PIN_A13 // | 35      | A13 (ADC1) |            |                       |                      | SPI2_MOSI                         |           |
 #define PC4  PIN_A14 // | 36      | A14 (ADC1) |            |                       |                      |                                   |           |
 #define PC5  PIN_A15 // | 37      | A15 (ADC1) |            |                       |                      |                                   |           |
-#define PC6  38  // | 38      |            |            | USART6_TX             |                      |                                   |           |
-#define PC7  39  // | 39      |            |            | USART3_RX             |                      | SPI2_SCK                          |           |
-#define PC8  40  // | 40      |            |            |                       |                      |                                   |           |
-#define PC9  41  // | 41      |            |            |                       | TWI3_SDA             |                                   |           |
-#define PC10 42  // | 42      |            |            | USART3_TX, (UART4_TX) |                      | SPI3_SCK                          |           |
-#define PC11 43  // | 43      |            |            | USART3_RX, (UART4_RX) |                      | SPI3_MISO                         |           |
-#define PC12 44  // | 44      |            |            | UART5_TX              |                      | SPI3_MOSI                         |           |
-#define PC13 45  // | 45      |            |            |                       |                      |                                   |           |
-#define PC14 46  // | 46      |            |            |                       |                      |                                   | OSC32_IN  |
-#define PC15 47  // | 47      |            |            |                       |                      |                                   | OSC32_OUT |
-//                  |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
-#define PD2  48  // | 48      |            |            | UART5_RX              |                      |                                   |           |
-//                  |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
-#define PH0  49  // | 49      |            |            |                       |                      |                                   | OSC_IN    |
-#define PH1  50  // | 50      |            |            |                       |                      |                                   | OSC_OUT   |
-//                  |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
+#define PC6  38      // | 38      |            |            | USART6_TX             |                      |                                   |           |
+#define PC7  39      // | 39      |            |            | USART3_RX             |                      | SPI2_SCK                          |           |
+#define PC8  40      // | 40      |            |            |                       |                      |                                   |           |
+#define PC9  41      // | 41      |            |            |                       | TWI3_SDA             |                                   |           |
+#define PC10 42      // | 42      |            |            | USART3_TX, (UART4_TX) |                      | SPI3_SCK                          |           |
+#define PC11 43      // | 43      |            |            | USART3_RX, (UART4_RX) |                      | SPI3_MISO                         |           |
+#define PC12 44      // | 44      |            |            | UART5_TX              |                      | SPI3_MOSI                         |           |
+#define PC13 45      // | 45      |            |            |                       |                      |                                   |           |
+#define PC14 46      // | 46      |            |            |                       |                      |                                   | OSC32_IN  |
+#define PC15 47      // | 47      |            |            |                       |                      |                                   | OSC32_OUT |
+//                      |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
+#define PD2  48      // | 48      |            |            | UART5_RX              |                      |                                   |           |
+//                      |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
+#define PH0  49      // | 49      |            |            |                       |                      |                                   | OSC_IN    |
+#define PH1  50      // | 50      |            |            |                       |                      |                                   | OSC_OUT   |
+//                      |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
 
 /// This must be a literal
 #define NUM_DIGITAL_PINS        51

buildroot/share/PlatformIO/variants/marlin_maple_CHITU_F103/board/board.h

@@ -100,12 +100,12 @@
 /*
  * SDIO Pins
  */
-#define BOARD_SDIO_D0 			PC8
-#define BOARD_SDIO_D1 			PC9
-#define BOARD_SDIO_D2 			PC10
-#define BOARD_SDIO_D3 			PC11
-#define BOARD_SDIO_CLK 			PC12
-#define BOARD_SDIO_CMD 			PD2
+#define BOARD_SDIO_D0           PC8
+#define BOARD_SDIO_D1           PC9
+#define BOARD_SDIO_D2           PC10
+#define BOARD_SDIO_D3           PC11
+#define BOARD_SDIO_CLK          PC12
+#define BOARD_SDIO_CMD          PD2
 
 /* Pin aliases: these give the GPIO port/bit for each pin as an
  * enum. These are optional, but recommended. They make it easier to
@@ -119,117 +119,5 @@ PE0,PE1,PE2,PE3,PE4,PE5,PE6,PE7,PE8,PE9,PE10,PE11,PE12,PE13,PE14,PE15,
 PF0,PF1,PF2,PF3,PF4,PF5,PF6,PF7,PF8,PF9,PF10,PF11,PF12,PF13,PF14,PF15,
 PG0,PG1,PG2,PG3,PG4,PG5,PG6,PG7,PG8,PG9,PG10,PG11,PG12,PG13,PG14,PG15
 };/* Note PB2 is skipped as this is Boot1 and is not going to be much use as its likely to be pulled permanently low */
-/*
-#define PA0 0
-#define PA1 1
-#define PA2 2
-#define PA3 3
-#define PA4 4
-#define PA5 5
-#define PA6 6
-#define PA7 7
-#define PA8 8
-#define PA9 9
-#define PA10 10
-#define PA11 11
-#define PA12 12
-#define PA13 13
-#define PA14 14
-#define PA15 15
-#define PB0 16
-#define PB1 17
-#define PB2 18
-#define PB3 19
-#define PB4 20
-#define PB5 21
-#define PB6 22
-#define PB7 23
-#define PB8 24
-#define PB9 25
-#define PB10 26
-#define PB11 27
-#define PB12 28
-#define PB13 29
-#define PB14 30
-#define PB15 31
-#define PC0 32
-#define PC1 33
-#define PC2 34
-#define PC3 35
-#define PC4 36
-#define PC5 37
-#define PC6 38
-#define PC7 39
-#define PC8 40
-#define PC9 41
-#define PC10 42
-#define PC11 43
-#define PC12 44
-#define PC13 45
-#define PC14 46
-#define PC15 47
-#define PD0 48
-#define PD1 49
-#define PD2 50
-#define PD3 51
-#define PD4 52
-#define PD5 53
-#define PD6 54
-#define PD7 55
-#define PD8 56
-#define PD9 57
-#define PD10 58
-#define PD11 59
-#define PD12 60
-#define PD13 61
-#define PD14 62
-#define PD15 63
-#define PE0 64
-#define PE1 65
-#define PE2 66
-#define PE3 67
-#define PE4 68
-#define PE5 69
-#define PE6 70
-#define PE7 71
-#define PE8 72
-#define PE9 73
-#define PE10 74
-#define PE11 75
-#define PE12 76
-#define PE13 77
-#define PE14 78
-#define PE15 79
-#define PF0 80
-#define PF1 81
-#define PF2 82
-#define PF3 83
-#define PF4 84
-#define PF5 85
-#define PF6 86
-#define PF7 87
-#define PF8 88
-#define PF9 89
-#define PF10 90
-#define PF11 91
-#define PF12 92
-#define PF13 93
-#define PF14 94
-#define PF15 95
-#define PG0 96
-#define PG1 97
-#define PG2 98
-#define PG3 99
-#define PG4 100
-#define PG5 101
-#define PG6 102
-#define PG7 103
-#define PG8 104
-#define PG9 105
-#define PG10 106
-#define PG11 107
-#define PG12 108
-#define PG13 109
-#define PG14 110
-#define PG15 111 */
-#endif
+
+#endif // _BOARDS_GENERIC_STM32F103Z_H_

buildroot/share/PlatformIO/variants/marlin_maple_MEEB_3DP/board/board.h

@@ -100,12 +100,12 @@
 /*
  * SDIO Pins
  */
-#define BOARD_SDIO_D0 			PC8
-#define BOARD_SDIO_D1 			PC9
-#define BOARD_SDIO_D2 			PC10
-#define BOARD_SDIO_D3 			PC11
-#define BOARD_SDIO_CLK 			PC12
-#define BOARD_SDIO_CMD 			PD2
+#define BOARD_SDIO_D0           PC8
+#define BOARD_SDIO_D1           PC9
+#define BOARD_SDIO_D2           PC10
+#define BOARD_SDIO_D3           PC11
+#define BOARD_SDIO_CLK          PC12
+#define BOARD_SDIO_CMD          PD2
 
 /* Pin aliases: these give the GPIO port/bit for each pin as an
  * enum. These are optional, but recommended. They make it easier to

buildroot/share/cmake/CMakeLists.txt

@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 2.8)
+cmake_minimum_required(VERSION 3.5)
 #====================================================================#
 # Usage under Linux:                                                 #
 #                                                                    #
@@ -24,21 +24,67 @@ set(SCRIPT_BRANCH 1.0.2) #Set to wanted marlin-cmake release tag or branch
 
 if(NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake)
 
-	file(DOWNLOAD https://github.com/tohara/marlin-cmake/archive/${SCRIPT_BRANCH}.tar.gz
-	${CMAKE_CURRENT_LIST_DIR}/marlin-cmake-src.tar.gz SHOW_PROGRESS)
+  file(DOWNLOAD https://github.com/tohara/marlin-cmake/archive/${SCRIPT_BRANCH}.tar.gz
+                ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake-src.tar.gz SHOW_PROGRESS)
 
-	execute_process(COMMAND ${CMAKE_COMMAND} -E tar -xvf ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake-src.tar.gz WORKING_DIRECTORY ${CMAKE_CURRENT_LIST_DIR})
-
-	file(RENAME ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake-${SCRIPT_BRANCH} ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake)
-	file(REMOVE ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake-src.tar.gz)
+  execute_process(COMMAND ${CMAKE_COMMAND} -E tar -xvf ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake-src.tar.gz WORKING_DIRECTORY ${CMAKE_CURRENT_LIST_DIR})
 
+  file(RENAME ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake-${SCRIPT_BRANCH} ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake)
+  file(REMOVE ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake-src.tar.gz)
 
 endif()
 
-if(WIN32 AND NOT EXISTS ${CMAKE_BINARY_DIR}/make.exe)
-	file(COPY ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake/resources/make.exe DESTINATION ${CMAKE_BINARY_DIR}/)
+if(NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake/modules/Arduino_SDK.cmake)
+  file(DOWNLOAD https://raw.githubusercontent.com/tohara/marlin-cmake/master/modules/Arduino_SDK.cmake
+                ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake/modules/Arduino_SDK.cmake SHOW_PROGRESS)
 endif()
 
+if(NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake/modules/marlin_cmake_functions.cmake)
+  file(DOWNLOAD https://raw.githubusercontent.com/tohara/marlin-cmake/master/modules/marlin_cmake_functions.cmake
+                ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake/modules/marlin_cmake_functions.cmake SHOW_PROGRESS)
+endif()
+
+if(NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake/Platform/Arduino.cmake)
+  file(DOWNLOAD https://raw.githubusercontent.com/tohara/marlin-cmake/master/Platform/Arduino.cmake
+                ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake/Platform/Arduino.cmake SHOW_PROGRESS)
+endif()
+
+if(NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake/settings/marlin_boards.txt)
+  file(DOWNLOAD https://raw.githubusercontent.com/tohara/marlin-cmake/master/settings/marlin_boards.txt
+                ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake/settings/marlin_boards.txt SHOW_PROGRESS)
+endif()
+
+if(NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake/toolchain/ArduinoToolchain.cmake)
+  file(DOWNLOAD https://raw.githubusercontent.com/tohara/marlin-cmake/master/toolchain/ArduinoToolchain.cmake
+                ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake/toolchain/ArduinoToolchain.cmake SHOW_PROGRESS)
+endif()
+
+if(WIN32)
+  if(NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake/resources/make.exe)
+    file(DOWNLOAD https://raw.githubusercontent.com/tohara/marlin-cmake/master/resources/make.exe
+                  ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake/resources/make.exe SHOW_PROGRESS)
+  endif()
+endif(WIN32)
+
+if(NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/arduino-1.8.19)
+
+  file(DOWNLOAD https://downloads.arduino.cc/arduino-1.8.19-windows.zip
+                ${CMAKE_CURRENT_LIST_DIR}/arduino-1.8.19-windows.zip SHOW_PROGRESS)
+
+  execute_process(COMMAND ${CMAKE_COMMAND} -E tar -xvzf ${CMAKE_CURRENT_LIST_DIR}/arduino-1.8.19-windows.zip WORKING_DIRECTORY ${CMAKE_CURRENT_LIST_DIR})
+
+  file(REMOVE ${CMAKE_CURRENT_LIST_DIR}/arduino-1.8.19-windows.zip)
+
+endif()
+
+# Print CMake version
+message("-- Running CMake version: " ${CMAKE_VERSION})
+
+# Replace the CMake Ver. in the Arduino.cmake
+file(READ "${CMAKE_CURRENT_LIST_DIR}/marlin-cmake/Platform/Arduino.cmake" ORIGINAL_FILE_CONTENTS)
+string(REGEX REPLACE "cmake_minimum_required\\(VERSION[^\n]*\n" "cmake_minimum_required(VERSION 3.5)\n" NEW_FILE_CONTENTS "${ORIGINAL_FILE_CONTENTS}")
+file(WRITE "${CMAKE_CURRENT_LIST_DIR}/marlin-cmake/Platform/Arduino.cmake" "${NEW_FILE_CONTENTS}")
+
 set(CMAKE_MODULE_PATH  ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake/modules)
 
 #====================================================================#
@@ -46,9 +92,10 @@ set(CMAKE_MODULE_PATH  ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_LIST_DIR}/marlin-cma
 #  It can also be set from command line. eg.:                        #
 #  cmake .. -DARDUINO_SDK_PATH="/path/to/arduino-1.x.x"              #
 #====================================================================#
-#set(ARDUINO_SDK_PATH ${CMAKE_CURRENT_LIST_DIR}/arduino-1.6.8)
+set(ARDUINO_SDK_PATH ${CMAKE_CURRENT_LIST_DIR}/arduino-1.8.19)
 #set(ARDUINO_SDK_PATH /Applications/Arduino.app/Contents/Java)
 #set(ARDUINO_SDK_PATH $HOME/ArduinoAddons/Arduino_1.6.x)
+
 #====================================================================#
 #  Set included cmake files                                          #
 #====================================================================#
@@ -62,6 +109,19 @@ set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_LIST_DIR}/marlin-cmake/toolchain/Arduin
 
 #====================================================================#
 #  Setup Project                                                     #
+#                                                                    #
+#  If you receive this error:                                        #
+#   'Unknown CMake command "_cmake_record_install_prefix".'          #
+#                                                                    #
+#   Go to the file in your CMake directory.                          #
+#                                                                    #
+#   For Windows: cmake\Modules\Platform\WindowsPaths.cmake           #
+#   For Linux: cmake/Modules/Platform/UnixPaths.cmake                #
+#                                                                    #
+#   Comment out "_cmake_record_install_prefix()"                     #
+#     - OR -                                                         #
+#   Add "include(CMakeSystemSpecificInformation)" above the line.    #
+#                                                                    #
 #====================================================================#
 project(Marlin C CXX)
 
@@ -79,7 +139,6 @@ project(Marlin C CXX)
 print_board_list()
 print_programmer_list()
 
-
 #====================================================================#
 #  Get motherboard settings from Configuration.h                     #
 #  setup_motherboard(TARGET Marlin_src_folder)                       #
@@ -105,9 +164,9 @@ set(${PROJECT_NAME}_SRCS "${SOURCES};../../../Marlin/Marlin.ino")
 #    cmake .. -DUPLOAD_PORT=/dev/ttyACM0                             #
 #====================================================================#
 if(UPLOAD_PORT)
-	set(${PROJECT_NAME}_PORT ${UPLOAD_PORT})
+  set(${PROJECT_NAME}_PORT ${UPLOAD_PORT})
 else()
-	set(${PROJECT_NAME}_PORT /dev/ttyACM0)
+  set(${PROJECT_NAME}_PORT /dev/ttyACM0)
 endif()
 
 #====================================================================#

buildroot/share/dwin/bin/DWIN_ICO.py

@@ -113,8 +113,7 @@ class DWIN_ICO_File():
             # Seek file position, read length bytes, and write to new output file.
             print('%02d: offset: 0x%06x len: 0x%04x width: %d height: %d' %
                   (count, entry.offset, entry.length, entry.width, entry.height))
-            outfilename = os.path.join(outDir,
-                                       '%03d-%s.jpg' % (count, _iconNames[count]))
+            outfilename = os.path.join(outDir, '%03d-ICON_%s.jpg' % (count, _iconNames7[count]))
             with open(outfilename, 'wb') as outfile:
                 infile.seek(entry.offset)
                 blob = infile.read(entry.length)
@@ -246,97 +245,97 @@ class Entry():
                               0, 0, 0, 0, 0)
         return rawdata
 
-_iconNames = {
-    0 : 'ICON_LOGO',
-    1 : 'ICON_Print_0',
-    2 : 'ICON_Print_1',
-    3 : 'ICON_Prepare_0',
-    4 : 'ICON_Prepare_1',
-    5 : 'ICON_Control_0',
-    6 : 'ICON_Control_1',
-    7 : 'ICON_Leveling_0',
-    8 : 'ICON_Leveling_1',
-    9 : 'ICON_HotendTemp',
-    10 : 'ICON_BedTemp',
-    11 : 'ICON_Speed',
-    12 : 'ICON_Zoffset',
-    13 : 'ICON_Back',
-    14 : 'ICON_File',
-    15 : 'ICON_PrintTime',
-    16 : 'ICON_RemainTime',
-    17 : 'ICON_Setup_0',
-    18 : 'ICON_Setup_1',
-    19 : 'ICON_Pause_0',
-    20 : 'ICON_Pause_1',
-    21 : 'ICON_Continue_0',
-    22 : 'ICON_Continue_1',
-    23 : 'ICON_Stop_0',
-    24 : 'ICON_Stop_1',
-    25 : 'ICON_Bar',
-    26 : 'ICON_More',
-    27 : 'ICON_Axis',
-    28 : 'ICON_CloseMotor',
-    29 : 'ICON_Homing',
-    30 : 'ICON_SetHome',
-    31 : 'ICON_PLAPreheat',
-    32 : 'ICON_ABSPreheat',
-    33 : 'ICON_Cool',
-    34 : 'ICON_Language',
-    35 : 'ICON_MoveX',
-    36 : 'ICON_MoveY',
-    37 : 'ICON_MoveZ',
-    38 : 'ICON_Extruder',
-    # no 39
-    40 : 'ICON_Temperature',
-    41 : 'ICON_Motion',
-    42 : 'ICON_WriteEEPROM',
-    43 : 'ICON_ReadEEPROM',
-    44 : 'ICON_ResumeEEPROM',
-    45 : 'ICON_Info',
-    46 : 'ICON_SetEndTemp',
-    47 : 'ICON_SetBedTemp',
-    48 : 'ICON_FanSpeed',
-    49 : 'ICON_SetPLAPreheat',
-    50 : 'ICON_SetABSPreheat',
-    51 : 'ICON_MaxSpeed',
-    52 : 'ICON_MaxAccelerated',
-    53 : 'ICON_MaxJerk',
-    54 : 'ICON_Step',
-    55 : 'ICON_PrintSize',
-    56 : 'ICON_Version',
-    57 : 'ICON_Contact',
-    58 : 'ICON_StockConfiguraton',
-    59 : 'ICON_MaxSpeedX',
-    60 : 'ICON_MaxSpeedY',
-    61 : 'ICON_MaxSpeedZ',
-    62 : 'ICON_MaxSpeedE',
-    63 : 'ICON_MaxAccX',
-    64 : 'ICON_MaxAccY',
-    65 : 'ICON_MaxAccZ',
-    66 : 'ICON_MaxAccE',
-    67 : 'ICON_MaxSpeedJerkX',
-    68 : 'ICON_MaxSpeedJerkY',
-    69 : 'ICON_MaxSpeedJerkZ',
-    70 : 'ICON_MaxSpeedJerkE',
-    71 : 'ICON_StepX',
-    72 : 'ICON_StepY',
-    73 : 'ICON_StepZ',
-    74 : 'ICON_StepE',
-    75 : 'ICON_Setspeed',
-    76 : 'ICON_SetZOffset',
-    77 : 'ICON_Rectangle',
-    78 : 'ICON_BLTouch',
-    79 : 'ICON_TempTooLow',
-    80 : 'ICON_AutoLeveling',
-    81 : 'ICON_TempTooHigh',
-    82 : 'ICON_NoTips_C',
-    83 : 'ICON_NoTips_E',
-    84 : 'ICON_Continue_C',
-    85 : 'ICON_Continue_E',
-    86 : 'ICON_Cancel_C',
-    87 : 'ICON_Cancel_E',
-    88 : 'ICON_Confirm_C',
-    89 : 'ICON_Confirm_E',
-    90 : 'ICON_Info_0',
-    91 : 'ICON_Info_1'
-    }
+_iconNames7 = {
+     0 : "LOGO_Creality",
+     1 : "Print_0",
+     2 : "Print_1",
+     3 : "Prepare_0",
+     4 : "Prepare_1",
+     5 : "Control_0",
+     6 : "Control_1",
+     7 : "Leveling_0",
+     8 : "Leveling_1",
+     9 : "HotendTemp",
+    10 : "BedTemp",
+    11 : "Speed",
+    12 : "Zoffset",
+    13 : "Back",
+    14 : "File",
+    15 : "PrintTime",
+    16 : "RemainTime",
+    17 : "Setup_0",
+    18 : "Setup_1",
+    19 : "Pause_0",
+    20 : "Pause_1",
+    21 : "Continue_0",
+    22 : "Continue_1",
+    23 : "Stop_0",
+    24 : "Stop_1",
+    25 : "Bar",
+    26 : "More",
+    27 : "Axis",
+    28 : "CloseMotor",
+    29 : "Homing",
+    30 : "SetHome",
+    31 : "PLAPreheat",
+    32 : "ABSPreheat",
+    33 : "Cool",
+    34 : "Language",
+    35 : "MoveX",
+    36 : "MoveY",
+    37 : "MoveZ",
+    38 : "Extruder",
+    # Skip 39
+    40 : "Temperature",
+    41 : "Motion",
+    42 : "WriteEEPROM",
+    43 : "ReadEEPROM",
+    44 : "ResetEEPROM",
+    45 : "Info",
+    46 : "SetEndTemp",
+    47 : "SetBedTemp",
+    48 : "FanSpeed",
+    49 : "SetPLAPreheat",
+    50 : "SetABSPreheat",
+    51 : "MaxSpeed",
+    52 : "MaxAccelerated",
+    53 : "MaxJerk",
+    54 : "Step",
+    55 : "PrintSize",
+    56 : "Version",
+    57 : "Contact",
+    58 : "StockConfiguraton",
+    59 : "MaxSpeedX",
+    60 : "MaxSpeedY",
+    61 : "MaxSpeedZ",
+    62 : "MaxSpeedE",
+    63 : "MaxAccX",
+    64 : "MaxAccY",
+    65 : "MaxAccZ",
+    66 : "MaxAccE",
+    67 : "MaxSpeedJerkX",
+    68 : "MaxSpeedJerkY",
+    69 : "MaxSpeedJerkZ",
+    70 : "MaxSpeedJerkE",
+    71 : "StepX",
+    72 : "StepY",
+    73 : "StepZ",
+    74 : "StepE",
+    75 : "Setspeed",
+    76 : "SetZOffset",
+    77 : "Rectangle",
+    78 : "BLTouch",
+    79 : "TempTooLow",
+    80 : "AutoLeveling",
+    81 : "TempTooHigh",
+    82 : "NoTips_C",
+    83 : "NoTips_E",
+    84 : "Continue_C",
+    85 : "Continue_E",
+    86 : "Cancel_C",
+    87 : "Cancel_E",
+    88 : "Confirm_C",
+    89 : "Confirm_E",
+    90 : "Info_0",
+    91 : "Info_1"
+}