Merge upstream changes from Marlin 2.1.2.1
This commit is contained in:
@@ -3,7 +3,7 @@
|
||||
"core": "stm32",
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"cpu": "cortex-m7",
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"extra_flags": "-DSTM32H743xx",
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"f_cpu": "400000000L",
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||||
"f_cpu": "480000000L",
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"mcu": "stm32h743iit6",
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||||
"variant": "MARLIN_BTT_SKR_SE_BX"
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},
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||||
|
@@ -55,7 +55,7 @@
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"dfu",
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"jlink"
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],
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||||
"offset_address": "0x8008000",
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||||
"offset_address": "0x8008000",
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||||
"require_upload_port": true,
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||||
"use_1200bps_touch": false,
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||||
"wait_for_upload_port": false
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||||
|
65
buildroot/share/PlatformIO/boards/marlin_MKS_ROBIN2.json
Normal file
65
buildroot/share/PlatformIO/boards/marlin_MKS_ROBIN2.json
Normal file
@@ -0,0 +1,65 @@
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{
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"build": {
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"cpu": "cortex-m4",
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"extra_flags": "-DSTM32F407xx",
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"f_cpu": "168000000L",
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"hwids": [
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[
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"0x1EAF",
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"0x0003"
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],
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[
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"0x0483",
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"0x3748"
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]
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],
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"ldscript": "ldscript.ld",
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"mcu": "stm32f407zet6",
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"variant": "MARLIN_MKS_ROBIN2"
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},
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"debug": {
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"jlink_device": "STM32F407ZE",
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"openocd_target": "stm32f4x",
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"svd_path": "STM32F40x.svd",
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"tools": {
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"stlink": {
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"server": {
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"arguments": [
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"-f",
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"scripts/interface/stlink.cfg",
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"-c",
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"transport select hla_swd",
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"-f",
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"scripts/target/stm32f4x.cfg",
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"-c",
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"reset_config none"
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],
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"executable": "bin/openocd",
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"package": "tool-openocd"
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}
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}
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}
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},
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"frameworks": [
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"arduino",
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"stm32cube"
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],
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"name": "STM32F407ZE (192k RAM. 512k Flash)",
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"upload": {
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"disable_flushing": false,
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"maximum_ram_size": 131072,
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"maximum_size": 514288,
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"protocol": "stlink",
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"protocols": [
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"stlink",
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"dfu",
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"jlink",
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"cmsis-dap"
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],
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"require_upload_port": true,
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"use_1200bps_touch": false,
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"wait_for_upload_port": false
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},
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"url": "http://www.st.com/en/microcontrollers/stm32f407ze.html",
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"vendor": "Generic"
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}
|
47
buildroot/share/PlatformIO/boards/marlin_STM32G0B1VE.json
Normal file
47
buildroot/share/PlatformIO/boards/marlin_STM32G0B1VE.json
Normal file
@@ -0,0 +1,47 @@
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{
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"build": {
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"core": "stm32",
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"cpu": "cortex-m0plus",
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"extra_flags": "-DSTM32G0xx -DSTM32G0B1xx",
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"f_cpu": "64000000L",
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"framework_extra_flags": {
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"arduino": "-D__CORTEX_SC=0"
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},
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"mcu": "stm32g0b1vet6",
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"product_line": "STM32G0B1xx",
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"variant": "MARLIN_G0B1VE"
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},
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"debug": {
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"default_tools": [
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"stlink"
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],
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"jlink_device": "STM32G0B1VE",
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"onboard_tools": [
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"stlink"
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],
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"openocd_target": "stm32g0x",
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"svd_path": "STM32G0B1.svd"
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},
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"frameworks": [
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"arduino",
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"cmsis",
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"libopencm3",
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"stm32cube",
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"zephyr"
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||||
],
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||||
"name": "STM32G0B1VE",
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"upload": {
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"maximum_ram_size": 147456,
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"maximum_size": 524288,
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"protocol": "stlink",
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"protocols": [
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"stlink",
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"jlink",
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"cmsis-dap",
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"blackmagic",
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"mbed"
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||||
]
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},
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"url": "https://www.st.com/content/st_com/en/products/microcontrollers-microprocessors/stm32-32-bit-arm-cortex-mcus/stm32-mainstream-mcus/stm32g0-series/stm32g0x1.html",
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"vendor": "ST"
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||||
}
|
61
buildroot/share/PlatformIO/boards/marlin_STM32H723Vx.json
Normal file
61
buildroot/share/PlatformIO/boards/marlin_STM32H723Vx.json
Normal file
@@ -0,0 +1,61 @@
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{
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"build": {
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"core": "stm32",
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"cpu": "cortex-m7",
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"extra_flags": "-DSTM32H7xx -DSTM32H723xx",
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"f_cpu": "550000000L",
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"mcu": "stm32h723vet6",
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"product_line": "STM32H723xx",
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"variant": "MARLIN_H723Vx"
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},
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"connectivity": [
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"can",
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"ethernet"
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],
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"debug": {
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"jlink_device": "STM32H723VE",
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"openocd_target": "stm32h7x",
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"svd_path": "STM32H7x3.svd",
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"tools": {
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"stlink": {
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"server": {
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"arguments": [
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"-f",
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"scripts/interface/stlink.cfg",
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"-c",
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"transport select hla_swd",
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"-f",
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"scripts/target/stm32h7x.cfg",
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"-c",
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"reset_config none"
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],
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"executable": "bin/openocd",
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"package": "tool-openocd"
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}
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}
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}
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},
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"frameworks": [
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"arduino",
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"stm32cube"
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],
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"name": "STM32H723VE (564k RAM. 512k Flash)",
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||||
"upload": {
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||||
"disable_flushing": false,
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"maximum_ram_size": 577536,
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"maximum_size": 524288,
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"protocol": "stlink",
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"protocols": [
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"stlink",
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"dfu",
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"jlink",
|
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"cmsis-dap"
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],
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"offset_address": "0x8020000",
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"require_upload_port": true,
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"use_1200bps_touch": false,
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"wait_for_upload_port": false
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},
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"url": "https://www.st.com/en/microcontrollers-microprocessors/stm32h723ze.html",
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"vendor": "ST"
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||||
}
|
61
buildroot/share/PlatformIO/boards/marlin_STM32H723Zx.json
Normal file
61
buildroot/share/PlatformIO/boards/marlin_STM32H723Zx.json
Normal file
@@ -0,0 +1,61 @@
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{
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"build": {
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"core": "stm32",
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"cpu": "cortex-m7",
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"extra_flags": "-DSTM32H7xx -DSTM32H723xx",
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"f_cpu": "550000000L",
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"mcu": "stm32h723zet6",
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"product_line": "STM32H723xx",
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"variant": "MARLIN_H723Zx"
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},
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"connectivity": [
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"can",
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"ethernet"
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],
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"debug": {
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"jlink_device": "STM32H723ZE",
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"openocd_target": "stm32h7x",
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"svd_path": "STM32H7x3.svd",
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"tools": {
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"stlink": {
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"server": {
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"arguments": [
|
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"-f",
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"scripts/interface/stlink.cfg",
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"-c",
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"transport select hla_swd",
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"-f",
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"scripts/target/stm32h7x.cfg",
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"-c",
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"reset_config none"
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],
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"executable": "bin/openocd",
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||||
"package": "tool-openocd"
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||||
}
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||||
}
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||||
}
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||||
},
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||||
"frameworks": [
|
||||
"arduino",
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"stm32cube"
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],
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"name": "STM32H723ZE (564k RAM. 512k Flash)",
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"upload": {
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"disable_flushing": false,
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||||
"maximum_ram_size": 577536,
|
||||
"maximum_size": 524288,
|
||||
"protocol": "stlink",
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||||
"protocols": [
|
||||
"stlink",
|
||||
"dfu",
|
||||
"jlink",
|
||||
"cmsis-dap"
|
||||
],
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||||
"offset_address": "0x8020000",
|
||||
"require_upload_port": true,
|
||||
"use_1200bps_touch": false,
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||||
"wait_for_upload_port": false
|
||||
},
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||||
"url": "https://www.st.com/en/microcontrollers-microprocessors/stm32h723ze.html",
|
||||
"vendor": "ST"
|
||||
}
|
14
buildroot/share/PlatformIO/ldscripts/sovol.ld
Normal file
14
buildroot/share/PlatformIO/ldscripts/sovol.ld
Normal file
@@ -0,0 +1,14 @@
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MEMORY
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{
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ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K - 40
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rom (rx) : ORIGIN = 0x08007000, LENGTH = 512K - 28K
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}
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/* Provide memory region aliases for common.inc */
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REGION_ALIAS("REGION_TEXT", rom);
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REGION_ALIAS("REGION_DATA", ram);
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REGION_ALIAS("REGION_BSS", ram);
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REGION_ALIAS("REGION_RODATA", rom);
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|
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/* Let common.inc handle the real work. */
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INCLUDE common.inc
|
@@ -60,13 +60,14 @@ if pioutil.is_pio_build():
|
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for line in atoms:
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parts = line.split('=')
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name = parts.pop(0)
|
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if name in ['build_flags', 'extra_scripts', 'src_filter', 'lib_ignore']:
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if name in ['build_flags', 'extra_scripts', 'build_src_filter', 'lib_ignore']:
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feat[name] = '='.join(parts)
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blab("[%s] %s=%s" % (feature, name, feat[name]), 3)
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else:
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for dep in re.split(r',\s*', line):
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lib_name = re.sub(r'@([~^]|[<>]=?)?[\d.]+', '', dep.strip()).split('=').pop(0)
|
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lib_re = re.compile('(?!^' + lib_name + '\\b)')
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||||
if not 'lib_deps' in feat: feat['lib_deps'] = {}
|
||||
feat['lib_deps'] = list(filter(lib_re.match, feat['lib_deps'])) + [dep]
|
||||
blab("[%s] lib_deps = %s" % (feature, dep), 3)
|
||||
|
||||
@@ -171,19 +172,19 @@ if pioutil.is_pio_build():
|
||||
blab("Running extra_scripts for %s... " % feature, 2)
|
||||
env.SConscript(feat['extra_scripts'], exports="env")
|
||||
|
||||
if 'src_filter' in feat:
|
||||
if 'build_src_filter' in feat:
|
||||
blab("========== Adding build_src_filter for %s... " % feature, 2)
|
||||
src_filter = ' '.join(env.GetProjectOption('src_filter'))
|
||||
build_src_filter = ' '.join(env.GetProjectOption('build_src_filter'))
|
||||
# first we need to remove the references to the same folder
|
||||
my_srcs = re.findall(r'[+-](<.*?>)', feat['src_filter'])
|
||||
cur_srcs = re.findall(r'[+-](<.*?>)', src_filter)
|
||||
my_srcs = re.findall(r'[+-](<.*?>)', feat['build_src_filter'])
|
||||
cur_srcs = re.findall(r'[+-](<.*?>)', build_src_filter)
|
||||
for d in my_srcs:
|
||||
if d in cur_srcs:
|
||||
src_filter = re.sub(r'[+-]' + d, '', src_filter)
|
||||
build_src_filter = re.sub(r'[+-]' + d, '', build_src_filter)
|
||||
|
||||
src_filter = feat['src_filter'] + ' ' + src_filter
|
||||
set_env_field('build_src_filter', [src_filter])
|
||||
env.Replace(SRC_FILTER=src_filter)
|
||||
build_src_filter = feat['build_src_filter'] + ' ' + build_src_filter
|
||||
set_env_field('build_src_filter', [build_src_filter])
|
||||
env.Replace(SRC_FILTER=build_src_filter)
|
||||
|
||||
if 'lib_ignore' in feat:
|
||||
blab("========== Adding lib_ignore for %s... " % feature, 2)
|
||||
|
@@ -18,7 +18,16 @@ def apply_opt(name, val, conf=None):
|
||||
if name == "lcd": name, val = val, "on"
|
||||
|
||||
# Create a regex to match the option and capture parts of the line
|
||||
regex = re.compile(rf'^(\s*)(//\s*)?(#define\s+)({name}\b)(\s*)(.*?)(\s*)(//.*)?$', re.IGNORECASE)
|
||||
# 1: Indentation
|
||||
# 2: Comment
|
||||
# 3: #define and whitespace
|
||||
# 4: Option name
|
||||
# 5: First space after name
|
||||
# 6: Remaining spaces between name and value
|
||||
# 7: Option value
|
||||
# 8: Whitespace after value
|
||||
# 9: End comment
|
||||
regex = re.compile(rf'^(\s*)(//\s*)?(#define\s+)({name}\b)(\s?)(\s*)(.*?)(\s*)(//.*)?$', re.IGNORECASE)
|
||||
|
||||
# Find and enable and/or update all matches
|
||||
for file in ("Configuration.h", "Configuration_adv.h"):
|
||||
@@ -37,10 +46,11 @@ def apply_opt(name, val, conf=None):
|
||||
newline = re.sub(r'^(\s*)(#define)(\s{1,3})?(\s*)', r'\1//\2 \4', line)
|
||||
else:
|
||||
# For options with values, enable and set the value
|
||||
newline = match[1] + match[3] + match[4] + match[5] + val
|
||||
if match[8]:
|
||||
sp = match[7] if match[7] else ' '
|
||||
newline += sp + match[8]
|
||||
addsp = '' if match[5] else ' '
|
||||
newline = match[1] + match[3] + match[4] + match[5] + addsp + val + match[6]
|
||||
if match[9]:
|
||||
sp = match[8] if match[8] else ' '
|
||||
newline += sp + match[9]
|
||||
lines[i] = newline
|
||||
blab(f"Set {name} to {val}")
|
||||
|
||||
@@ -85,12 +95,12 @@ def apply_opt(name, val, conf=None):
|
||||
# Return True if any files were fetched.
|
||||
def fetch_example(url):
|
||||
if url.endswith("/"): url = url[:-1]
|
||||
if url.startswith('http'):
|
||||
url = url.replace("%", "%25").replace(" ", "%20")
|
||||
else:
|
||||
if not url.startswith('http'):
|
||||
brch = "bugfix-2.1.x"
|
||||
if '@' in path: path, brch = map(str.strip, path.split('@'))
|
||||
if '@' in url: url, brch = map(str.strip, url.split('@'))
|
||||
if url == 'examples/default': url = 'default'
|
||||
url = f"https://raw.githubusercontent.com/MarlinFirmware/Configurations/{brch}/config/{url}"
|
||||
url = url.replace("%", "%25").replace(" ", "%20")
|
||||
|
||||
# Find a suitable fetch command
|
||||
if shutil.which("curl") is not None:
|
||||
@@ -104,7 +114,7 @@ def fetch_example(url):
|
||||
import os
|
||||
|
||||
# Reset configurations to default
|
||||
os.system("git reset --hard HEAD")
|
||||
os.system("git checkout HEAD Marlin/*.h")
|
||||
|
||||
# Try to fetch the remote files
|
||||
gotfile = False
|
||||
@@ -180,10 +190,11 @@ def apply_config_ini(cp):
|
||||
# For a key ending in .ini load and parse another .ini file
|
||||
if ckey.endswith('.ini'):
|
||||
sect = 'base'
|
||||
if '@' in ckey: sect, ckey = ckey.split('@')
|
||||
other_ini = configparser.ConfigParser()
|
||||
other_ini.read(config_path(ckey))
|
||||
apply_sections(other_ini, sect)
|
||||
if '@' in ckey: sect, ckey = map(str.strip, ckey.split('@'))
|
||||
cp2 = configparser.ConfigParser()
|
||||
cp2.read(config_path(ckey))
|
||||
apply_sections(cp2, sect)
|
||||
ckey = 'base';
|
||||
|
||||
# (Allow 'example/' as a shortcut for 'examples/')
|
||||
elif ckey.startswith('example/'):
|
||||
@@ -191,11 +202,11 @@ def apply_config_ini(cp):
|
||||
|
||||
# For 'examples/<path>' fetch an example set from GitHub.
|
||||
# For https?:// do a direct fetch of the URL.
|
||||
elif ckey.startswith('examples/') or ckey.startswith('http'):
|
||||
if ckey.startswith('examples/') or ckey.startswith('http'):
|
||||
fetch_example(ckey)
|
||||
ckey = 'base'
|
||||
|
||||
elif ckey == 'all':
|
||||
if ckey == 'all':
|
||||
apply_sections(cp)
|
||||
|
||||
else:
|
||||
|
@@ -16,7 +16,8 @@ def copytree(src, dst, symlinks=False, ignore=None):
|
||||
shutil.copy2(item, dst / item.name)
|
||||
|
||||
def replace_define(field, value):
|
||||
for define in env['CPPDEFINES']:
|
||||
envdefs = env['CPPDEFINES'].copy()
|
||||
for define in envdefs:
|
||||
if define[0] == field:
|
||||
env['CPPDEFINES'].remove(define)
|
||||
env['CPPDEFINES'].append((field, value))
|
||||
|
@@ -124,4 +124,15 @@ if pioutil.is_pio_build():
|
||||
err = "ERROR: Old files fell into your Marlin folder. Remove %s and try again" % ", ".join(mixedin)
|
||||
raise SystemExit(err)
|
||||
|
||||
#
|
||||
# Check FILAMENT_RUNOUT_SCRIPT has a %c parammeter when required
|
||||
#
|
||||
if 'FILAMENT_RUNOUT_SENSOR' in env['MARLIN_FEATURES'] and 'NUM_RUNOUT_SENSORS' in env['MARLIN_FEATURES']:
|
||||
if env['MARLIN_FEATURES']['NUM_RUNOUT_SENSORS'].isdigit() and int(env['MARLIN_FEATURES']['NUM_RUNOUT_SENSORS']) > 1:
|
||||
if 'FILAMENT_RUNOUT_SCRIPT' in env['MARLIN_FEATURES']:
|
||||
frs = env['MARLIN_FEATURES']['FILAMENT_RUNOUT_SCRIPT']
|
||||
if "M600" in frs and "%c" not in frs:
|
||||
err = "ERROR: FILAMENT_RUNOUT_SCRIPT needs a %c parameter (e.g., \"M600 T%c\") when NUM_RUNOUT_SENSORS is > 1"
|
||||
raise SystemExit(err)
|
||||
|
||||
sanity_check_target()
|
||||
|
@@ -39,9 +39,9 @@ def get_file_sha256sum(filepath):
|
||||
# Compress a JSON file into a zip file
|
||||
#
|
||||
import zipfile
|
||||
def compress_file(filepath, outpath):
|
||||
def compress_file(filepath, storedname, outpath):
|
||||
with zipfile.ZipFile(outpath, 'w', compression=zipfile.ZIP_BZIP2, compresslevel=9) as zipf:
|
||||
zipf.write(filepath, compress_type=zipfile.ZIP_BZIP2, compresslevel=9)
|
||||
zipf.write(filepath, arcname=storedname, compress_type=zipfile.ZIP_BZIP2, compresslevel=9)
|
||||
|
||||
#
|
||||
# Compute the build signature. The idea is to extract all defines in the configuration headers
|
||||
@@ -71,7 +71,7 @@ def compute_build_signature(env):
|
||||
conf = json.load(infile)
|
||||
if conf['__INITIAL_HASH'] == hashes:
|
||||
# Same configuration, skip recomputing the building signature
|
||||
compress_file(marlin_json, marlin_zip)
|
||||
compress_file(marlin_json, 'marlin_config.json', marlin_zip)
|
||||
return
|
||||
except:
|
||||
pass
|
||||
@@ -255,7 +255,7 @@ def compute_build_signature(env):
|
||||
return
|
||||
|
||||
# Compress the JSON file as much as we can
|
||||
compress_file(marlin_json, marlin_zip)
|
||||
compress_file(marlin_json, 'marlin_config.json', marlin_zip)
|
||||
|
||||
# Generate a C source file for storing this array
|
||||
with open('Marlin/src/mczip.h','wb') as result_file:
|
||||
|
@@ -24,10 +24,10 @@
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
/** Frequency of the board main oscillator */
|
||||
#define VARIANT_MAINOSC 12000000
|
||||
#define VARIANT_MAINOSC 12000000
|
||||
|
||||
/** Master clock frequency */
|
||||
#define VARIANT_MCK 84000000
|
||||
#define VARIANT_MCK 84000000
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Headers
|
||||
@@ -119,13 +119,13 @@ extern "C"{
|
||||
#define BOARD_SPI_DEFAULT_SS BOARD_SPI_SS3
|
||||
|
||||
#define BOARD_PIN_TO_SPI_PIN(x) \
|
||||
(x==BOARD_SPI_SS0 ? PIN_SPI_SS0 : \
|
||||
(x==BOARD_SPI_SS1 ? PIN_SPI_SS1 : \
|
||||
(x==BOARD_SPI_SS2 ? PIN_SPI_SS2 : PIN_SPI_SS3 )))
|
||||
(x==BOARD_SPI_SS0 ? PIN_SPI_SS0 : \
|
||||
(x==BOARD_SPI_SS1 ? PIN_SPI_SS1 : \
|
||||
(x==BOARD_SPI_SS2 ? PIN_SPI_SS2 : PIN_SPI_SS3 )))
|
||||
#define BOARD_PIN_TO_SPI_CHANNEL(x) \
|
||||
(x==BOARD_SPI_SS0 ? 0 : \
|
||||
(x==BOARD_SPI_SS1 ? 1 : \
|
||||
(x==BOARD_SPI_SS2 ? 2 : 3)))
|
||||
(x==BOARD_SPI_SS0 ? 0 : \
|
||||
(x==BOARD_SPI_SS1 ? 1 : \
|
||||
(x==BOARD_SPI_SS2 ? 2 : 3)))
|
||||
|
||||
static const uint8_t SS = BOARD_SPI_SS0;
|
||||
static const uint8_t SS1 = BOARD_SPI_SS1;
|
||||
@@ -195,7 +195,7 @@ static const uint8_t DAC0 = 66;
|
||||
static const uint8_t DAC1 = 67;
|
||||
static const uint8_t CANRX = 68;
|
||||
static const uint8_t CANTX = 69;
|
||||
#define ADC_RESOLUTION 12
|
||||
#define ADC_RESOLUTION 12
|
||||
|
||||
/*
|
||||
* Complementary CAN pins
|
||||
@@ -212,21 +212,21 @@ static const uint8_t CAN1TX = 89;
|
||||
/*
|
||||
* DACC
|
||||
*/
|
||||
#define DACC_INTERFACE DACC
|
||||
#define DACC_INTERFACE_ID ID_DACC
|
||||
#define DACC_RESOLUTION 12
|
||||
#define DACC_INTERFACE DACC
|
||||
#define DACC_INTERFACE_ID ID_DACC
|
||||
#define DACC_RESOLUTION 12
|
||||
#define DACC_ISR_HANDLER DACC_Handler
|
||||
#define DACC_ISR_ID DACC_IRQn
|
||||
|
||||
/*
|
||||
* PWM
|
||||
*/
|
||||
#define PWM_INTERFACE PWM
|
||||
#define PWM_INTERFACE_ID ID_PWM
|
||||
#define PWM_FREQUENCY 31000
|
||||
#define PWM_MAX_DUTY_CYCLE 255
|
||||
#define PWM_MIN_DUTY_CYCLE 0
|
||||
#define PWM_RESOLUTION 8
|
||||
#define PWM_INTERFACE PWM
|
||||
#define PWM_INTERFACE_ID ID_PWM
|
||||
#define PWM_FREQUENCY 31000
|
||||
#define PWM_MAX_DUTY_CYCLE 255
|
||||
#define PWM_MIN_DUTY_CYCLE 0
|
||||
#define PWM_RESOLUTION 8
|
||||
|
||||
/*
|
||||
* TC
|
||||
@@ -236,7 +236,7 @@ static const uint8_t CAN1TX = 89;
|
||||
#define TC_FREQUENCY 100000
|
||||
#define TC_MAX_DUTY_CYCLE 255
|
||||
#define TC_MIN_DUTY_CYCLE 0
|
||||
#define TC_RESOLUTION 8
|
||||
#define TC_RESOLUTION 8
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
@@ -281,4 +281,3 @@ extern USARTClass Serial3;
|
||||
#define SERIAL_PORT_HARDWARE3 Serial3
|
||||
|
||||
#endif /* _VARIANT_ARDUINO_DUE_X_ */
|
||||
|
||||
|
@@ -121,6 +121,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
@@ -272,6 +272,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
@@ -267,6 +267,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
@@ -280,7 +280,7 @@ extern "C" {
|
||||
#define PIN_SERIAL_TX PA9
|
||||
|
||||
// Optional PIN_SERIALn_RX and PIN_SERIALn_TX where 'n' is the U(S)ART number
|
||||
// Used when user instantiate a hardware Serial using its peripheral name.
|
||||
// Used when the user instantiates a hardware Serial using its peripheral name.
|
||||
// Example: HardwareSerial mySerial(USART3);
|
||||
// will use PIN_SERIAL3_RX and PIN_SERIAL3_TX if defined.
|
||||
#define PIN_SERIAL1_RX PA10
|
||||
@@ -295,6 +295,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
@@ -280,7 +280,7 @@ extern "C" {
|
||||
#define PIN_SERIAL_TX PA9
|
||||
|
||||
// Optional PIN_SERIALn_RX and PIN_SERIALn_TX where 'n' is the U(S)ART number
|
||||
// Used when user instantiate a hardware Serial using its peripheral name.
|
||||
// Used when the user instantiates a hardware Serial using its peripheral name.
|
||||
// Example: HardwareSerial mySerial(USART3);
|
||||
// will use PIN_SERIAL3_RX and PIN_SERIAL3_TX if defined.
|
||||
#define PIN_SERIAL1_RX PA10
|
||||
@@ -295,6 +295,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
@@ -155,6 +155,8 @@
|
||||
#define SERIAL_UART_INSTANCE 4
|
||||
#endif
|
||||
|
||||
#define FLASH_BANK_NUMBER FLASH_BANK_1
|
||||
|
||||
// Default pin used for generic 'Serial' instance
|
||||
// Mandatory for Firmata
|
||||
#ifndef PIN_SERIAL_RX
|
||||
|
@@ -195,6 +195,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
@@ -112,7 +112,7 @@ extern "C" {
|
||||
#define PIN_SERIAL_RX PA10
|
||||
#define PIN_SERIAL_TX PA9
|
||||
|
||||
// Used when user instanciate a hardware Serial using its peripheral name.
|
||||
// Used when the user instantiates a hardware Serial using its peripheral name.
|
||||
// Example: HardwareSerial mySerial(USART3);
|
||||
// will use PIN_SERIAL3_RX and PIN_SERIAL3_TX if defined.
|
||||
#define PIN_SERIAL1_RX PA10
|
||||
@@ -123,6 +123,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
@@ -148,4 +149,4 @@ extern "C" {
|
||||
#define SERIAL_PORT_HARDWARE_OPEN Serial2
|
||||
#endif
|
||||
|
||||
#endif /* _VARIANT_ARDUINO_STM32_ */
|
||||
#endif /* _VARIANT_ARDUINO_STM32_ */
|
||||
|
@@ -148,6 +148,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
@@ -148,6 +148,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
@@ -4,7 +4,7 @@
|
||||
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32F103V(8/B/C/E/F/GTx Device from STM32F1 series
|
||||
** 64/128/256/512/768/1024Kbytes FLASH
|
||||
@@ -54,15 +54,15 @@
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x20000000 + LD_MAX_DATA_SIZE; /* end of "RAM" Ram type memory */
|
||||
_estack = 0x20000000 + LD_MAX_DATA_SIZE; /* end of "RAM" Ram type memory */
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
|
||||
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
|
||||
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
@@ -103,9 +103,9 @@ SECTIONS
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(4);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(4);
|
||||
. = ALIGN(4);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
.ARM : {
|
||||
. = ALIGN(4);
|
||||
|
@@ -158,6 +158,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
@@ -1,10 +1,9 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32F103Z(C/D/E/G/GTx Device from STM32F1 series
|
||||
** 256/386/512K/786/1024bytes FLASH
|
||||
@@ -54,7 +53,7 @@
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x20000000 + LD_MAX_DATA_SIZE; /* end of "RAM" Ram type memory */
|
||||
_estack = 0x20000000 + LD_MAX_DATA_SIZE; /* end of "RAM" Ram type memory */
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
@@ -62,7 +61,7 @@ _Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
|
||||
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
|
||||
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
@@ -103,9 +102,9 @@ SECTIONS
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(4);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(4);
|
||||
. = ALIGN(4);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
.ARM : {
|
||||
. = ALIGN(4);
|
||||
|
@@ -205,6 +205,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
@@ -28,10 +28,10 @@
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
|
@@ -326,6 +326,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
@@ -159,6 +159,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
@@ -173,15 +173,15 @@ uint32_t myvar[] = {1,2,3,4,5,6,7,8};
|
||||
void myshow(int fre, int times) // YSZ-WORK
|
||||
{
|
||||
uint32_t index = 10;
|
||||
RCC->AHB1ENR |= 1 << 6; // port G clock
|
||||
GPIOG->MODER &= ~(3UL << 2 * index); // clear old mode
|
||||
GPIOG->MODER |= 1 << 2 * index; // mode is output
|
||||
GPIOG->OSPEEDR &= ~(3UL << 2 * index) // Clear old output speed
|
||||
GPIOG->OSPEEDR |= 2 << 2 * index; // Set output speed
|
||||
GPIOG->OTYPER &= ~(1UL << index) // clear old output
|
||||
GPIOG->OTYPER |= 0 << index; // Set the output mode to push-pull
|
||||
GPIOG->PUPDR &= ~(3 << 2 * index) // Clear the original settings first
|
||||
GPIOG->PUPDR |= 1 << 2 * index; // Set new up and down
|
||||
RCC->AHB1ENR |= 1 << 6; // port G clock
|
||||
GPIOG->MODER &= ~(3UL << 2 * index); // clear old mode
|
||||
GPIOG->MODER |= 1 << 2 * index; // mode is output
|
||||
GPIOG->OSPEEDR &= ~(3UL << 2 * index); // Clear old output speed
|
||||
GPIOG->OSPEEDR |= 2 << 2 * index; // Set output speed
|
||||
GPIOG->OTYPER &= ~(1UL << index); // clear old output
|
||||
GPIOG->OTYPER |= 0 << index; // Set the output mode to push-pull
|
||||
GPIOG->PUPDR &= ~(3 << 2 * index); // Clear the original settings first
|
||||
GPIOG->PUPDR |= 1 << 2 * index; // Set new up and down
|
||||
while (times != 0) {
|
||||
GPIOG->BSRR = 1UL << index;
|
||||
for (int i = 0; i < fre; i++)
|
||||
|
@@ -176,6 +176,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
@@ -37,121 +37,120 @@ extern "C" {
|
||||
* Pins
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
#define PA1 0
|
||||
#define PA2 1
|
||||
#define PA3 2
|
||||
#define PA4 3
|
||||
#define PA5 4
|
||||
#define PA6 5
|
||||
#define PA7 6
|
||||
#define PA8 7
|
||||
#define PA9 8
|
||||
#define PA10 9
|
||||
#define PA11 10
|
||||
#define PA12 11
|
||||
#define PA13 12
|
||||
#define PA14 13
|
||||
#define PA15 14
|
||||
#define PB0 15
|
||||
#define PB1 16
|
||||
#define PB2 17
|
||||
#define PB3 18
|
||||
#define PB4 19
|
||||
#define PB5 20
|
||||
#define PB6 21
|
||||
#define PB7 22
|
||||
#define PB8 23
|
||||
#define PB9 24
|
||||
#define PB10 25
|
||||
#define PB11 26
|
||||
#define PB12 27
|
||||
#define PB13 28
|
||||
#define PB14 29
|
||||
#define PB15 30
|
||||
#define PC2 31
|
||||
#define PC3 32
|
||||
#define PC4 33
|
||||
#define PC5 34
|
||||
#define PC6 35
|
||||
#define PC7 36
|
||||
#define PC8 37
|
||||
#define PC9 38
|
||||
#define PC10 39
|
||||
#define PC11 40
|
||||
#define PC12 41
|
||||
#define PC13 42
|
||||
#define PC14 43
|
||||
#define PC15 44
|
||||
#define PD0 45
|
||||
#define PD1 46
|
||||
#define PD2 47
|
||||
#define PD3 48
|
||||
#define PD4 49
|
||||
#define PD5 50
|
||||
#define PD6 51
|
||||
#define PD7 52
|
||||
#define PD8 53
|
||||
#define PD9 54
|
||||
#define PD10 55
|
||||
#define PD11 56
|
||||
#define PD12 57
|
||||
#define PD13 58
|
||||
#define PD14 59
|
||||
#define PD15 60
|
||||
#define PE0 61
|
||||
#define PE1 62
|
||||
#define PE11 63
|
||||
#define PE3 64
|
||||
#define PE4 65
|
||||
#define PE5 66
|
||||
#define PE6 67
|
||||
#define PE7 68
|
||||
#define PE8 69
|
||||
#define PE9 70
|
||||
#define PE10 71
|
||||
#define PA1 0
|
||||
#define PA2 1
|
||||
#define PA3 2
|
||||
#define PA4 3
|
||||
#define PA5 4
|
||||
#define PA6 5
|
||||
#define PA7 6
|
||||
#define PA8 7
|
||||
#define PA9 8
|
||||
#define PA10 9
|
||||
#define PA11 10
|
||||
#define PA12 11
|
||||
#define PA13 12
|
||||
#define PA14 13
|
||||
#define PA15 14
|
||||
#define PB0 15
|
||||
#define PB1 16
|
||||
#define PB2 17
|
||||
#define PB3 18
|
||||
#define PB4 19
|
||||
#define PB5 20
|
||||
#define PB6 21
|
||||
#define PB7 22
|
||||
#define PB8 23
|
||||
#define PB9 24
|
||||
#define PB10 25
|
||||
#define PB11 26
|
||||
#define PB12 27
|
||||
#define PB13 28
|
||||
#define PB14 29
|
||||
#define PB15 30
|
||||
#define PC2 31
|
||||
#define PC3 32
|
||||
#define PC4 33
|
||||
#define PC5 34
|
||||
#define PC6 35
|
||||
#define PC7 36
|
||||
#define PC8 37
|
||||
#define PC9 38
|
||||
#define PC10 39
|
||||
#define PC11 40
|
||||
#define PC12 41
|
||||
#define PC13 42
|
||||
#define PC14 43
|
||||
#define PC15 44
|
||||
#define PD0 45
|
||||
#define PD1 46
|
||||
#define PD2 47
|
||||
#define PD3 48
|
||||
#define PD4 49
|
||||
#define PD5 50
|
||||
#define PD6 51
|
||||
#define PD7 52
|
||||
#define PD8 53
|
||||
#define PD9 54
|
||||
#define PD10 55
|
||||
#define PD11 56
|
||||
#define PD12 57
|
||||
#define PD13 58
|
||||
#define PD14 59
|
||||
#define PD15 60
|
||||
#define PE0 61
|
||||
#define PE1 62
|
||||
#define PE11 63
|
||||
#define PE3 64
|
||||
#define PE4 65
|
||||
#define PE5 66
|
||||
#define PE6 67
|
||||
#define PE7 68
|
||||
#define PE8 69
|
||||
#define PE9 70
|
||||
#define PE10 71
|
||||
#define PE2 72
|
||||
#define PE12 73
|
||||
#define PE13 74
|
||||
#define PE14 75
|
||||
#define PE15 76
|
||||
#define PF0 77
|
||||
#define PF1 78
|
||||
#define PF2 79
|
||||
#define PF6 80
|
||||
#define PF7 81
|
||||
#define PF8 82
|
||||
#define PF9 83
|
||||
#define PF11 84
|
||||
#define PF12 85
|
||||
#define PF13 86
|
||||
#define PF14 87
|
||||
#define PF15 88
|
||||
#define PG0 89
|
||||
#define PG1 90
|
||||
#define PG2 91
|
||||
#define PG3 92
|
||||
#define PG4 93
|
||||
#define PG5 94
|
||||
#define PG6 95
|
||||
#define PG7 96
|
||||
#define PG8 97
|
||||
#define PG9 98
|
||||
#define PG10 99
|
||||
#define PG11 100
|
||||
#define PG12 101
|
||||
#define PG13 102
|
||||
#define PG14 103
|
||||
#define PG15 104
|
||||
#define PH0 105
|
||||
#define PH1 106
|
||||
#define PA0 107
|
||||
#define PC1 108
|
||||
#define PC0 109
|
||||
#define PF10 110
|
||||
#define PF5 111
|
||||
#define PF4 112
|
||||
#define PF3 113
|
||||
#define PE12 73
|
||||
#define PE13 74
|
||||
#define PE14 75
|
||||
#define PE15 76
|
||||
#define PF0 77
|
||||
#define PF1 78
|
||||
#define PF2 79
|
||||
#define PF6 80
|
||||
#define PF7 81
|
||||
#define PF8 82
|
||||
#define PF9 83
|
||||
#define PF11 84
|
||||
#define PF12 85
|
||||
#define PF13 86
|
||||
#define PF14 87
|
||||
#define PF15 88
|
||||
#define PG0 89
|
||||
#define PG1 90
|
||||
#define PG2 91
|
||||
#define PG3 92
|
||||
#define PG4 93
|
||||
#define PG5 94
|
||||
#define PG6 95
|
||||
#define PG7 96
|
||||
#define PG8 97
|
||||
#define PG9 98
|
||||
#define PG10 99
|
||||
#define PG11 100
|
||||
#define PG12 101
|
||||
#define PG13 102
|
||||
#define PG14 103
|
||||
#define PG15 104
|
||||
#define PH0 105
|
||||
#define PH1 106
|
||||
#define PA0 107
|
||||
#define PC1 108
|
||||
#define PC0 109
|
||||
#define PF10 110
|
||||
#define PF5 111
|
||||
#define PF4 112
|
||||
#define PF3 113
|
||||
|
||||
// This must be a literal
|
||||
#define NUM_DIGITAL_PINS 114
|
||||
@@ -212,6 +211,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
@@ -234,5 +234,5 @@ extern "C" {
|
||||
// pins are NOT connected to anything by default.
|
||||
#define SERIAL_PORT_MONITOR Serial
|
||||
#define SERIAL_PORT_HARDWARE Serial1
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
@@ -95,7 +95,7 @@ extern "C" {
|
||||
|
||||
// Timer Definitions
|
||||
#define TIMER_TONE TIM2 // TIMER_TONE must be defined in this file
|
||||
#define TIMER_SERVO TIM5 // TIMER_SERVO must be defined in this file
|
||||
#define TIMER_SERVO TIM3 // TIMER_SERVO must be defined in this file
|
||||
#define TIMER_SERIAL TIM11 // TIMER_SERIAL must be defined in this file
|
||||
|
||||
// UART Definitions
|
||||
@@ -110,7 +110,7 @@ extern "C" {
|
||||
#define PIN_SERIAL_RX PA10
|
||||
#define PIN_SERIAL_TX PA9
|
||||
|
||||
// Used when user instantiate a hardware Serial using its peripheral name.
|
||||
// Used when the user instantiates a hardware Serial using its peripheral name.
|
||||
// Example: HardwareSerial mySerial(USART3);
|
||||
// will use PIN_SERIAL3_RX and PIN_SERIAL3_TX if defined.
|
||||
#define PIN_SERIAL1_RX PA10
|
||||
@@ -121,6 +121,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
@@ -47,10 +47,10 @@ WEAK const PinMap PinMap_ADC[] = {
|
||||
//{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
|
||||
//{PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1
|
||||
//{PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1
|
||||
{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 LCD RX
|
||||
{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 LCD RX
|
||||
//{PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2
|
||||
//{PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2
|
||||
{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 LCD TX
|
||||
{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 LCD TX
|
||||
//{PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3
|
||||
//{PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3
|
||||
//{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
|
||||
|
@@ -37,121 +37,120 @@ extern "C" {
|
||||
* Pins
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
#define PA1 0
|
||||
#define PA2 1
|
||||
#define PA3 2
|
||||
#define PA4 3
|
||||
#define PA5 4
|
||||
#define PA6 5
|
||||
#define PA7 6
|
||||
#define PA8 7
|
||||
#define PA9 8
|
||||
#define PA10 9
|
||||
#define PA11 10
|
||||
#define PA12 11
|
||||
#define PA13 12
|
||||
#define PA14 13
|
||||
#define PA15 14
|
||||
#define PB0 15
|
||||
#define PB1 16
|
||||
#define PB2 17
|
||||
#define PB3 18
|
||||
#define PB4 19
|
||||
#define PB5 20
|
||||
#define PB6 21
|
||||
#define PB7 22
|
||||
#define PB8 23
|
||||
#define PB9 24
|
||||
#define PB10 25
|
||||
#define PB11 26
|
||||
#define PB12 27
|
||||
#define PB13 28
|
||||
#define PB14 29
|
||||
#define PB15 30
|
||||
#define PC2 31
|
||||
#define PC3 32
|
||||
#define PC4 33
|
||||
#define PC5 34
|
||||
#define PC6 35
|
||||
#define PC7 36
|
||||
#define PC8 37
|
||||
#define PC9 38
|
||||
#define PC10 39
|
||||
#define PC11 40
|
||||
#define PC12 41
|
||||
#define PC13 42
|
||||
#define PC14 43
|
||||
#define PC15 44
|
||||
#define PD0 45
|
||||
#define PD1 46
|
||||
#define PD2 47
|
||||
#define PD3 48
|
||||
#define PD4 49
|
||||
#define PD5 50
|
||||
#define PD6 51
|
||||
#define PD7 52
|
||||
#define PD8 53
|
||||
#define PD9 54
|
||||
#define PD10 55
|
||||
#define PD11 56
|
||||
#define PD12 57
|
||||
#define PD13 58
|
||||
#define PD14 59
|
||||
#define PD15 60
|
||||
#define PE0 61
|
||||
#define PE1 62
|
||||
#define PE11 63
|
||||
#define PE3 64
|
||||
#define PE4 65
|
||||
#define PE5 66
|
||||
#define PE6 67
|
||||
#define PE7 68
|
||||
#define PE8 69
|
||||
#define PE9 70
|
||||
#define PE10 71
|
||||
#define PA1 0
|
||||
#define PA2 1
|
||||
#define PA3 2
|
||||
#define PA4 3
|
||||
#define PA5 4
|
||||
#define PA6 5
|
||||
#define PA7 6
|
||||
#define PA8 7
|
||||
#define PA9 8
|
||||
#define PA10 9
|
||||
#define PA11 10
|
||||
#define PA12 11
|
||||
#define PA13 12
|
||||
#define PA14 13
|
||||
#define PA15 14
|
||||
#define PB0 15
|
||||
#define PB1 16
|
||||
#define PB2 17
|
||||
#define PB3 18
|
||||
#define PB4 19
|
||||
#define PB5 20
|
||||
#define PB6 21
|
||||
#define PB7 22
|
||||
#define PB8 23
|
||||
#define PB9 24
|
||||
#define PB10 25
|
||||
#define PB11 26
|
||||
#define PB12 27
|
||||
#define PB13 28
|
||||
#define PB14 29
|
||||
#define PB15 30
|
||||
#define PC2 31
|
||||
#define PC3 32
|
||||
#define PC4 33
|
||||
#define PC5 34
|
||||
#define PC6 35
|
||||
#define PC7 36
|
||||
#define PC8 37
|
||||
#define PC9 38
|
||||
#define PC10 39
|
||||
#define PC11 40
|
||||
#define PC12 41
|
||||
#define PC13 42
|
||||
#define PC14 43
|
||||
#define PC15 44
|
||||
#define PD0 45
|
||||
#define PD1 46
|
||||
#define PD2 47
|
||||
#define PD3 48
|
||||
#define PD4 49
|
||||
#define PD5 50
|
||||
#define PD6 51
|
||||
#define PD7 52
|
||||
#define PD8 53
|
||||
#define PD9 54
|
||||
#define PD10 55
|
||||
#define PD11 56
|
||||
#define PD12 57
|
||||
#define PD13 58
|
||||
#define PD14 59
|
||||
#define PD15 60
|
||||
#define PE0 61
|
||||
#define PE1 62
|
||||
#define PE11 63
|
||||
#define PE3 64
|
||||
#define PE4 65
|
||||
#define PE5 66
|
||||
#define PE6 67
|
||||
#define PE7 68
|
||||
#define PE8 69
|
||||
#define PE9 70
|
||||
#define PE10 71
|
||||
#define PE2 72
|
||||
#define PE12 73
|
||||
#define PE13 74
|
||||
#define PE14 75
|
||||
#define PE15 76
|
||||
#define PF0 77
|
||||
#define PF1 78
|
||||
#define PF2 79
|
||||
#define PF6 80
|
||||
#define PF7 81
|
||||
#define PF8 82
|
||||
#define PF9 83
|
||||
#define PF11 84
|
||||
#define PF12 85
|
||||
#define PF13 86
|
||||
#define PF14 87
|
||||
#define PF15 88
|
||||
#define PG0 89
|
||||
#define PG1 90
|
||||
#define PG2 91
|
||||
#define PG3 92
|
||||
#define PG4 93
|
||||
#define PG5 94
|
||||
#define PG6 95
|
||||
#define PG7 96
|
||||
#define PG8 97
|
||||
#define PG9 98
|
||||
#define PG10 99
|
||||
#define PG11 100
|
||||
#define PG12 101
|
||||
#define PG13 102
|
||||
#define PG14 103
|
||||
#define PG15 104
|
||||
#define PH0 105
|
||||
#define PH1 106
|
||||
#define PA0 107
|
||||
#define PC1 108
|
||||
#define PC0 109
|
||||
#define PF10 110
|
||||
#define PF5 111
|
||||
#define PF4 112
|
||||
#define PF3 113
|
||||
#define PE12 73
|
||||
#define PE13 74
|
||||
#define PE14 75
|
||||
#define PE15 76
|
||||
#define PF0 77
|
||||
#define PF1 78
|
||||
#define PF2 79
|
||||
#define PF6 80
|
||||
#define PF7 81
|
||||
#define PF8 82
|
||||
#define PF9 83
|
||||
#define PF11 84
|
||||
#define PF12 85
|
||||
#define PF13 86
|
||||
#define PF14 87
|
||||
#define PF15 88
|
||||
#define PG0 89
|
||||
#define PG1 90
|
||||
#define PG2 91
|
||||
#define PG3 92
|
||||
#define PG4 93
|
||||
#define PG5 94
|
||||
#define PG6 95
|
||||
#define PG7 96
|
||||
#define PG8 97
|
||||
#define PG9 98
|
||||
#define PG10 99
|
||||
#define PG11 100
|
||||
#define PG12 101
|
||||
#define PG13 102
|
||||
#define PG14 103
|
||||
#define PG15 104
|
||||
#define PH0 105
|
||||
#define PH1 106
|
||||
#define PA0 107
|
||||
#define PC1 108
|
||||
#define PC0 109
|
||||
#define PF10 110
|
||||
#define PF5 111
|
||||
#define PF4 112
|
||||
#define PF3 113
|
||||
|
||||
// This must be a literal
|
||||
#define NUM_DIGITAL_PINS 114
|
||||
@@ -196,7 +195,7 @@ extern "C" {
|
||||
#define PIN_SERIAL_TX PA9
|
||||
|
||||
// Optional PIN_SERIALn_RX and PIN_SERIALn_TX where 'n' is the U(S)ART number
|
||||
// Used when user instantiate a hardware Serial using its peripheral name.
|
||||
// Used when the user instantiates a hardware Serial using its peripheral name.
|
||||
// Example: HardwareSerial mySerial(USART3);
|
||||
// will use PIN_SERIAL3_RX and PIN_SERIAL3_TX if defined.
|
||||
#define PIN_SERIAL1_RX PA10
|
||||
@@ -210,6 +209,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
@@ -230,8 +230,7 @@ extern "C" {
|
||||
//
|
||||
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
|
||||
// pins are NOT connected to anything by default.
|
||||
#define SERIAL_PORT_MONITOR Serial
|
||||
#define SERIAL_PORT_HARDWARE Serial1
|
||||
#define SERIAL_PORT_MONITOR Serial
|
||||
#define SERIAL_PORT_HARDWARE Serial1
|
||||
#define SERIAL_PORT_HARDWARE_OPEN Serial2
|
||||
#endif
|
||||
|
||||
|
@@ -218,6 +218,7 @@ WEAK const PinMap PinMap_UART_TX[] = {
|
||||
{PC_12, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART5)},
|
||||
{PD_3, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART5)},
|
||||
{PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART2)},
|
||||
{PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
|
||||
{PF_2, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_LPUART2)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
@@ -252,6 +253,7 @@ WEAK const PinMap PinMap_UART_RX[] = {
|
||||
{PC_11_ALT1, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART4)},
|
||||
{PD_2, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART5)},
|
||||
{PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART2)},
|
||||
{PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
@@ -130,14 +130,7 @@ WEAK void SystemClock_Config(void)
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
|
||||
|
||||
// Reset clock registers (in case bootloader has changed them)
|
||||
RCC->CR |= RCC_CR_HSION;
|
||||
while (!(RCC->CR & RCC_CR_HSIRDY))
|
||||
;
|
||||
RCC->CFGR = 0x00000000;
|
||||
RCC->CR = RCC_CR_HSION;
|
||||
while (RCC->CR & RCC_CR_PLLRDY)
|
||||
;
|
||||
RCC->PLLCFGR = 0x00001000;
|
||||
SystemInit();
|
||||
|
||||
/** Configure the main internal regulator output voltage
|
||||
*/
|
||||
|
@@ -0,0 +1,480 @@
|
||||
/*
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2020-2021, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
/*
|
||||
* Automatically generated from STM32G0B1V(B-C-E)Ix.xml, STM32G0B1V(B-C-E)Tx.xml
|
||||
* STM32G0B1V(C-E)Ix.xml, STM32G0B1V(C-E)Tx.xml
|
||||
* STM32G0C1V(C-E)Ix.xml, STM32G0C1V(C-E)Tx.xml
|
||||
* CubeMX DB release 6.0.30
|
||||
*/
|
||||
#if !defined(CUSTOM_PERIPHERAL_PINS)
|
||||
#include "Arduino.h"
|
||||
#include "PeripheralPins.h"
|
||||
|
||||
/* =====
|
||||
* Notes:
|
||||
* - The pins mentioned Px_y_ALTz are alternative possibilities which use other
|
||||
* HW peripheral instances. You can use them the same way as any other "normal"
|
||||
* pin (i.e. analogWrite(PA7_ALT1, 128);).
|
||||
*
|
||||
* - Commented lines are alternative possibilities which are not used per default.
|
||||
* If you change them, you will have to know what you do
|
||||
* =====
|
||||
*/
|
||||
|
||||
//*** ADC ***
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_ADC[] = {
|
||||
{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
|
||||
{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
|
||||
{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
|
||||
{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
|
||||
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
|
||||
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
|
||||
{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
|
||||
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
|
||||
{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
|
||||
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
|
||||
{PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
|
||||
{PB_10, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
|
||||
{PB_11, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
|
||||
{PB_12, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16
|
||||
{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC1_IN17
|
||||
{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC1_IN18
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** DAC ***
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_DAC[] = {
|
||||
{PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1
|
||||
{PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** I2C ***
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_I2C_SDA[] = {
|
||||
{PA_6, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C2)},
|
||||
{PA_6_ALT1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C3)},
|
||||
{PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C1)},
|
||||
{PA_10_ALT1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C2)},
|
||||
{PA_10_R, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C1)},
|
||||
{PA_10_R_ALT1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C2)},
|
||||
{PA_12, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C2)},
|
||||
{PB_4, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C2)},
|
||||
{PB_4_ALT1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C3)},
|
||||
{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C1)},
|
||||
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C1)},
|
||||
{PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C2)},
|
||||
{PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C2)},
|
||||
{PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C3)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_I2C_SCL[] = {
|
||||
{PA_7, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C2)},
|
||||
{PA_7_ALT1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C3)},
|
||||
{PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C1)},
|
||||
{PA_9_ALT1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C2)},
|
||||
{PA_9_R, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C1)},
|
||||
{PA_9_R_ALT1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C2)},
|
||||
{PA_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C2)},
|
||||
{PB_3, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C2)},
|
||||
{PB_3_ALT1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C3)},
|
||||
{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C1)},
|
||||
{PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C1)},
|
||||
{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C2)},
|
||||
{PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C2)},
|
||||
{PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C3)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** TIM ***
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_TIM[] = {
|
||||
{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 1, 0)}, // TIM2_CH1
|
||||
{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 2, 0)}, // TIM2_CH2
|
||||
{PA_1_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM15, 1, 1)}, // TIM15_CH1N
|
||||
{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 3, 0)}, // TIM2_CH3
|
||||
{PA_2_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM15, 1, 0)}, // TIM15_CH1
|
||||
{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 4, 0)}, // TIM2_CH4
|
||||
{PA_3_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM15, 2, 0)}, // TIM15_CH2
|
||||
{PA_4, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM14, 1, 0)}, // TIM14_CH1
|
||||
{PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 1, 0)}, // TIM2_CH1
|
||||
{PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM16, 1, 0)}, // TIM16_CH1
|
||||
{PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 1, 1)}, // TIM1_CH1N
|
||||
{PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 2, 0)}, // TIM3_CH2
|
||||
{PA_7_ALT2, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM14, 1, 0)}, // TIM14_CH1
|
||||
{PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM17, 1, 0)}, // TIM17_CH1
|
||||
{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 1, 0)}, // TIM1_CH1
|
||||
{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 2, 0)}, // TIM1_CH2
|
||||
{PA_9_R, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 2, 0)}, // TIM1_CH2
|
||||
{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 0)}, // TIM1_CH3
|
||||
{PA_10_R, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 0)}, // TIM1_CH3
|
||||
{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 4, 0)}, // TIM1_CH4
|
||||
{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 1, 0)}, // TIM2_CH1
|
||||
{PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 2, 1)}, // TIM1_CH2N
|
||||
{PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 3, 0)}, // TIM3_CH3
|
||||
{PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 4, 0)}, // TIM3_CH4
|
||||
{PB_1_ALT2, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM14, 1, 0)}, // TIM14_CH1
|
||||
{PB_3, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
|
||||
{PB_3_ALT1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 2, 0)}, // TIM2_CH2
|
||||
{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 2, 0)}, // TIM3_CH2
|
||||
{PB_6, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
|
||||
{PB_6_ALT1, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM4, 1, 0)}, // TIM4_CH1
|
||||
{PB_6_ALT2, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM16, 1, 1)}, // TIM16_CH1N
|
||||
{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM4, 2, 0)}, // TIM4_CH2
|
||||
{PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM17, 1, 1)}, // TIM17_CH1N
|
||||
{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM4, 3, 0)}, // TIM4_CH3
|
||||
{PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM16, 1, 0)}, // TIM16_CH1
|
||||
{PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM4, 4, 0)}, // TIM4_CH4
|
||||
{PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM17, 1, 0)}, // TIM17_CH1
|
||||
{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 3, 0)}, // TIM2_CH3
|
||||
{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 4, 0)}, // TIM2_CH4
|
||||
{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 1, 1)}, // TIM1_CH1N
|
||||
{PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM15, 1, 1)}, // TIM15_CH1N
|
||||
{PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 2, 1)}, // TIM1_CH2N
|
||||
{PB_14_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM15, 1, 0)}, // TIM15_CH1
|
||||
{PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PB_15_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N
|
||||
{PB_15_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM15, 2, 0)}, // TIM15_CH2
|
||||
{PC_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM15, 1, 0)}, // TIM15_CH1
|
||||
{PC_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM15, 2, 0)}, // TIM15_CH2
|
||||
{PC_4, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 1, 0)}, // TIM2_CH1
|
||||
{PC_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 2, 0)}, // TIM2_CH2
|
||||
{PC_6, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 3, 0)}, // TIM2_CH3
|
||||
{PC_6_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PC_7, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 4, 0)}, // TIM2_CH4
|
||||
{PC_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 2, 0)}, // TIM3_CH2
|
||||
{PC_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 1, 0)}, // TIM1_CH1
|
||||
{PC_8_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 3, 0)}, // TIM3_CH3
|
||||
{PC_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 2, 0)}, // TIM1_CH2
|
||||
{PC_9_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 4, 0)}, // TIM3_CH4
|
||||
{PC_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 0)}, // TIM1_CH3
|
||||
{PC_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 4, 0)}, // TIM1_CH4
|
||||
{PC_12, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM14, 1, 0)}, // TIM14_CH1
|
||||
{PD_0, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM16, 1, 0)}, // TIM16_CH1
|
||||
{PD_1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM17, 1, 0)}, // TIM17_CH1
|
||||
{PD_2, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 1, 1)}, // TIM1_CH1N
|
||||
{PD_3, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 2, 1)}, // TIM1_CH2N
|
||||
{PD_4, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
|
||||
{PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
|
||||
{PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
|
||||
{PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
|
||||
{PE_0, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM16, 1, 0)}, // TIM16_CH1
|
||||
{PE_1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM17, 1, 0)}, // TIM17_CH1
|
||||
{PE_3, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PE_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 2, 0)}, // TIM3_CH2
|
||||
{PE_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 3, 0)}, // TIM3_CH3
|
||||
{PE_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 4, 0)}, // TIM3_CH4
|
||||
{PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
||||
{PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
|
||||
{PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
||||
{PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
|
||||
{PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
|
||||
{PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
|
||||
{PF_0, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM14, 1, 0)}, // TIM14_CH1
|
||||
{PF_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM15, 1, 1)}, // TIM15_CH1N
|
||||
{PF_12, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM15, 1, 0)}, // TIM15_CH1
|
||||
{PF_13, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM15, 2, 0)}, // TIM15_CH2
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** UART ***
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_UART_TX[] = {
|
||||
{PA_0, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART4)},
|
||||
{PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
|
||||
{PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)},
|
||||
{PA_4, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART6)},
|
||||
{PA_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
|
||||
{PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
|
||||
{PA_9_R, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
|
||||
{PA_14, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_LPUART2)},
|
||||
{PA_14_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)},
|
||||
{PB_0, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART5)},
|
||||
{PB_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
|
||||
{PB_3, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART5)},
|
||||
{PB_6, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_LPUART2)},
|
||||
{PB_6_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART1)},
|
||||
{PB_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
|
||||
{PB_8_ALT1, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||
{PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
|
||||
{PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_LPUART1)},
|
||||
{PC_0, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART2)},
|
||||
{PC_0_ALT1, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART6)},
|
||||
{PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_LPUART1)},
|
||||
{PC_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
|
||||
{PC_4_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART3)},
|
||||
{PC_6, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART2)},
|
||||
{PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART3)},
|
||||
{PC_10_ALT1, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART4)},
|
||||
{PC_12, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART5)},
|
||||
{PD_3, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART5)},
|
||||
{PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART2)},
|
||||
{PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART3)},
|
||||
{PE_8, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART4)},
|
||||
{PE_10, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART5)},
|
||||
{PF_2, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_LPUART2)},
|
||||
{PF_4, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_LPUART1)},
|
||||
{PF_9, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART6)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_UART_RX[] = {
|
||||
{PA_1, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART4)},
|
||||
{PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
|
||||
{PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)},
|
||||
{PA_5, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART6)},
|
||||
{PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
|
||||
{PA_10_R, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
|
||||
{PA_13, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_LPUART2)},
|
||||
{PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)},
|
||||
{PB_0, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
|
||||
{PB_1, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART5)},
|
||||
{PB_4, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART5)},
|
||||
{PB_7, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_LPUART2)},
|
||||
{PB_7_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART1)},
|
||||
{PB_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
|
||||
{PB_9_ALT1, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||
{PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_LPUART1)},
|
||||
{PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
|
||||
{PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_LPUART1)},
|
||||
{PC_1, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART2)},
|
||||
{PC_1_ALT1, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART6)},
|
||||
{PC_5, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
|
||||
{PC_5_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART3)},
|
||||
{PC_7, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART2)},
|
||||
{PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART3)},
|
||||
{PC_11_ALT1, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART4)},
|
||||
{PD_2, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART5)},
|
||||
{PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART2)},
|
||||
{PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART3)},
|
||||
{PE_9, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART4)},
|
||||
{PE_11, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART5)},
|
||||
{PF_3, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_LPUART2)},
|
||||
{PF_5, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_LPUART1)},
|
||||
{PF_10, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART6)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_UART_RTS[] = {
|
||||
{PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)},
|
||||
{PA_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART6)},
|
||||
{PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
|
||||
{PA_15, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_USART3)},
|
||||
{PA_15_ALT1, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART4)},
|
||||
{PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
|
||||
{PB_1_ALT1, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_LPUART2)},
|
||||
{PB_1_ALT2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
|
||||
{PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)},
|
||||
{PB_5, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART5)},
|
||||
{PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_LPUART1)},
|
||||
{PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
|
||||
{PB_14_ALT1, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||
{PC_9, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART2)},
|
||||
{PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART3)},
|
||||
{PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART2)},
|
||||
{PD_4_ALT1, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART5)},
|
||||
{PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART3)},
|
||||
{PD_15, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_LPUART2)},
|
||||
{PE_7, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART5)},
|
||||
{PF_2, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART2)},
|
||||
{PF_3, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART6)},
|
||||
{PF_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_LPUART1)},
|
||||
{PF_11, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART6)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_UART_CTS[] = {
|
||||
{PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)},
|
||||
{PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
|
||||
{PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
|
||||
{PA_6_ALT2, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART6)},
|
||||
{PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
|
||||
{PB_0, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_LPUART2)},
|
||||
{PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)},
|
||||
{PB_6, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART5)},
|
||||
{PB_7, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART4)},
|
||||
{PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_LPUART1)},
|
||||
{PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
|
||||
{PB_15, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||
{PC_8, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART2)},
|
||||
{PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART2)},
|
||||
{PD_5, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART5)},
|
||||
{PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART3)},
|
||||
{PD_14, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_LPUART2)},
|
||||
{PF_7, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_LPUART1)},
|
||||
{PF_7_ALT1, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART5)},
|
||||
{PF_12, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART6)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** SPI ***
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SPI_MOSI[] = {
|
||||
{PA_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
|
||||
{PA_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI2)},
|
||||
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
|
||||
{PA_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)},
|
||||
{PA_10_R, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)},
|
||||
{PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
|
||||
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
|
||||
{PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SPI3)},
|
||||
{PB_7, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI2)},
|
||||
{PB_11, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)},
|
||||
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)},
|
||||
{PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI2)},
|
||||
{PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_SPI3)},
|
||||
{PD_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI2)},
|
||||
{PD_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI1)},
|
||||
{PE_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SPI_MISO[] = {
|
||||
{PA_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)},
|
||||
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
|
||||
{PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_SPI2)},
|
||||
{PA_9_R, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_SPI2)},
|
||||
{PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
|
||||
{PB_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI2)},
|
||||
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
|
||||
{PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SPI3)},
|
||||
{PB_6, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_SPI2)},
|
||||
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)},
|
||||
{PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI2)},
|
||||
{PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_SPI3)},
|
||||
{PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI2)},
|
||||
{PD_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI1)},
|
||||
{PE_14, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SPI_SCLK[] = {
|
||||
{PA_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)},
|
||||
{PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
|
||||
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
|
||||
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
|
||||
{PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SPI3)},
|
||||
{PB_8, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI2)},
|
||||
{PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)},
|
||||
{PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_SPI3)},
|
||||
{PD_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI2)},
|
||||
{PD_8, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI1)},
|
||||
{PE_13, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SPI_SSEL[] = {
|
||||
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
|
||||
{PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SPI3)},
|
||||
{PA_8, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI2)},
|
||||
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
|
||||
{PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SPI3)},
|
||||
{PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
|
||||
{PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)},
|
||||
{PD_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI2)},
|
||||
{PD_9, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI1)},
|
||||
{PE_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** FDCAN ***
|
||||
|
||||
#ifdef HAL_FDCAN_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_CAN_RD[] = {
|
||||
{PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN1)},
|
||||
{PB_0, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN2)},
|
||||
{PB_5, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN2)},
|
||||
{PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN1)},
|
||||
{PB_12, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN2)},
|
||||
{PC_2, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN2)},
|
||||
{PC_4, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN1)},
|
||||
{PD_0, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN1)},
|
||||
{PD_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN1)},
|
||||
{PD_14, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN2)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_FDCAN_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_CAN_TD[] = {
|
||||
{PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN1)},
|
||||
{PB_1, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN2)},
|
||||
{PB_6, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN2)},
|
||||
{PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN1)},
|
||||
{PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN2)},
|
||||
{PC_3, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN2)},
|
||||
{PC_5, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN1)},
|
||||
{PD_1, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN1)},
|
||||
{PD_13, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN1)},
|
||||
{PD_15, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_FDCAN2)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** No ETHERNET ***
|
||||
|
||||
//*** No QUADSPI ***
|
||||
|
||||
//*** USB ***
|
||||
|
||||
#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED)
|
||||
WEAK const PinMap PinMap_USB_DRD_FS[] = {
|
||||
{PA_4, USB_DRD_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_USB)}, // USB_NOE
|
||||
{PA_11, USB_DRD_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM
|
||||
{PA_12, USB_DRD_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP
|
||||
{PA_13, USB_DRD_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_USB)}, // USB_NOE
|
||||
{PA_15, USB_DRD_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_USB)}, // USB_NOE
|
||||
{PC_9, USB_DRD_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_USB)}, // USB_NOE
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** No SD ***
|
||||
|
||||
#endif /* !CUSTOM_PERIPHERAL_PINS */
|
@@ -0,0 +1,91 @@
|
||||
/* Remap pin name */
|
||||
PA_9_R = PA_9 | PREMAP,
|
||||
PA_10_R = PA_10 | PREMAP,
|
||||
|
||||
/* Alternate pin name */
|
||||
PA_1_ALT1 = PA_1 | ALT1,
|
||||
PA_2_ALT1 = PA_2 | ALT1,
|
||||
PA_3_ALT1 = PA_3 | ALT1,
|
||||
PA_4_ALT1 = PA_4 | ALT1,
|
||||
PA_6_ALT1 = PA_6 | ALT1,
|
||||
PA_6_ALT2 = PA_6 | ALT2,
|
||||
PA_7_ALT1 = PA_7 | ALT1,
|
||||
PA_7_ALT2 = PA_7 | ALT2,
|
||||
PA_7_ALT3 = PA_7 | ALT3,
|
||||
PA_9_ALT1 = PA_9 | ALT1,
|
||||
PA_9_R_ALT1 = PA_9_R | ALT1,
|
||||
PA_10_ALT1 = PA_10 | ALT1,
|
||||
PA_10_R_ALT1 = PA_10_R | ALT1,
|
||||
PA_14_ALT1 = PA_14 | ALT1,
|
||||
PA_15_ALT1 = PA_15 | ALT1,
|
||||
PB_0_ALT1 = PB_0 | ALT1,
|
||||
PB_1_ALT1 = PB_1 | ALT1,
|
||||
PB_1_ALT2 = PB_1 | ALT2,
|
||||
PB_3_ALT1 = PB_3 | ALT1,
|
||||
PB_4_ALT1 = PB_4 | ALT1,
|
||||
PB_5_ALT1 = PB_5 | ALT1,
|
||||
PB_6_ALT1 = PB_6 | ALT1,
|
||||
PB_6_ALT2 = PB_6 | ALT2,
|
||||
PB_7_ALT1 = PB_7 | ALT1,
|
||||
PB_8_ALT1 = PB_8 | ALT1,
|
||||
PB_9_ALT1 = PB_9 | ALT1,
|
||||
PB_13_ALT1 = PB_13 | ALT1,
|
||||
PB_14_ALT1 = PB_14 | ALT1,
|
||||
PB_15_ALT1 = PB_15 | ALT1,
|
||||
PB_15_ALT2 = PB_15 | ALT2,
|
||||
PC_0_ALT1 = PC_0 | ALT1,
|
||||
PC_1_ALT1 = PC_1 | ALT1,
|
||||
PC_4_ALT1 = PC_4 | ALT1,
|
||||
PC_5_ALT1 = PC_5 | ALT1,
|
||||
PC_6_ALT1 = PC_6 | ALT1,
|
||||
PC_7_ALT1 = PC_7 | ALT1,
|
||||
PC_8_ALT1 = PC_8 | ALT1,
|
||||
PC_9_ALT1 = PC_9 | ALT1,
|
||||
PC_10_ALT1 = PC_10 | ALT1,
|
||||
PC_11_ALT1 = PC_11 | ALT1,
|
||||
PD_4_ALT1 = PD_4 | ALT1,
|
||||
PF_7_ALT1 = PF_7 | ALT1,
|
||||
|
||||
/* SYS_WKUP */
|
||||
#ifdef PWR_WAKEUP_PIN1
|
||||
SYS_WKUP1 = PA_0,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN2
|
||||
SYS_WKUP2 = PC_13,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN3
|
||||
SYS_WKUP3 = PE_6,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN4
|
||||
SYS_WKUP4 = PA_2,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN5
|
||||
SYS_WKUP5 = PC_5,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN6
|
||||
SYS_WKUP6 = PB_5,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN7
|
||||
SYS_WKUP7 = NC,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN8
|
||||
SYS_WKUP8 = NC,
|
||||
#endif
|
||||
|
||||
/* USB */
|
||||
#ifdef USBCON
|
||||
USB_DM = PA_11,
|
||||
USB_DP = PA_12,
|
||||
#ifdef USB_NOE_PA_4
|
||||
USB_NOE = PA_4,
|
||||
#endif
|
||||
#ifdef USB_NOE_PA_13
|
||||
USB_NOE = PA_13,
|
||||
#endif
|
||||
#ifdef USB_NOE_PA_15
|
||||
USB_NOE = PA_15,
|
||||
#endif
|
||||
#ifdef USB_NOE_PC_9
|
||||
USB_NOE = PC_9,
|
||||
#endif
|
||||
#endif
|
177
buildroot/share/PlatformIO/variants/MARLIN_G0B1VE/ldscript.ld
Normal file
177
buildroot/share/PlatformIO/variants/MARLIN_G0B1VE/ldscript.ld
Normal file
@@ -0,0 +1,177 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file LinkerScript.ld
|
||||
* @author Auto-generated by STM32CubeIDE
|
||||
* @brief Linker script for STM32G0B1VETx Device from STM32G0 series
|
||||
* 512Kbytes FLASH
|
||||
* 144Kbytes RAM
|
||||
*
|
||||
* Set heap size, stack size and stack location according
|
||||
* to application requirements.
|
||||
*
|
||||
* Set memory bank area and size if external memory is used
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
|
||||
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into "FLASH" Rom type memory */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data into "FLASH" Rom type memory */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data into "FLASH" Rom type memory */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(4);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM : {
|
||||
. = ALIGN(4);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections into "RAM" Ram type memory */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
*(.RamFunc) /* .RamFunc sections */
|
||||
*(.RamFunc*) /* .RamFunc* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
|
||||
} >RAM AT> FLASH
|
||||
|
||||
/* Uninitialized data section into "RAM" Ram type memory */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
@@ -0,0 +1,213 @@
|
||||
/*
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2020-2021, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#if defined(STM32G0B1xx)
|
||||
#include "pins_arduino.h"
|
||||
|
||||
// Digital PinName array
|
||||
const PinName digitalPin[] = {
|
||||
PA_0, // D0/A0
|
||||
PA_1, // D1/A1
|
||||
PA_2, // D2/A2
|
||||
PA_3, // D3/A3
|
||||
PA_4, // D4/A4
|
||||
PA_5, // D5/A5
|
||||
PA_6, // D6/A6
|
||||
PA_7, // D7/A7
|
||||
PA_8, // D8
|
||||
PA_9, // D9
|
||||
PA_10, // D10
|
||||
PA_11, // D11
|
||||
PA_12, // D12
|
||||
PA_13, // D13
|
||||
PA_14, // D14
|
||||
PA_15, // D15
|
||||
PB_0, // D16/A8
|
||||
PB_1, // D17/A9
|
||||
PB_2, // D18/A10
|
||||
PB_3, // D19
|
||||
PB_4, // D20
|
||||
PB_5, // D21
|
||||
PB_6, // D22
|
||||
PB_7, // D23
|
||||
PB_8, // D24
|
||||
PB_9, // D25
|
||||
PB_10, // D26/A11
|
||||
PB_11, // D27/A12
|
||||
PB_12, // D28/A13
|
||||
PB_13, // D29
|
||||
PB_14, // D30
|
||||
PB_15, // D31
|
||||
PC_0, // D32
|
||||
PC_1, // D33
|
||||
PC_2, // D34
|
||||
PC_3, // D35
|
||||
PC_4, // D36/A14
|
||||
PC_5, // D37/A15
|
||||
PC_6, // D38
|
||||
PC_7, // D39
|
||||
PC_8, // D40
|
||||
PC_9, // D41
|
||||
PC_10, // D42
|
||||
PC_11, // D43
|
||||
PC_12, // D44
|
||||
PC_13, // D45
|
||||
PC_14, // D46
|
||||
PC_15, // D47
|
||||
PD_0, // D48
|
||||
PD_1, // D49
|
||||
PD_2, // D50
|
||||
PD_3, // D51
|
||||
PD_4, // D52
|
||||
PD_5, // D53
|
||||
PD_6, // D54
|
||||
PD_7, // D55
|
||||
PD_8, // D56
|
||||
PD_9, // D57
|
||||
PD_10, // D58
|
||||
PD_11, // D59
|
||||
PD_12, // D60
|
||||
PD_13, // D61
|
||||
PD_14, // D62
|
||||
PD_15, // D63
|
||||
PE_0, // D64
|
||||
PE_1, // D65
|
||||
PE_2, // D66
|
||||
PE_3, // D67
|
||||
PE_4, // D68
|
||||
PE_5, // D69
|
||||
PE_6, // D70
|
||||
PE_7, // D71
|
||||
PE_8, // D72
|
||||
PE_9, // D73
|
||||
PE_10, // D74
|
||||
PE_11, // D75
|
||||
PE_12, // D76
|
||||
PE_13, // D77
|
||||
PE_14, // D78
|
||||
PE_15, // D79
|
||||
PF_0, // D80
|
||||
PF_1, // D81
|
||||
PF_2, // D82
|
||||
PF_3, // D83
|
||||
PF_4, // D84
|
||||
PF_5, // D85
|
||||
PF_6, // D86
|
||||
PF_7, // D87
|
||||
PF_8, // D88
|
||||
PF_9, // D89
|
||||
PF_10, // D90
|
||||
PF_11, // D91
|
||||
PF_12, // D92
|
||||
PF_13, // D93
|
||||
PA_9_R, // D94
|
||||
PA_10_R // D95
|
||||
};
|
||||
|
||||
// Analog (Ax) pin number array
|
||||
const uint32_t analogInputPin[] = {
|
||||
0, // A0, PA0
|
||||
1, // A1, PA1
|
||||
2, // A2, PA2
|
||||
3, // A3, PA3
|
||||
4, // A4, PA4
|
||||
5, // A5, PA5
|
||||
6, // A6, PA6
|
||||
7, // A7, PA7
|
||||
16, // A8, PB0
|
||||
17, // A9, PB1
|
||||
18, // A10, PB2
|
||||
26, // A11, PB10
|
||||
27, // A12, PB11
|
||||
28, // A13, PB12
|
||||
36, // A14, PC4
|
||||
37 // A15, PC5
|
||||
};
|
||||
|
||||
// ----------------------------------------------------------------------------
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* The system Clock is configured as follows :
|
||||
* System Clock source = PLL (HSE)
|
||||
* SYSCLK(Hz) = 64000000
|
||||
* HCLK(Hz) = 64000000
|
||||
* AHB Prescaler = 1
|
||||
* APB1 Prescaler = 1
|
||||
* PLL_M = 1
|
||||
* PLL_N = 24
|
||||
* PLL_R = 3
|
||||
* PLL_P = 2
|
||||
* PLL_Q = 4
|
||||
* USB(Hz) = 48000000 (PLLQ)
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
WEAK void SystemClock_Config(void)
|
||||
{
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
|
||||
|
||||
// Reset clock registers (in case bootloader has changed them)
|
||||
SystemInit();
|
||||
|
||||
/** Configure the main internal regulator output voltage
|
||||
*/
|
||||
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||
/** Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure.
|
||||
*/
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
|
||||
RCC_OscInitStruct.PLL.PLLN = 24;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
|
||||
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV3;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/** Initializes the CPU, AHB and APB buses clocks
|
||||
*/
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||
|RCC_CLOCKTYPE_PCLK1;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
||||
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/** Initializes the peripherals clocks
|
||||
*/
|
||||
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
|
||||
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* STM32G0B1xx */
|
@@ -0,0 +1,258 @@
|
||||
/*
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2020-2021, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* STM32 pins number
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define PA0 PIN_A0
|
||||
#define PA1 PIN_A1
|
||||
#define PA2 PIN_A2
|
||||
#define PA3 PIN_A3
|
||||
#define PA4 PIN_A4
|
||||
#define PA5 PIN_A5
|
||||
#define PA6 PIN_A6
|
||||
#define PA7 PIN_A7
|
||||
#define PA8 8
|
||||
#define PA9 9
|
||||
#define PA10 10
|
||||
#define PA11 11
|
||||
#define PA12 12
|
||||
#define PA13 13
|
||||
#define PA14 14
|
||||
#define PA15 15
|
||||
#define PB0 PIN_A8
|
||||
#define PB1 PIN_A9
|
||||
#define PB2 PIN_A10
|
||||
#define PB3 19
|
||||
#define PB4 20
|
||||
#define PB5 21
|
||||
#define PB6 22
|
||||
#define PB7 23
|
||||
#define PB8 24
|
||||
#define PB9 25
|
||||
#define PB10 PIN_A11
|
||||
#define PB11 PIN_A12
|
||||
#define PB12 PIN_A13
|
||||
#define PB13 29
|
||||
#define PB14 30
|
||||
#define PB15 31
|
||||
#define PC0 32
|
||||
#define PC1 33
|
||||
#define PC2 34
|
||||
#define PC3 35
|
||||
#define PC4 PIN_A14
|
||||
#define PC5 PIN_A15
|
||||
#define PC6 38
|
||||
#define PC7 39
|
||||
#define PC8 40
|
||||
#define PC9 41
|
||||
#define PC10 42
|
||||
#define PC11 43
|
||||
#define PC12 44
|
||||
#define PC13 45
|
||||
#define PC14 46
|
||||
#define PC15 47
|
||||
#define PD0 48
|
||||
#define PD1 49
|
||||
#define PD2 50
|
||||
#define PD3 51
|
||||
#define PD4 52
|
||||
#define PD5 53
|
||||
#define PD6 54
|
||||
#define PD7 55
|
||||
#define PD8 56
|
||||
#define PD9 57
|
||||
#define PD10 58
|
||||
#define PD11 59
|
||||
#define PD12 60
|
||||
#define PD13 61
|
||||
#define PD14 62
|
||||
#define PD15 63
|
||||
#define PE0 64
|
||||
#define PE1 65
|
||||
#define PE2 66
|
||||
#define PE3 67
|
||||
#define PE4 68
|
||||
#define PE5 69
|
||||
#define PE6 70
|
||||
#define PE7 71
|
||||
#define PE8 72
|
||||
#define PE9 73
|
||||
#define PE10 74
|
||||
#define PE11 75
|
||||
#define PE12 76
|
||||
#define PE13 77
|
||||
#define PE14 78
|
||||
#define PE15 79
|
||||
#define PF0 80
|
||||
#define PF1 81
|
||||
#define PF2 82
|
||||
#define PF3 83
|
||||
#define PF4 84
|
||||
#define PF5 85
|
||||
#define PF6 86
|
||||
#define PF7 87
|
||||
#define PF8 88
|
||||
#define PF9 89
|
||||
#define PF10 90
|
||||
#define PF11 91
|
||||
#define PF12 92
|
||||
#define PF13 93
|
||||
#define PA9_R 94
|
||||
#define PA10_R 95
|
||||
|
||||
// Alternate pins number
|
||||
#define PA1_ALT1 (PA1 | ALT1)
|
||||
#define PA2_ALT1 (PA2 | ALT1)
|
||||
#define PA3_ALT1 (PA3 | ALT1)
|
||||
#define PA4_ALT1 (PA4 | ALT1)
|
||||
#define PA6_ALT1 (PA6 | ALT1)
|
||||
#define PA6_ALT2 (PA6 | ALT2)
|
||||
#define PA7_ALT1 (PA7 | ALT1)
|
||||
#define PA7_ALT2 (PA7 | ALT2)
|
||||
#define PA7_ALT3 (PA7 | ALT3)
|
||||
#define PA9_ALT1 (PA9 | ALT1)
|
||||
#define PA9_R_ALT1 (PA9_R | ALT1)
|
||||
#define PA10_ALT1 (PA10 | ALT1)
|
||||
#define PA10_R_ALT1 (PA10_R | ALT1)
|
||||
#define PA14_ALT1 (PA14 | ALT1)
|
||||
#define PA15_ALT1 (PA15 | ALT1)
|
||||
#define PB0_ALT1 (PB0 | ALT1)
|
||||
#define PB1_ALT1 (PB1 | ALT1)
|
||||
#define PB1_ALT2 (PB1 | ALT2)
|
||||
#define PB3_ALT1 (PB3 | ALT1)
|
||||
#define PB4_ALT1 (PB4 | ALT1)
|
||||
#define PB5_ALT1 (PB5 | ALT1)
|
||||
#define PB6_ALT1 (PB6 | ALT1)
|
||||
#define PB6_ALT2 (PB6 | ALT2)
|
||||
#define PB7_ALT1 (PB7 | ALT1)
|
||||
#define PB8_ALT1 (PB8 | ALT1)
|
||||
#define PB9_ALT1 (PB9 | ALT1)
|
||||
#define PB13_ALT1 (PB13 | ALT1)
|
||||
#define PB14_ALT1 (PB14 | ALT1)
|
||||
#define PB15_ALT1 (PB15 | ALT1)
|
||||
#define PB15_ALT2 (PB15 | ALT2)
|
||||
#define PC0_ALT1 (PC0 | ALT1)
|
||||
#define PC1_ALT1 (PC1 | ALT1)
|
||||
#define PC4_ALT1 (PC4 | ALT1)
|
||||
#define PC5_ALT1 (PC5 | ALT1)
|
||||
#define PC6_ALT1 (PC6 | ALT1)
|
||||
#define PC7_ALT1 (PC7 | ALT1)
|
||||
#define PC8_ALT1 (PC8 | ALT1)
|
||||
#define PC9_ALT1 (PC9 | ALT1)
|
||||
#define PC10_ALT1 (PC10 | ALT1)
|
||||
#define PC11_ALT1 (PC11 | ALT1)
|
||||
#define PD4_ALT1 (PD4 | ALT1)
|
||||
#define PF7_ALT1 (PF7 | ALT1)
|
||||
|
||||
#define NUM_DIGITAL_PINS 96
|
||||
#define NUM_REMAP_PINS 2
|
||||
#define NUM_ANALOG_INPUTS 16
|
||||
|
||||
// On-board LED pin number
|
||||
#ifndef LED_BUILTIN
|
||||
#define LED_BUILTIN PNUM_NOT_DEFINED
|
||||
#endif
|
||||
|
||||
// On-board user button
|
||||
#ifndef USER_BTN
|
||||
#define USER_BTN PNUM_NOT_DEFINED
|
||||
#endif
|
||||
|
||||
// SPI definitions
|
||||
#ifndef PIN_SPI_SS
|
||||
#define PIN_SPI_SS PA4
|
||||
#endif
|
||||
#ifndef PIN_SPI_SS1
|
||||
#define PIN_SPI_SS1 PA15
|
||||
#endif
|
||||
#ifndef PIN_SPI_SS2
|
||||
#define PIN_SPI_SS2 PB0
|
||||
#endif
|
||||
#ifndef PIN_SPI_SS3
|
||||
#define PIN_SPI_SS3 PD9
|
||||
#endif
|
||||
#ifndef PIN_SPI_MOSI
|
||||
#define PIN_SPI_MOSI PA2
|
||||
#endif
|
||||
#ifndef PIN_SPI_MISO
|
||||
#define PIN_SPI_MISO PA6
|
||||
#endif
|
||||
#ifndef PIN_SPI_SCK
|
||||
#define PIN_SPI_SCK PA1
|
||||
#endif
|
||||
|
||||
// I2C definitions
|
||||
#ifndef PIN_WIRE_SDA
|
||||
#define PIN_WIRE_SDA PA6
|
||||
#endif
|
||||
#ifndef PIN_WIRE_SCL
|
||||
#define PIN_WIRE_SCL PA7
|
||||
#endif
|
||||
|
||||
// Timer Definitions
|
||||
// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
|
||||
#ifndef TIMER_TONE
|
||||
#define TIMER_TONE TIM6
|
||||
#endif
|
||||
#ifndef TIMER_SERVO
|
||||
#define TIMER_SERVO TIM7
|
||||
#endif
|
||||
|
||||
// UART Definitions
|
||||
#ifndef SERIAL_UART_INSTANCE
|
||||
#define SERIAL_UART_INSTANCE 4
|
||||
#endif
|
||||
|
||||
// Default pin used for generic 'Serial' instance
|
||||
// Mandatory for Firmata
|
||||
#ifndef PIN_SERIAL_RX
|
||||
#define PIN_SERIAL_RX PA1
|
||||
#endif
|
||||
#ifndef PIN_SERIAL_TX
|
||||
#define PIN_SERIAL_TX PA0
|
||||
#endif
|
||||
|
||||
// Extra HAL modules
|
||||
#if !defined(HAL_DAC_MODULE_DISABLED)
|
||||
#define HAL_DAC_MODULE_ENABLED
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
// These serial port names are intended to allow libraries and architecture-neutral
|
||||
// sketches to automatically default to the correct port name for a particular type
|
||||
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
|
||||
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
|
||||
//
|
||||
// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
|
||||
//
|
||||
// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
|
||||
//
|
||||
// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
|
||||
//
|
||||
// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
|
||||
//
|
||||
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
|
||||
// pins are NOT connected to anything by default.
|
||||
#ifndef SERIAL_PORT_MONITOR
|
||||
#define SERIAL_PORT_MONITOR Serial
|
||||
#endif
|
||||
#ifndef SERIAL_PORT_HARDWARE
|
||||
#define SERIAL_PORT_HARDWARE Serial
|
||||
#endif
|
||||
#endif
|
@@ -0,0 +1,590 @@
|
||||
/*
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2020, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
/*
|
||||
* Automatically generated from STM32H723VEHx.xml, STM32H723VETx.xml
|
||||
* STM32H723VGHx.xml, STM32H723VGTx.xml
|
||||
* STM32H730VBHx.xml, STM32H730VBTx.xml
|
||||
* STM32H733VGHx.xml, STM32H733VGTx.xml
|
||||
* CubeMX DB release 6.0.60
|
||||
*/
|
||||
#if !defined(CUSTOM_PERIPHERAL_PINS)
|
||||
#include "Arduino.h"
|
||||
#include "PeripheralPins.h"
|
||||
|
||||
/* =====
|
||||
* Notes:
|
||||
* - The pins mentioned Px_y_ALTz are alternative possibilities which use other
|
||||
* HW peripheral instances. You can use them the same way as any other "normal"
|
||||
* pin (i.e. analogWrite(PA7_ALT1, 128);).
|
||||
*
|
||||
* - Commented lines are alternative possibilities which are not used per default.
|
||||
* If you change them, you will have to know what you do
|
||||
* =====
|
||||
*/
|
||||
|
||||
//*** ADC ***
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_ADC[] = {
|
||||
{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_INP16
|
||||
{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC1_INP17
|
||||
{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_INP14
|
||||
{PA_2_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_INP14
|
||||
{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_INP15
|
||||
{PA_3_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_INP15
|
||||
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC1_INP18
|
||||
{PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC2_INP18
|
||||
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC1_INP19
|
||||
{PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC2_INP19
|
||||
{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_INP3
|
||||
{PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_INP3
|
||||
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_INP7
|
||||
{PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_INP7
|
||||
{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_INP9
|
||||
{PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_INP9
|
||||
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INP5
|
||||
{PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INP5
|
||||
{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INP10
|
||||
{PC_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INP10
|
||||
{PC_0_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_INP10
|
||||
{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_INP11
|
||||
{PC_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_INP11
|
||||
{PC_1_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_INP11
|
||||
{PC_2_C, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_INP0
|
||||
{PC_3_C, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_INP1
|
||||
{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_INP4
|
||||
{PC_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_INP4
|
||||
{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_INP8
|
||||
{PC_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_INP8
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** DAC ***
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_DAC[] = {
|
||||
{PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1
|
||||
{PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** I2C ***
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_I2C_SDA[] = {
|
||||
{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||
{PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
|
||||
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||
{PB_9_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
|
||||
{PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||
{PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
|
||||
{PC_9_ALT1, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C5)},
|
||||
{PC_10, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C5)},
|
||||
{PD_13, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_I2C_SCL[] = {
|
||||
{PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
|
||||
{PA_8_ALT1, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C5)},
|
||||
{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||
{PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
|
||||
{PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||
{PB_8_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
|
||||
{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||
{PC_11, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C5)},
|
||||
{PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** TIM ***
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_TIM[] = {
|
||||
{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
||||
{PA_0_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
|
||||
{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
|
||||
{PA_1_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
|
||||
{PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N
|
||||
{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
|
||||
{PA_2_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
|
||||
{PA_2_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1
|
||||
{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
|
||||
{PA_3_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
|
||||
{PA_3_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2
|
||||
{PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
||||
{PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
|
||||
{PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PA_6_ALT1, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
|
||||
{PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
||||
{PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
||||
{PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
|
||||
{PA_7_ALT3, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
|
||||
{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
|
||||
{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
|
||||
{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
|
||||
{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
|
||||
{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
||||
{PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
||||
{PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
|
||||
{PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
|
||||
{PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
|
||||
{PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
|
||||
{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
|
||||
{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
||||
{PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
|
||||
{PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N
|
||||
{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
|
||||
{PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N
|
||||
{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
|
||||
{PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1
|
||||
{PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
|
||||
{PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1
|
||||
{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
|
||||
{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
|
||||
{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
||||
{PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
||||
{PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
|
||||
{PB_14_ALT2, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1
|
||||
{PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
|
||||
{PB_15_ALT2, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2
|
||||
{PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
|
||||
{PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
||||
{PC_7_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
|
||||
{PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
|
||||
{PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3
|
||||
{PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
|
||||
{PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4
|
||||
{PC_12, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM15, 1, 0)}, // TIM15_CH1
|
||||
{PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
|
||||
{PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
|
||||
{PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
|
||||
{PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
|
||||
{PE_4, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N
|
||||
{PE_5, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1
|
||||
{PE_6, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2
|
||||
{PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
||||
{PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
|
||||
{PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
||||
{PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
|
||||
{PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
|
||||
{PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** UART ***
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_UART_TX[] = {
|
||||
{PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)},
|
||||
{PA_9_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PA_12, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)},
|
||||
{PA_15, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
|
||||
{PB_4, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
|
||||
{PB_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)},
|
||||
{PB_6_ALT1, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
|
||||
{PB_6_ALT2, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_9, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PB_13, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
|
||||
{PB_14, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)},
|
||||
{PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_15, UART9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PE_1, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||
{PE_3, USART10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_USART10)},
|
||||
{PE_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_UART_RX[] = {
|
||||
{PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
|
||||
{PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)},
|
||||
{PA_10_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PA_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)},
|
||||
{PB_3, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
|
||||
{PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
|
||||
{PB_7, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)},
|
||||
{PB_7_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_8, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PB_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
|
||||
{PB_15, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)},
|
||||
{PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_14, UART9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PE_0, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||
{PE_2, USART10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART10)},
|
||||
{PE_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_UART_RTS[] = {
|
||||
{PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)},
|
||||
{PA_12_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_14, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_14_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_13, UART9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PD_15, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||
{PE_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_UART_CTS[] = {
|
||||
{PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)},
|
||||
{PA_11_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PB_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_0, UART9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_14, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||
{PE_10, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** SPI ***
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SPI_MOSI[] = {
|
||||
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PA_7_ALT1, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)},
|
||||
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)},
|
||||
{PB_5_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_3_C, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)},
|
||||
{PD_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SPI_MISO[] = {
|
||||
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PA_6_ALT1, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PB_4_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_2_C, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SPI_SCLK[] = {
|
||||
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PA_5_ALT1, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PA_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PB_3_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PC_12, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)},
|
||||
{PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SPI_SSEL[] = {
|
||||
{PA_0, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)},
|
||||
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PA_4_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PA_11, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PA_15_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI6)},
|
||||
{PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)},
|
||||
{PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** FDCAN ***
|
||||
|
||||
#ifdef HAL_FDCAN_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_CAN_RD[] = {
|
||||
{PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PB_5, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
|
||||
{PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PB_12, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
|
||||
{PD_0, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PD_12, FDCAN3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_FDCAN3)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_FDCAN_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_CAN_TD[] = {
|
||||
{PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PB_6, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
|
||||
{PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
|
||||
{PD_1, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PD_13, FDCAN3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_FDCAN3)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** ETHERNET ***
|
||||
|
||||
#if defined(HAL_ETH_MODULE_ENABLED) || defined(HAL_ETH_LEGACY_MODULE_ENABLED)
|
||||
WEAK const PinMap PinMap_Ethernet[] = {
|
||||
{PA_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS
|
||||
{PA_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK
|
||||
{PA_1_ALT1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_CLK
|
||||
{PA_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO
|
||||
{PA_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL
|
||||
{PA_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV
|
||||
{PA_7_ALT1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_DV
|
||||
{PA_9, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_ER
|
||||
{PB_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2
|
||||
{PB_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3
|
||||
{PB_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_ER
|
||||
{PB_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
|
||||
{PB_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
|
||||
{PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER
|
||||
{PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
|
||||
{PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
|
||||
{PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
|
||||
{PC_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC
|
||||
{PC_2_C, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2
|
||||
{PC_3_C, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK
|
||||
{PC_4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0
|
||||
{PC_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1
|
||||
{PE_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** OCTOSPI ***
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA0[] = {
|
||||
{PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PB_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PC_3_C, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PC_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PD_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA1[] = {
|
||||
{PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{PC_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{PD_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA2[] = {
|
||||
{PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PB_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PC_2_C, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PE_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA3[] = {
|
||||
{PA_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{PD_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA4[] = {
|
||||
{PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO4
|
||||
{PD_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO4
|
||||
{PE_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO4
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA5[] = {
|
||||
{PC_2_C, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO5
|
||||
{PD_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO5
|
||||
{PE_8, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO5
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA6[] = {
|
||||
{PC_3_C, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6
|
||||
{PD_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6
|
||||
{PE_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA7[] = {
|
||||
{PD_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO7
|
||||
{PE_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO7
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_SCLK[] = {
|
||||
{PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
|
||||
{PB_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_SSEL[] = {
|
||||
{PB_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PC_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PE_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** USB ***
|
||||
|
||||
#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED)
|
||||
WEAK const PinMap PinMap_USB_OTG_HS[] = {
|
||||
#ifdef USE_USB_HS_IN_FS
|
||||
{PA_8, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_SOF
|
||||
{PA_9, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS
|
||||
{PA_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ID
|
||||
{PA_11, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF_NONE)}, // USB_OTG_HS_DM
|
||||
{PA_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF_NONE)}, // USB_OTG_HS_DP
|
||||
#else
|
||||
{PA_3, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D0
|
||||
{PA_5, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_CK
|
||||
{PB_0, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D1
|
||||
{PB_1, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D2
|
||||
{PB_5, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D7
|
||||
{PB_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D3
|
||||
{PB_11, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D4
|
||||
{PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D5
|
||||
{PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D6
|
||||
{PC_0, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_STP
|
||||
{PC_2_C, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_DIR
|
||||
{PC_3_C, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_NXT
|
||||
#endif /* USE_USB_HS_IN_FS */
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** SD ***
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SD[] = {
|
||||
{PA_0, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_SDMMC2)}, // SDMMC2_CMD
|
||||
{PB_3, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDMMC2)}, // SDMMC2_D2
|
||||
{PB_4, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDMMC2)}, // SDMMC2_D3
|
||||
{PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF7_SDMMC1)}, // SDMMC1_CKIN
|
||||
{PB_8_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4
|
||||
{PB_8_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D4
|
||||
{PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF7_SDMMC1)}, // SDMMC1_CDIR
|
||||
{PB_9_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5
|
||||
{PB_9_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D5
|
||||
{PB_13, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0
|
||||
{PB_14, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDMMC2)}, // SDMMC2_D0
|
||||
{PB_15, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDMMC2)}, // SDMMC2_D1
|
||||
{PC_1, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_SDMMC2)}, // SDMMC2_CK
|
||||
{PC_4, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_SDMMC2)}, // SDMMC2_CKIN
|
||||
{PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR
|
||||
{PC_6_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6
|
||||
{PC_6_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D6
|
||||
{PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR
|
||||
{PC_7_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7
|
||||
{PC_7_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D7
|
||||
{PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0
|
||||
{PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1
|
||||
{PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2
|
||||
{PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3
|
||||
{PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CK
|
||||
{PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD
|
||||
{PD_6, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDMMC2)}, // SDMMC2_CK
|
||||
{PD_7, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDMMC2)}, // SDMMC2_CMD
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#endif /* !CUSTOM_PERIPHERAL_PINS */
|
108
buildroot/share/PlatformIO/variants/MARLIN_H723Vx/PinNamesVar.h
Normal file
108
buildroot/share/PlatformIO/variants/MARLIN_H723Vx/PinNamesVar.h
Normal file
@@ -0,0 +1,108 @@
|
||||
/* Dual pad pin name */
|
||||
PC_2_C = PC_2 | PDUAL,
|
||||
PC_3_C = PC_3 | PDUAL,
|
||||
|
||||
/* Alternate pin name */
|
||||
PA_0_ALT1 = PA_0 | ALT1,
|
||||
PA_1_ALT1 = PA_1 | ALT1,
|
||||
PA_1_ALT2 = PA_1 | ALT2,
|
||||
PA_2_ALT1 = PA_2 | ALT1,
|
||||
PA_2_ALT2 = PA_2 | ALT2,
|
||||
PA_3_ALT1 = PA_3 | ALT1,
|
||||
PA_3_ALT2 = PA_3 | ALT2,
|
||||
PA_4_ALT1 = PA_4 | ALT1,
|
||||
PA_4_ALT2 = PA_4 | ALT2,
|
||||
PA_5_ALT1 = PA_5 | ALT1,
|
||||
PA_6_ALT1 = PA_6 | ALT1,
|
||||
PA_7_ALT1 = PA_7 | ALT1,
|
||||
PA_7_ALT2 = PA_7 | ALT2,
|
||||
PA_7_ALT3 = PA_7 | ALT3,
|
||||
PA_8_ALT1 = PA_8 | ALT1,
|
||||
PA_9_ALT1 = PA_9 | ALT1,
|
||||
PA_10_ALT1 = PA_10 | ALT1,
|
||||
PA_11_ALT1 = PA_11 | ALT1,
|
||||
PA_12_ALT1 = PA_12 | ALT1,
|
||||
PA_15_ALT1 = PA_15 | ALT1,
|
||||
PA_15_ALT2 = PA_15 | ALT2,
|
||||
PB_0_ALT1 = PB_0 | ALT1,
|
||||
PB_0_ALT2 = PB_0 | ALT2,
|
||||
PB_1_ALT1 = PB_1 | ALT1,
|
||||
PB_1_ALT2 = PB_1 | ALT2,
|
||||
PB_3_ALT1 = PB_3 | ALT1,
|
||||
PB_3_ALT2 = PB_3 | ALT2,
|
||||
PB_4_ALT1 = PB_4 | ALT1,
|
||||
PB_4_ALT2 = PB_4 | ALT2,
|
||||
PB_5_ALT1 = PB_5 | ALT1,
|
||||
PB_5_ALT2 = PB_5 | ALT2,
|
||||
PB_6_ALT1 = PB_6 | ALT1,
|
||||
PB_6_ALT2 = PB_6 | ALT2,
|
||||
PB_7_ALT1 = PB_7 | ALT1,
|
||||
PB_8_ALT1 = PB_8 | ALT1,
|
||||
PB_8_ALT2 = PB_8 | ALT2,
|
||||
PB_9_ALT1 = PB_9 | ALT1,
|
||||
PB_9_ALT2 = PB_9 | ALT2,
|
||||
PB_14_ALT1 = PB_14 | ALT1,
|
||||
PB_14_ALT2 = PB_14 | ALT2,
|
||||
PB_15_ALT1 = PB_15 | ALT1,
|
||||
PB_15_ALT2 = PB_15 | ALT2,
|
||||
PC_0_ALT1 = PC_0 | ALT1,
|
||||
PC_0_ALT2 = PC_0 | ALT2,
|
||||
PC_1_ALT1 = PC_1 | ALT1,
|
||||
PC_1_ALT2 = PC_1 | ALT2,
|
||||
PC_4_ALT1 = PC_4 | ALT1,
|
||||
PC_5_ALT1 = PC_5 | ALT1,
|
||||
PC_6_ALT1 = PC_6 | ALT1,
|
||||
PC_6_ALT2 = PC_6 | ALT2,
|
||||
PC_7_ALT1 = PC_7 | ALT1,
|
||||
PC_7_ALT2 = PC_7 | ALT2,
|
||||
PC_8_ALT1 = PC_8 | ALT1,
|
||||
PC_9_ALT1 = PC_9 | ALT1,
|
||||
PC_10_ALT1 = PC_10 | ALT1,
|
||||
PC_11_ALT1 = PC_11 | ALT1,
|
||||
|
||||
/* SYS_WKUP */
|
||||
#ifdef PWR_WAKEUP_PIN1
|
||||
SYS_WKUP1 = PA_0,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN2
|
||||
SYS_WKUP2 = PA_2,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN3
|
||||
SYS_WKUP3 = NC,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN4
|
||||
SYS_WKUP4 = PC_13,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN5
|
||||
SYS_WKUP5 = NC,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN6
|
||||
SYS_WKUP6 = PC_1,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN7
|
||||
SYS_WKUP7 = NC,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN8
|
||||
SYS_WKUP8 = NC,
|
||||
#endif
|
||||
|
||||
/* USB */
|
||||
#ifdef USBCON
|
||||
USB_OTG_HS_DM = PA_11,
|
||||
USB_OTG_HS_DP = PA_12,
|
||||
USB_OTG_HS_ID = PA_10,
|
||||
USB_OTG_HS_SOF = PA_8,
|
||||
USB_OTG_HS_ULPI_CK = PA_5,
|
||||
USB_OTG_HS_ULPI_D0 = PA_3,
|
||||
USB_OTG_HS_ULPI_D1 = PB_0,
|
||||
USB_OTG_HS_ULPI_D2 = PB_1,
|
||||
USB_OTG_HS_ULPI_D3 = PB_10,
|
||||
USB_OTG_HS_ULPI_D4 = PB_11,
|
||||
USB_OTG_HS_ULPI_D5 = PB_12,
|
||||
USB_OTG_HS_ULPI_D6 = PB_13,
|
||||
USB_OTG_HS_ULPI_D7 = PB_5,
|
||||
USB_OTG_HS_ULPI_DIR = PC_2_C,
|
||||
USB_OTG_HS_ULPI_NXT = PC_3_C,
|
||||
USB_OTG_HS_ULPI_STP = PC_0,
|
||||
USB_OTG_HS_VBUS = PA_9,
|
||||
#endif
|
174
buildroot/share/PlatformIO/variants/MARLIN_H723Vx/ldscript.ld
Normal file
174
buildroot/share/PlatformIO/variants/MARLIN_H723Vx/ldscript.ld
Normal file
@@ -0,0 +1,174 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32H7 series
|
||||
** 512Kbytes FLASH and 560Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is, without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** Copyright (c) 2022 STMicroelectronics.
|
||||
** All rights reserved.
|
||||
**
|
||||
** This software is licensed under terms that can be found in the LICENSE file
|
||||
** in the root directory of this software component.
|
||||
** If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
**
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM_D1) + LENGTH(RAM_D1); /* end of RAM */
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x200 ; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400 ; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K
|
||||
DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
|
||||
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
|
||||
RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = 320K
|
||||
RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 32K
|
||||
RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 16K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
|
||||
.ARM : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
*(.RamFunc) /* .RamFunc sections */
|
||||
*(.RamFunc*) /* .RamFunc* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM_D1 AT> FLASH
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM_D1
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM_D1
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
@@ -0,0 +1,273 @@
|
||||
/*
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2020-2021, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
#ifdef STM32H723xx
|
||||
#include "pins_arduino.h"
|
||||
|
||||
// Digital PinName array
|
||||
const PinName digitalPin[] = {
|
||||
PA_0, // D0/A0
|
||||
PA_1, // D1/A1
|
||||
PA_2, // D2/A2
|
||||
PA_3, // D3/A3
|
||||
PA_4, // D4/A4
|
||||
PA_5, // D5/A5
|
||||
PA_6, // D6/A6
|
||||
PA_7, // D7/A7
|
||||
PA_8, // D8
|
||||
PA_9, // D9
|
||||
PA_10, // D10
|
||||
PA_11, // D11
|
||||
PA_12, // D12
|
||||
PA_13, // D13
|
||||
PA_14, // D14
|
||||
PA_15, // D15
|
||||
PB_0, // D16/A8
|
||||
PB_1, // D17/A9
|
||||
PB_2, // D18
|
||||
PB_3, // D19
|
||||
PB_4, // D20
|
||||
PB_5, // D21
|
||||
PB_6, // D22
|
||||
PB_7, // D23
|
||||
PB_8, // D24
|
||||
PB_9, // D25
|
||||
PB_10, // D26
|
||||
PB_11, // D27
|
||||
PB_12, // D28
|
||||
PB_13, // D29
|
||||
PB_14, // D30
|
||||
PB_15, // D31
|
||||
PC_0, // D32/A10
|
||||
PC_1, // D33/A11
|
||||
PC_4, // D34/A12
|
||||
PC_5, // D35/A13
|
||||
PC_6, // D36
|
||||
PC_7, // D37
|
||||
PC_8, // D38
|
||||
PC_9, // D39
|
||||
PC_10, // D40
|
||||
PC_11, // D41
|
||||
PC_12, // D42
|
||||
PC_13, // D43
|
||||
PC_14, // D44
|
||||
PC_15, // D45
|
||||
PD_0, // D46
|
||||
PD_1, // D47
|
||||
PD_2, // D48
|
||||
PD_3, // D49
|
||||
PD_4, // D50
|
||||
PD_5, // D51
|
||||
PD_6, // D52
|
||||
PD_7, // D53
|
||||
PD_8, // D54
|
||||
PD_9, // D55
|
||||
PD_10, // D56
|
||||
PD_11, // D57
|
||||
PD_12, // D58
|
||||
PD_13, // D59
|
||||
PD_14, // D60
|
||||
PD_15, // D61
|
||||
PE_0, // D62
|
||||
PE_1, // D63
|
||||
PE_2, // D64
|
||||
PE_3, // D65
|
||||
PE_4, // D66
|
||||
PE_5, // D67
|
||||
PE_6, // D68
|
||||
PE_7, // D69
|
||||
PE_8, // D70
|
||||
PE_9, // D71
|
||||
PE_10, // D72
|
||||
PE_11, // D73
|
||||
PE_12, // D74
|
||||
PE_13, // D75
|
||||
PE_14, // D76
|
||||
PE_15, // D77
|
||||
PH_0, // D78
|
||||
PH_1, // D79
|
||||
PC_2_C, // D80/A14
|
||||
PC_3_C // D81/A15
|
||||
};
|
||||
|
||||
// Analog (Ax) pin number array
|
||||
const uint32_t analogInputPin[] = {
|
||||
0, // A0, PA0
|
||||
1, // A1, PA1
|
||||
2, // A2, PA2
|
||||
3, // A3, PA3
|
||||
4, // A4, PA4
|
||||
5, // A5, PA5
|
||||
6, // A6, PA6
|
||||
7, // A7, PA7
|
||||
16, // A8, PB0
|
||||
17, // A9, PB1
|
||||
32, // A10, PC0
|
||||
33, // A11, PC1
|
||||
34, // A12, PC4
|
||||
35, // A13, PC5
|
||||
80, // A14, PC2_C
|
||||
81 // A15, PC3_C
|
||||
};
|
||||
|
||||
void MPU_Config(void)
|
||||
{
|
||||
MPU_Region_InitTypeDef MPU_InitStruct = {0};
|
||||
|
||||
/* Disables the MPU */
|
||||
HAL_MPU_Disable();
|
||||
|
||||
/** Initializes and configures the Region and the memory to be protected
|
||||
*/
|
||||
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
|
||||
MPU_InitStruct.Number = MPU_REGION_NUMBER0;
|
||||
MPU_InitStruct.BaseAddress = 0x0;
|
||||
MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
|
||||
MPU_InitStruct.SubRegionDisable = 0x87;
|
||||
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
|
||||
MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
|
||||
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
|
||||
MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
|
||||
MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
|
||||
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
|
||||
|
||||
HAL_MPU_ConfigRegion(&MPU_InitStruct);
|
||||
/* Enables the MPU */
|
||||
HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* @brief System Clock Configuration
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
WEAK void SystemClock_Config(void)
|
||||
{
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
|
||||
|
||||
MPU_Config();
|
||||
|
||||
/** Supply configuration update enable
|
||||
*/
|
||||
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
|
||||
/** Configure the main internal regulator output voltage
|
||||
*/
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
|
||||
|
||||
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
|
||||
/** Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure.
|
||||
*/
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; // 48Mhz for USB
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 5; // 25Mhz / 5 = 5Mhz
|
||||
RCC_OscInitStruct.PLL.PLLN = 110; // 25Mhz / 5 * 110 = 550Mhz
|
||||
RCC_OscInitStruct.PLL.PLLP = 1; // 550Mhz / 1 = 550Mhz
|
||||
RCC_OscInitStruct.PLL.PLLQ = 10; // 550Mhz / 10 = 55Mhz
|
||||
RCC_OscInitStruct.PLL.PLLR = 10; // unused
|
||||
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
|
||||
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
|
||||
RCC_OscInitStruct.PLL.PLLFRACN = 0;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/** Initializes the CPU, AHB and APB buses clocks
|
||||
*/
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|
||||
|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
|
||||
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
|
||||
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
|
||||
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB
|
||||
| RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_ADC
|
||||
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USART16
|
||||
| RCC_PERIPHCLK_USART234578 | RCC_PERIPHCLK_I2C123
|
||||
| RCC_PERIPHCLK_I2C4 | RCC_PERIPHCLK_SPI123
|
||||
| RCC_PERIPHCLK_SPI45 | RCC_PERIPHCLK_SPI6;
|
||||
|
||||
/* HSI48 used for USB 48 Mhz */
|
||||
/* PLL1 qclk also used for FMC, SDMMC, RNG, SAI */
|
||||
/* PLL2 pclk is needed for adc max 80 Mhz (p,q,r same) */
|
||||
/* PLL2 pclk also used for LP timers 2,3,4,5, SPI 1,2,3 */
|
||||
/* PLL2 qclk is needed for uart, can, spi4,5,6 80 Mhz */
|
||||
/* PLL3 r clk is needed for i2c 80 Mhz (p,q,r same) */
|
||||
PeriphClkInitStruct.PLL2.PLL2M = 15; // M DIV 15 vco 25 / 15 ~ 1.667 Mhz
|
||||
PeriphClkInitStruct.PLL2.PLL2N = 96; // N MUL 96
|
||||
PeriphClkInitStruct.PLL2.PLL2P = 2; // P div 2
|
||||
PeriphClkInitStruct.PLL2.PLL2Q = 2; // Q div 2
|
||||
PeriphClkInitStruct.PLL2.PLL2R = 2; // R div 2
|
||||
// RCC_PLL1VCIRANGE_0 Clock range frequency between 1 and 2 MHz
|
||||
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_0;
|
||||
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOMEDIUM;
|
||||
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
|
||||
PeriphClkInitStruct.PLL3.PLL3M = 15; // M DIV 15 vco 25 / 15 ~ 1.667 Mhz
|
||||
PeriphClkInitStruct.PLL3.PLL3N = 96; // N MUL 96
|
||||
PeriphClkInitStruct.PLL3.PLL3P = 2; // P div 2
|
||||
PeriphClkInitStruct.PLL3.PLL3Q = 2; // Q div 2
|
||||
PeriphClkInitStruct.PLL3.PLL3R = 2; // R div 2
|
||||
// RCC_PLL1VCIRANGE_0 Clock range frequency between 1 and 2 MHz
|
||||
PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_0;
|
||||
PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOMEDIUM;
|
||||
PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
|
||||
// ADC from PLL2 pclk
|
||||
PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
|
||||
// USB from HSI48
|
||||
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
|
||||
// SDMMC from PLL1 qclk
|
||||
PeriphClkInitStruct.SdmmcClockSelection = 0;
|
||||
//PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;
|
||||
// LPUART from PLL2 qclk
|
||||
PeriphClkInitStruct.Lpuart1ClockSelection = 0;
|
||||
//PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2;
|
||||
// USART from PLL2 qclk
|
||||
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_PLL2;
|
||||
// USART from PLL2 qclk
|
||||
PeriphClkInitStruct.Usart234578ClockSelection = 0;
|
||||
//PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_PLL2;
|
||||
// I2C123 from PLL3 rclk
|
||||
PeriphClkInitStruct.I2c123ClockSelection = RCC_I2C123CLKSOURCE_PLL3;
|
||||
// I2C4 from PLL3 rclk
|
||||
PeriphClkInitStruct.I2c4ClockSelection = 0;
|
||||
//PeriphClkInitStruct.I2c4ClockSelection = RCC_I2C4CLKSOURCE_PLL3;
|
||||
// SPI123 from PLL2 pclk
|
||||
PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL2;
|
||||
// SPI45 from PLL2 qclk
|
||||
PeriphClkInitStruct.Spi45ClockSelection = 0;
|
||||
//PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_PLL2;
|
||||
// SPI6 from PLL2 qclk
|
||||
PeriphClkInitStruct.Spi6ClockSelection = 0;
|
||||
//PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL2;
|
||||
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* ARDUINO_GENERIC_* */
|
@@ -0,0 +1,269 @@
|
||||
/*
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2020, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* STM32 pins number
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define PA0 PIN_A0
|
||||
#define PA1 PIN_A1
|
||||
#define PA2 PIN_A2
|
||||
#define PA3 PIN_A3
|
||||
#define PA4 PIN_A4
|
||||
#define PA5 PIN_A5
|
||||
#define PA6 PIN_A6
|
||||
#define PA7 PIN_A7
|
||||
#define PA8 8
|
||||
#define PA9 9
|
||||
#define PA10 10
|
||||
#define PA11 11
|
||||
#define PA12 12
|
||||
#define PA13 13
|
||||
#define PA14 14
|
||||
#define PA15 15
|
||||
#define PB0 PIN_A8
|
||||
#define PB1 PIN_A9
|
||||
#define PB2 18
|
||||
#define PB3 19
|
||||
#define PB4 20
|
||||
#define PB5 21
|
||||
#define PB6 22
|
||||
#define PB7 23
|
||||
#define PB8 24
|
||||
#define PB9 25
|
||||
#define PB10 26
|
||||
#define PB11 27
|
||||
#define PB12 28
|
||||
#define PB13 29
|
||||
#define PB14 30
|
||||
#define PB15 31
|
||||
#define PC0 PIN_A10
|
||||
#define PC1 PIN_A11
|
||||
#define PC4 PIN_A12
|
||||
#define PC5 PIN_A13
|
||||
#define PC6 36
|
||||
#define PC7 37
|
||||
#define PC8 38
|
||||
#define PC9 39
|
||||
#define PC10 40
|
||||
#define PC11 41
|
||||
#define PC12 42
|
||||
#define PC13 43
|
||||
#define PC14 44
|
||||
#define PC15 45
|
||||
#define PD0 46
|
||||
#define PD1 47
|
||||
#define PD2 48
|
||||
#define PD3 49
|
||||
#define PD4 50
|
||||
#define PD5 51
|
||||
#define PD6 52
|
||||
#define PD7 53
|
||||
#define PD8 54
|
||||
#define PD9 55
|
||||
#define PD10 56
|
||||
#define PD11 57
|
||||
#define PD12 58
|
||||
#define PD13 59
|
||||
#define PD14 60
|
||||
#define PD15 61
|
||||
#define PE0 62
|
||||
#define PE1 63
|
||||
#define PE2 64
|
||||
#define PE3 65
|
||||
#define PE4 66
|
||||
#define PE5 67
|
||||
#define PE6 68
|
||||
#define PE7 69
|
||||
#define PE8 70
|
||||
#define PE9 71
|
||||
#define PE10 72
|
||||
#define PE11 73
|
||||
#define PE12 74
|
||||
#define PE13 75
|
||||
#define PE14 76
|
||||
#define PE15 77
|
||||
#define PH0 78
|
||||
#define PH1 79
|
||||
#define PC2_C PIN_A14
|
||||
#define PC3_C PIN_A15
|
||||
#define PC2 PC2_C
|
||||
#define PC3 PC3_C
|
||||
|
||||
// Alternate pins number
|
||||
#define PA0_ALT1 (PA0 | ALT1)
|
||||
#define PA1_ALT1 (PA1 | ALT1)
|
||||
#define PA1_ALT2 (PA1 | ALT2)
|
||||
#define PA2_ALT1 (PA2 | ALT1)
|
||||
#define PA2_ALT2 (PA2 | ALT2)
|
||||
#define PA3_ALT1 (PA3 | ALT1)
|
||||
#define PA3_ALT2 (PA3 | ALT2)
|
||||
#define PA4_ALT1 (PA4 | ALT1)
|
||||
#define PA4_ALT2 (PA4 | ALT2)
|
||||
#define PA5_ALT1 (PA5 | ALT1)
|
||||
#define PA6_ALT1 (PA6 | ALT1)
|
||||
#define PA7_ALT1 (PA7 | ALT1)
|
||||
#define PA7_ALT2 (PA7 | ALT2)
|
||||
#define PA7_ALT3 (PA7 | ALT3)
|
||||
#define PA8_ALT1 (PA8 | ALT1)
|
||||
#define PA9_ALT1 (PA9 | ALT1)
|
||||
#define PA10_ALT1 (PA10 | ALT1)
|
||||
#define PA11_ALT1 (PA11 | ALT1)
|
||||
#define PA12_ALT1 (PA12 | ALT1)
|
||||
#define PA15_ALT1 (PA15 | ALT1)
|
||||
#define PA15_ALT2 (PA15 | ALT2)
|
||||
#define PB0_ALT1 (PB0 | ALT1)
|
||||
#define PB0_ALT2 (PB0 | ALT2)
|
||||
#define PB1_ALT1 (PB1 | ALT1)
|
||||
#define PB1_ALT2 (PB1 | ALT2)
|
||||
#define PB3_ALT1 (PB3 | ALT1)
|
||||
#define PB3_ALT2 (PB3 | ALT2)
|
||||
#define PB4_ALT1 (PB4 | ALT1)
|
||||
#define PB4_ALT2 (PB4 | ALT2)
|
||||
#define PB5_ALT1 (PB5 | ALT1)
|
||||
#define PB5_ALT2 (PB5 | ALT2)
|
||||
#define PB6_ALT1 (PB6 | ALT1)
|
||||
#define PB6_ALT2 (PB6 | ALT2)
|
||||
#define PB7_ALT1 (PB7 | ALT1)
|
||||
#define PB8_ALT1 (PB8 | ALT1)
|
||||
#define PB8_ALT2 (PB8 | ALT2)
|
||||
#define PB9_ALT1 (PB9 | ALT1)
|
||||
#define PB9_ALT2 (PB9 | ALT2)
|
||||
#define PB14_ALT1 (PB14 | ALT1)
|
||||
#define PB14_ALT2 (PB14 | ALT2)
|
||||
#define PB15_ALT1 (PB15 | ALT1)
|
||||
#define PB15_ALT2 (PB15 | ALT2)
|
||||
#define PC0_ALT1 (PC0 | ALT1)
|
||||
#define PC0_ALT2 (PC0 | ALT2)
|
||||
#define PC1_ALT1 (PC1 | ALT1)
|
||||
#define PC1_ALT2 (PC1 | ALT2)
|
||||
#define PC4_ALT1 (PC4 | ALT1)
|
||||
#define PC5_ALT1 (PC5 | ALT1)
|
||||
#define PC6_ALT1 (PC6 | ALT1)
|
||||
#define PC6_ALT2 (PC6 | ALT2)
|
||||
#define PC7_ALT1 (PC7 | ALT1)
|
||||
#define PC7_ALT2 (PC7 | ALT2)
|
||||
#define PC8_ALT1 (PC8 | ALT1)
|
||||
#define PC9_ALT1 (PC9 | ALT1)
|
||||
#define PC10_ALT1 (PC10 | ALT1)
|
||||
#define PC11_ALT1 (PC11 | ALT1)
|
||||
|
||||
#define NUM_DIGITAL_PINS 82
|
||||
#define NUM_DUALPAD_PINS 2
|
||||
#define NUM_ANALOG_INPUTS 16
|
||||
|
||||
// On-board LED pin number
|
||||
#ifndef LED_BUILTIN
|
||||
#define LED_BUILTIN PNUM_NOT_DEFINED
|
||||
#endif
|
||||
|
||||
// On-board user button
|
||||
#ifndef USER_BTN
|
||||
#define USER_BTN PNUM_NOT_DEFINED
|
||||
#endif
|
||||
|
||||
// SPI definitions
|
||||
#ifndef PIN_SPI_SS
|
||||
#define PIN_SPI_SS PA4
|
||||
#endif
|
||||
#ifndef PIN_SPI_SS1
|
||||
#define PIN_SPI_SS1 PA15
|
||||
#endif
|
||||
#ifndef PIN_SPI_SS2
|
||||
#define PIN_SPI_SS2 PNUM_NOT_DEFINED
|
||||
#endif
|
||||
#ifndef PIN_SPI_SS3
|
||||
#define PIN_SPI_SS3 PNUM_NOT_DEFINED
|
||||
#endif
|
||||
#ifndef PIN_SPI_MOSI
|
||||
#define PIN_SPI_MOSI PA7
|
||||
#endif
|
||||
#ifndef PIN_SPI_MISO
|
||||
#define PIN_SPI_MISO PA6
|
||||
#endif
|
||||
#ifndef PIN_SPI_SCK
|
||||
#define PIN_SPI_SCK PA5
|
||||
#endif
|
||||
|
||||
// I2C definitions
|
||||
#ifndef PIN_WIRE_SDA
|
||||
#define PIN_WIRE_SDA PB7
|
||||
#endif
|
||||
#ifndef PIN_WIRE_SCL
|
||||
#define PIN_WIRE_SCL PB6
|
||||
#endif
|
||||
|
||||
// Timer Definitions
|
||||
// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
|
||||
#ifndef TIMER_TONE
|
||||
#define TIMER_TONE TIM6
|
||||
#endif
|
||||
#ifndef TIMER_SERVO
|
||||
#define TIMER_SERVO TIM7
|
||||
#endif
|
||||
|
||||
// UART Definitions
|
||||
#ifndef SERIAL_UART_INSTANCE
|
||||
#define SERIAL_UART_INSTANCE 4
|
||||
#endif
|
||||
|
||||
// Default pin used for generic 'Serial' instance
|
||||
// Mandatory for Firmata
|
||||
#ifndef PIN_SERIAL_RX
|
||||
#define PIN_SERIAL_RX PA1
|
||||
#endif
|
||||
#ifndef PIN_SERIAL_TX
|
||||
#define PIN_SERIAL_TX PA0
|
||||
#endif
|
||||
|
||||
// Extra HAL modules
|
||||
#if !defined(HAL_DAC_MODULE_DISABLED)
|
||||
#define HAL_DAC_MODULE_ENABLED
|
||||
#endif
|
||||
#if !defined(HAL_ETH_MODULE_DISABLED)
|
||||
#define HAL_ETH_MODULE_ENABLED
|
||||
#endif
|
||||
#if !defined(HAL_OSPI_MODULE_DISABLED)
|
||||
#define HAL_OSPI_MODULE_ENABLED
|
||||
#endif
|
||||
#if !defined(HAL_SD_MODULE_DISABLED)
|
||||
#define HAL_SD_MODULE_ENABLED
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
// These serial port names are intended to allow libraries and architecture-neutral
|
||||
// sketches to automatically default to the correct port name for a particular type
|
||||
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
|
||||
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
|
||||
//
|
||||
// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
|
||||
//
|
||||
// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
|
||||
//
|
||||
// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
|
||||
//
|
||||
// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
|
||||
//
|
||||
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
|
||||
// pins are NOT connected to anything by default.
|
||||
#ifndef SERIAL_PORT_MONITOR
|
||||
#define SERIAL_PORT_MONITOR Serial
|
||||
#endif
|
||||
#ifndef SERIAL_PORT_HARDWARE
|
||||
#define SERIAL_PORT_HARDWARE Serial
|
||||
#endif
|
||||
#endif
|
@@ -0,0 +1,688 @@
|
||||
/*
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2020-2021, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
/*
|
||||
* Automatically generated from STM32H723ZETx.xml, STM32H723ZGTx.xml
|
||||
* STM32H733ZGTx.xml
|
||||
* CubeMX DB release 6.0.30
|
||||
*/
|
||||
#if !defined(CUSTOM_PERIPHERAL_PINS)
|
||||
#include "Arduino.h"
|
||||
#include "PeripheralPins.h"
|
||||
|
||||
/* =====
|
||||
* Notes:
|
||||
* - The pins mentioned Px_y_ALTz are alternative possibilities which use other
|
||||
* HW peripheral instances. You can use them the same way as any other "normal"
|
||||
* pin (i.e. analogWrite(PA7_ALT1, 128);).
|
||||
*
|
||||
* - Commented lines are alternative possibilities which are not used per default.
|
||||
* If you change them, you will have to know what you do
|
||||
* =====
|
||||
*/
|
||||
|
||||
//*** ADC ***
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_ADC[] = {
|
||||
{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_INP16
|
||||
{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC1_INP17
|
||||
{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_INP14
|
||||
{PA_2_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_INP14
|
||||
{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_INP15
|
||||
{PA_3_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_INP15
|
||||
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC1_INP18
|
||||
{PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC2_INP18
|
||||
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC1_INP19
|
||||
{PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC2_INP19
|
||||
{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_INP3
|
||||
{PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_INP3
|
||||
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_INP7
|
||||
{PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_INP7
|
||||
{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_INP9
|
||||
{PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_INP9
|
||||
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INP5
|
||||
{PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INP5
|
||||
{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INP10
|
||||
{PC_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INP10
|
||||
{PC_0_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_INP10
|
||||
{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_INP11
|
||||
{PC_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_INP11
|
||||
{PC_1_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_INP11
|
||||
{PC_2_C, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_INP0
|
||||
{PC_3_C, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_INP1
|
||||
{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_INP4
|
||||
{PC_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_INP4
|
||||
{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_INP8
|
||||
{PC_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_INP8
|
||||
{PF_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_INP5
|
||||
{PF_4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_INP9
|
||||
{PF_5, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_INP4
|
||||
{PF_6, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_INP8
|
||||
{PF_7, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_INP3
|
||||
{PF_8, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_INP7
|
||||
{PF_9, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_INP2
|
||||
{PF_10, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_INP6
|
||||
{PF_11, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_INP2
|
||||
{PF_12, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_INP6
|
||||
{PF_13, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_INP2
|
||||
{PF_14, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_INP6
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** DAC ***
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_DAC[] = {
|
||||
{PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1
|
||||
{PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** I2C ***
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_I2C_SDA[] = {
|
||||
{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||
{PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
|
||||
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||
{PB_9_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
|
||||
{PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||
{PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
|
||||
{PC_9_ALT1, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C5)},
|
||||
{PC_10, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C5)},
|
||||
{PD_13, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
|
||||
{PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||
{PF_0_ALT1, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C5)},
|
||||
{PF_15, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_I2C_SCL[] = {
|
||||
{PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
|
||||
{PA_8_ALT1, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C5)},
|
||||
{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||
{PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
|
||||
{PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||
{PB_8_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
|
||||
{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||
{PC_11, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C5)},
|
||||
{PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
|
||||
{PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||
{PF_1_ALT1, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C5)},
|
||||
{PF_14, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** TIM ***
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_TIM[] = {
|
||||
{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
||||
{PA_0_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
|
||||
{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
|
||||
{PA_1_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
|
||||
{PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N
|
||||
{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
|
||||
{PA_2_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
|
||||
{PA_2_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1
|
||||
{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
|
||||
{PA_3_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
|
||||
{PA_3_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2
|
||||
{PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
||||
{PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
|
||||
{PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PA_6_ALT1, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
|
||||
{PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
||||
{PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
||||
{PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
|
||||
{PA_7_ALT3, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
|
||||
{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
|
||||
{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
|
||||
{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
|
||||
{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
|
||||
{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
||||
{PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
||||
{PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
|
||||
{PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
|
||||
{PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
|
||||
{PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
|
||||
{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
|
||||
{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
||||
{PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
|
||||
{PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N
|
||||
{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
|
||||
{PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N
|
||||
{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
|
||||
{PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1
|
||||
{PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
|
||||
{PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1
|
||||
{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
|
||||
{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
|
||||
{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
||||
{PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
||||
{PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
|
||||
{PB_14_ALT2, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1
|
||||
{PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
|
||||
{PB_15_ALT2, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2
|
||||
{PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
|
||||
{PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
||||
{PC_7_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
|
||||
{PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
|
||||
{PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3
|
||||
{PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
|
||||
{PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4
|
||||
{PC_12, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM15, 1, 0)}, // TIM15_CH1
|
||||
{PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
|
||||
{PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
|
||||
{PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
|
||||
{PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
|
||||
{PE_4, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N
|
||||
{PE_5, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1
|
||||
{PE_6, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2
|
||||
{PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
||||
{PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
|
||||
{PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
||||
{PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
|
||||
{PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
|
||||
{PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
|
||||
{PF_0, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 1, 0)}, // TIM23_CH1
|
||||
{PF_1, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 2, 0)}, // TIM23_CH2
|
||||
{PF_2, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 3, 0)}, // TIM23_CH3
|
||||
{PF_3, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 4, 0)}, // TIM23_CH4
|
||||
{PF_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1
|
||||
{PF_6_ALT1, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 1, 0)}, // TIM23_CH1
|
||||
{PF_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1
|
||||
{PF_7_ALT1, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 2, 0)}, // TIM23_CH2
|
||||
{PF_8, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
|
||||
{PF_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N
|
||||
{PF_8_ALT2, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 3, 0)}, // TIM23_CH3
|
||||
{PF_9, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
|
||||
{PF_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N
|
||||
{PF_9_ALT2, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 4, 0)}, // TIM23_CH4
|
||||
{PF_11, TIM24, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM24, 1, 0)}, // TIM24_CH1
|
||||
{PF_12, TIM24, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM24, 2, 0)}, // TIM24_CH2
|
||||
{PF_13, TIM24, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM24, 3, 0)}, // TIM24_CH3
|
||||
{PF_14, TIM24, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM24, 4, 0)}, // TIM24_CH4
|
||||
{PG_12, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 1, 0)}, // TIM23_CH1
|
||||
{PG_13, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 2, 0)}, // TIM23_CH2
|
||||
{PG_14, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 3, 0)}, // TIM23_CH3
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** UART ***
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_UART_TX[] = {
|
||||
{PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)},
|
||||
{PA_9_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PA_12, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)},
|
||||
{PA_15, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
|
||||
{PB_4, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
|
||||
{PB_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)},
|
||||
{PB_6_ALT1, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
|
||||
{PB_6_ALT2, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_9, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PB_13, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
|
||||
{PB_14, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)},
|
||||
{PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_15, UART9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PE_1, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||
{PE_3, USART10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_USART10)},
|
||||
{PE_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PF_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PG_1, UART9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PG_12, USART10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART10)},
|
||||
{PG_14, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_UART_RX[] = {
|
||||
{PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
|
||||
{PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)},
|
||||
{PA_10_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PA_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)},
|
||||
{PB_3, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
|
||||
{PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
|
||||
{PB_7, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)},
|
||||
{PB_7_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_8, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PB_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
|
||||
{PB_15, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)},
|
||||
{PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_14, UART9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PE_0, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||
{PE_2, USART10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART10)},
|
||||
{PE_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PF_6, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PG_0, UART9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PG_9, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PG_11, USART10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART10)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_UART_RTS[] = {
|
||||
{PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)},
|
||||
{PA_12_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_14, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_14_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_13, UART9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PD_15, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||
{PE_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PF_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PG_8, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PG_12, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PG_14, USART10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART10)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_UART_CTS[] = {
|
||||
{PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)},
|
||||
{PA_11_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PB_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_0, UART9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_14, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||
{PE_10, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PF_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PG_13, USART10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART10)},
|
||||
{PG_13_ALT1, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PG_15, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** SPI ***
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SPI_MOSI[] = {
|
||||
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PA_7_ALT1, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)},
|
||||
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)},
|
||||
{PB_5_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_3_C, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)},
|
||||
{PD_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PF_9, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)},
|
||||
{PF_11, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)},
|
||||
{PG_14, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SPI_MISO[] = {
|
||||
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PA_6_ALT1, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PB_4_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_2_C, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PF_8, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)},
|
||||
{PG_9, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PG_12, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SPI_SCLK[] = {
|
||||
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PA_5_ALT1, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PA_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PB_3_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PC_12, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)},
|
||||
{PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PF_7, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)},
|
||||
{PG_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PG_13, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SPI_SSEL[] = {
|
||||
{PA_0, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)},
|
||||
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PA_4_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PA_11, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PA_15_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI6)},
|
||||
{PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)},
|
||||
{PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PF_6, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)},
|
||||
{PG_8, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)},
|
||||
{PG_10, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** FDCAN ***
|
||||
|
||||
#ifdef HAL_FDCAN_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_CAN_RD[] = {
|
||||
{PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PB_5, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
|
||||
{PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PB_12, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
|
||||
{PD_0, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PD_12, FDCAN3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_FDCAN3)},
|
||||
{PF_6, FDCAN3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_FDCAN3)},
|
||||
{PG_10, FDCAN3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_FDCAN3)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_FDCAN_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_CAN_TD[] = {
|
||||
{PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PB_6, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
|
||||
{PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
|
||||
{PD_1, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PD_13, FDCAN3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_FDCAN3)},
|
||||
{PF_7, FDCAN3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_FDCAN3)},
|
||||
{PG_9, FDCAN3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_FDCAN3)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** ETHERNET ***
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_Ethernet[] = {
|
||||
{PA_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS
|
||||
{PA_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK
|
||||
{PA_1_ALT1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_CLK
|
||||
{PA_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO
|
||||
{PA_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL
|
||||
{PA_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV
|
||||
{PA_7_ALT1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_DV
|
||||
{PA_9, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_ER
|
||||
{PB_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2
|
||||
{PB_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3
|
||||
{PB_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_ER
|
||||
{PB_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
|
||||
{PB_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
|
||||
{PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER
|
||||
{PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
|
||||
{PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
|
||||
{PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
|
||||
{PC_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC
|
||||
{PC_2_C, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2
|
||||
{PC_3_C, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK
|
||||
{PC_4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0
|
||||
{PC_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1
|
||||
{PE_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
|
||||
{PG_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
|
||||
{PG_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
|
||||
{PG_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
|
||||
{PG_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
|
||||
{PG_14, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** OCTOSPI ***
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA0[] = {
|
||||
{PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PB_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PC_3_C, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PC_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PD_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PF_0, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO0
|
||||
{PF_8, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA1[] = {
|
||||
{PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{PC_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{PD_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{PF_1, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO1
|
||||
{PF_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA2[] = {
|
||||
{PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PB_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PC_2_C, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PE_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PF_2, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO2
|
||||
{PF_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA3[] = {
|
||||
{PA_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{PD_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{PF_3, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO3
|
||||
{PF_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA4[] = {
|
||||
{PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO4
|
||||
{PD_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO4
|
||||
{PE_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO4
|
||||
{PG_0, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO4
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA5[] = {
|
||||
{PC_2_C, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO5
|
||||
{PD_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO5
|
||||
{PE_8, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO5
|
||||
{PG_1, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO5
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA6[] = {
|
||||
{PC_3_C, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6
|
||||
{PD_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6
|
||||
{PE_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6
|
||||
{PG_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6
|
||||
{PG_10, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO6
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA7[] = {
|
||||
{PD_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO7
|
||||
{PE_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO7
|
||||
{PG_11, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO7
|
||||
{PG_14, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO7
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_SCLK[] = {
|
||||
{PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
|
||||
{PB_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
|
||||
{PF_4, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_CLK
|
||||
{PF_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_SSEL[] = {
|
||||
{PB_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PC_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PE_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PG_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PG_12, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPIM_P2)}, // OCTOSPIM_P2_NCS
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** USB ***
|
||||
|
||||
#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED)
|
||||
WEAK const PinMap PinMap_USB_OTG_HS[] = {
|
||||
#ifdef USE_USB_HS_IN_FS
|
||||
{PA_8, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_SOF
|
||||
{PA_9, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS
|
||||
{PA_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ID
|
||||
{PA_11, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF_NONE)}, // USB_OTG_HS_DM
|
||||
{PA_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF_NONE)}, // USB_OTG_HS_DP
|
||||
#else
|
||||
{PA_3, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D0
|
||||
{PA_5, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_CK
|
||||
{PB_0, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D1
|
||||
{PB_1, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D2
|
||||
{PB_5, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D7
|
||||
{PB_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D3
|
||||
{PB_11, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D4
|
||||
{PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D5
|
||||
{PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D6
|
||||
{PC_0, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_STP
|
||||
{PC_2_C, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_DIR
|
||||
{PC_3_C, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_NXT
|
||||
#endif /* USE_USB_HS_IN_FS */
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** SD ***
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SD[] = {
|
||||
{PA_0, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_SDMMC2)}, // SDMMC2_CMD
|
||||
{PB_3, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDMMC2)}, // SDMMC2_D2
|
||||
{PB_4, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDMMC2)}, // SDMMC2_D3
|
||||
{PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF7_SDMMC1)}, // SDMMC1_CKIN
|
||||
{PB_8_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4
|
||||
{PB_8_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D4
|
||||
{PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF7_SDMMC1)}, // SDMMC1_CDIR
|
||||
{PB_9_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5
|
||||
{PB_9_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D5
|
||||
{PB_13, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0
|
||||
{PB_14, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDMMC2)}, // SDMMC2_D0
|
||||
{PB_15, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDMMC2)}, // SDMMC2_D1
|
||||
{PC_1, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_SDMMC2)}, // SDMMC2_CK
|
||||
{PC_4, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_SDMMC2)}, // SDMMC2_CKIN
|
||||
{PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR
|
||||
{PC_6_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6
|
||||
{PC_6_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D6
|
||||
{PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR
|
||||
{PC_7_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7
|
||||
{PC_7_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D7
|
||||
{PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0
|
||||
{PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1
|
||||
{PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2
|
||||
{PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3
|
||||
{PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CK
|
||||
{PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD
|
||||
{PD_6, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDMMC2)}, // SDMMC2_CK
|
||||
{PD_7, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDMMC2)}, // SDMMC2_CMD
|
||||
{PG_9, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC2)}, // SDMMC2_D0
|
||||
{PG_10, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC2)}, // SDMMC2_D1
|
||||
{PG_11, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D2
|
||||
{PG_12, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D3
|
||||
{PG_13, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D6
|
||||
{PG_14, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D7
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#endif /* !CUSTOM_PERIPHERAL_PINS */
|
117
buildroot/share/PlatformIO/variants/MARLIN_H723Zx/PinNamesVar.h
Normal file
117
buildroot/share/PlatformIO/variants/MARLIN_H723Zx/PinNamesVar.h
Normal file
@@ -0,0 +1,117 @@
|
||||
/* Dual pad pin name */
|
||||
PC_2_C = PC_2 | PDUAL,
|
||||
PC_3_C = PC_3 | PDUAL,
|
||||
|
||||
/* Alternate pin name */
|
||||
PA_0_ALT1 = PA_0 | ALT1,
|
||||
PA_1_ALT1 = PA_1 | ALT1,
|
||||
PA_1_ALT2 = PA_1 | ALT2,
|
||||
PA_2_ALT1 = PA_2 | ALT1,
|
||||
PA_2_ALT2 = PA_2 | ALT2,
|
||||
PA_3_ALT1 = PA_3 | ALT1,
|
||||
PA_3_ALT2 = PA_3 | ALT2,
|
||||
PA_4_ALT1 = PA_4 | ALT1,
|
||||
PA_4_ALT2 = PA_4 | ALT2,
|
||||
PA_5_ALT1 = PA_5 | ALT1,
|
||||
PA_6_ALT1 = PA_6 | ALT1,
|
||||
PA_7_ALT1 = PA_7 | ALT1,
|
||||
PA_7_ALT2 = PA_7 | ALT2,
|
||||
PA_7_ALT3 = PA_7 | ALT3,
|
||||
PA_8_ALT1 = PA_8 | ALT1,
|
||||
PA_9_ALT1 = PA_9 | ALT1,
|
||||
PA_10_ALT1 = PA_10 | ALT1,
|
||||
PA_11_ALT1 = PA_11 | ALT1,
|
||||
PA_12_ALT1 = PA_12 | ALT1,
|
||||
PA_15_ALT1 = PA_15 | ALT1,
|
||||
PA_15_ALT2 = PA_15 | ALT2,
|
||||
PB_0_ALT1 = PB_0 | ALT1,
|
||||
PB_0_ALT2 = PB_0 | ALT2,
|
||||
PB_1_ALT1 = PB_1 | ALT1,
|
||||
PB_1_ALT2 = PB_1 | ALT2,
|
||||
PB_3_ALT1 = PB_3 | ALT1,
|
||||
PB_3_ALT2 = PB_3 | ALT2,
|
||||
PB_4_ALT1 = PB_4 | ALT1,
|
||||
PB_4_ALT2 = PB_4 | ALT2,
|
||||
PB_5_ALT1 = PB_5 | ALT1,
|
||||
PB_5_ALT2 = PB_5 | ALT2,
|
||||
PB_6_ALT1 = PB_6 | ALT1,
|
||||
PB_6_ALT2 = PB_6 | ALT2,
|
||||
PB_7_ALT1 = PB_7 | ALT1,
|
||||
PB_8_ALT1 = PB_8 | ALT1,
|
||||
PB_8_ALT2 = PB_8 | ALT2,
|
||||
PB_9_ALT1 = PB_9 | ALT1,
|
||||
PB_9_ALT2 = PB_9 | ALT2,
|
||||
PB_14_ALT1 = PB_14 | ALT1,
|
||||
PB_14_ALT2 = PB_14 | ALT2,
|
||||
PB_15_ALT1 = PB_15 | ALT1,
|
||||
PB_15_ALT2 = PB_15 | ALT2,
|
||||
PC_0_ALT1 = PC_0 | ALT1,
|
||||
PC_0_ALT2 = PC_0 | ALT2,
|
||||
PC_1_ALT1 = PC_1 | ALT1,
|
||||
PC_1_ALT2 = PC_1 | ALT2,
|
||||
PC_4_ALT1 = PC_4 | ALT1,
|
||||
PC_5_ALT1 = PC_5 | ALT1,
|
||||
PC_6_ALT1 = PC_6 | ALT1,
|
||||
PC_6_ALT2 = PC_6 | ALT2,
|
||||
PC_7_ALT1 = PC_7 | ALT1,
|
||||
PC_7_ALT2 = PC_7 | ALT2,
|
||||
PC_8_ALT1 = PC_8 | ALT1,
|
||||
PC_9_ALT1 = PC_9 | ALT1,
|
||||
PC_10_ALT1 = PC_10 | ALT1,
|
||||
PC_11_ALT1 = PC_11 | ALT1,
|
||||
PF_0_ALT1 = PF_0 | ALT1,
|
||||
PF_1_ALT1 = PF_1 | ALT1,
|
||||
PF_6_ALT1 = PF_6 | ALT1,
|
||||
PF_7_ALT1 = PF_7 | ALT1,
|
||||
PF_8_ALT1 = PF_8 | ALT1,
|
||||
PF_8_ALT2 = PF_8 | ALT2,
|
||||
PF_9_ALT1 = PF_9 | ALT1,
|
||||
PF_9_ALT2 = PF_9 | ALT2,
|
||||
PG_13_ALT1 = PG_13 | ALT1,
|
||||
|
||||
/* SYS_WKUP */
|
||||
#ifdef PWR_WAKEUP_PIN1
|
||||
SYS_WKUP1 = PA_0,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN2
|
||||
SYS_WKUP2 = PA_2,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN3
|
||||
SYS_WKUP3 = NC,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN4
|
||||
SYS_WKUP4 = PC_13,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN5
|
||||
SYS_WKUP5 = NC,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN6
|
||||
SYS_WKUP6 = PC_1,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN7
|
||||
SYS_WKUP7 = NC,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN8
|
||||
SYS_WKUP8 = NC,
|
||||
#endif
|
||||
|
||||
/* USB */
|
||||
#ifdef USBCON
|
||||
USB_OTG_HS_DM = PA_11,
|
||||
USB_OTG_HS_DP = PA_12,
|
||||
USB_OTG_HS_ID = PA_10,
|
||||
USB_OTG_HS_SOF = PA_8,
|
||||
USB_OTG_HS_ULPI_CK = PA_5,
|
||||
USB_OTG_HS_ULPI_D0 = PA_3,
|
||||
USB_OTG_HS_ULPI_D1 = PB_0,
|
||||
USB_OTG_HS_ULPI_D2 = PB_1,
|
||||
USB_OTG_HS_ULPI_D3 = PB_10,
|
||||
USB_OTG_HS_ULPI_D4 = PB_11,
|
||||
USB_OTG_HS_ULPI_D5 = PB_12,
|
||||
USB_OTG_HS_ULPI_D6 = PB_13,
|
||||
USB_OTG_HS_ULPI_D7 = PB_5,
|
||||
USB_OTG_HS_ULPI_DIR = PC_2_C,
|
||||
USB_OTG_HS_ULPI_NXT = PC_3_C,
|
||||
USB_OTG_HS_ULPI_STP = PC_0,
|
||||
USB_OTG_HS_VBUS = PA_9,
|
||||
#endif
|
174
buildroot/share/PlatformIO/variants/MARLIN_H723Zx/ldscript.ld
Normal file
174
buildroot/share/PlatformIO/variants/MARLIN_H723Zx/ldscript.ld
Normal file
@@ -0,0 +1,174 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32H7 series
|
||||
** 512Kbytes FLASH and 560Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is, without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** Copyright (c) 2022 STMicroelectronics.
|
||||
** All rights reserved.
|
||||
**
|
||||
** This software is licensed under terms that can be found in the LICENSE file
|
||||
** in the root directory of this software component.
|
||||
** If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
**
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM_D1) + LENGTH(RAM_D1); /* end of RAM */
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x200 ; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400 ; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K
|
||||
DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
|
||||
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
|
||||
RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = 320K
|
||||
RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 32K
|
||||
RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 16K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
|
||||
.ARM : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
*(.RamFunc) /* .RamFunc sections */
|
||||
*(.RamFunc*) /* .RamFunc* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM_D1 AT> FLASH
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM_D1
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM_D1
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
@@ -0,0 +1,317 @@
|
||||
/*
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2020-2021, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
#if defined(STM32H723xx)
|
||||
#include "pins_arduino.h"
|
||||
|
||||
// Digital PinName array
|
||||
const PinName digitalPin[] = {
|
||||
PA_0, // D0/A0
|
||||
PA_1, // D1/A1
|
||||
PA_2, // D2/A2
|
||||
PA_3, // D3/A3
|
||||
PA_4, // D4/A4
|
||||
PA_5, // D5/A5
|
||||
PA_6, // D6/A6
|
||||
PA_7, // D7/A7
|
||||
PA_8, // D8
|
||||
PA_9, // D9
|
||||
PA_10, // D10
|
||||
PA_11, // D11
|
||||
PA_12, // D12
|
||||
PA_13, // D13
|
||||
PA_14, // D14
|
||||
PA_15, // D15
|
||||
PB_0, // D16/A8
|
||||
PB_1, // D17/A9
|
||||
PB_2, // D18
|
||||
PB_3, // D19
|
||||
PB_4, // D20
|
||||
PB_5, // D21
|
||||
PB_6, // D22
|
||||
PB_7, // D23
|
||||
PB_8, // D24
|
||||
PB_9, // D25
|
||||
PB_10, // D26
|
||||
PB_11, // D27
|
||||
PB_12, // D28
|
||||
PB_13, // D29
|
||||
PB_14, // D30
|
||||
PB_15, // D31
|
||||
PC_0, // D32/A10
|
||||
PC_1, // D33/A11
|
||||
PC_4, // D34/A12
|
||||
PC_5, // D35/A13
|
||||
PC_6, // D36
|
||||
PC_7, // D37
|
||||
PC_8, // D38
|
||||
PC_9, // D39
|
||||
PC_10, // D40
|
||||
PC_11, // D41
|
||||
PC_12, // D42
|
||||
PC_13, // D43
|
||||
PC_14, // D44
|
||||
PC_15, // D45
|
||||
PD_0, // D46
|
||||
PD_1, // D47
|
||||
PD_2, // D48
|
||||
PD_3, // D49
|
||||
PD_4, // D50
|
||||
PD_5, // D51
|
||||
PD_6, // D52
|
||||
PD_7, // D53
|
||||
PD_8, // D54
|
||||
PD_9, // D55
|
||||
PD_10, // D56
|
||||
PD_11, // D57
|
||||
PD_12, // D58
|
||||
PD_13, // D59
|
||||
PD_14, // D60
|
||||
PD_15, // D61
|
||||
PE_0, // D62
|
||||
PE_1, // D63
|
||||
PE_2, // D64
|
||||
PE_3, // D65
|
||||
PE_4, // D66
|
||||
PE_5, // D67
|
||||
PE_6, // D68
|
||||
PE_7, // D69
|
||||
PE_8, // D70
|
||||
PE_9, // D71
|
||||
PE_10, // D72
|
||||
PE_11, // D73
|
||||
PE_12, // D74
|
||||
PE_13, // D75
|
||||
PE_14, // D76
|
||||
PE_15, // D77
|
||||
PF_0, // D78
|
||||
PF_1, // D79
|
||||
PF_2, // D80
|
||||
PF_3, // D81/A14
|
||||
PF_4, // D82/A15
|
||||
PF_5, // D83/A16
|
||||
PF_6, // D84/A17
|
||||
PF_7, // D85/A18
|
||||
PF_8, // D86/A19
|
||||
PF_9, // D87/A20
|
||||
PF_10, // D88/A21
|
||||
PF_11, // D89/A22
|
||||
PF_12, // D90/A23
|
||||
PF_13, // D91/A24
|
||||
PF_14, // D92/A25
|
||||
PF_15, // D93
|
||||
PG_0, // D94
|
||||
PG_1, // D95
|
||||
PG_2, // D96
|
||||
PG_3, // D97
|
||||
PG_4, // D98
|
||||
PG_5, // D99
|
||||
PG_6, // D100
|
||||
PG_7, // D101
|
||||
PG_8, // D102
|
||||
PG_9, // D103
|
||||
PG_10, // D104
|
||||
PG_11, // D105
|
||||
PG_12, // D106
|
||||
PG_13, // D107
|
||||
PG_14, // D108
|
||||
PG_15, // D109
|
||||
PH_0, // D110
|
||||
PH_1, // D111
|
||||
PC_2_C, // D112/A26
|
||||
PC_3_C // D113/A27
|
||||
};
|
||||
|
||||
// Analog (Ax) pin number array
|
||||
const uint32_t analogInputPin[] = {
|
||||
0, // A0, PA0
|
||||
1, // A1, PA1
|
||||
2, // A2, PA2
|
||||
3, // A3, PA3
|
||||
4, // A4, PA4
|
||||
5, // A5, PA5
|
||||
6, // A6, PA6
|
||||
7, // A7, PA7
|
||||
16, // A8, PB0
|
||||
17, // A9, PB1
|
||||
32, // A10, PC0
|
||||
33, // A11, PC1
|
||||
34, // A12, PC4
|
||||
35, // A13, PC5
|
||||
81, // A14, PF3
|
||||
82, // A15, PF4
|
||||
83, // A16, PF5
|
||||
84, // A17, PF6
|
||||
85, // A18, PF7
|
||||
86, // A19, PF8
|
||||
87, // A20, PF9
|
||||
88, // A21, PF10
|
||||
89, // A22, PF11
|
||||
90, // A23, PF12
|
||||
91, // A24, PF13
|
||||
92, // A25, PF14
|
||||
112, // A26, PC2_C
|
||||
113 // A27, PC3_C
|
||||
};
|
||||
|
||||
void MPU_Config(void)
|
||||
{
|
||||
MPU_Region_InitTypeDef MPU_InitStruct = {0};
|
||||
|
||||
/* Disables the MPU */
|
||||
HAL_MPU_Disable();
|
||||
|
||||
/** Initializes and configures the Region and the memory to be protected
|
||||
*/
|
||||
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
|
||||
MPU_InitStruct.Number = MPU_REGION_NUMBER0;
|
||||
MPU_InitStruct.BaseAddress = 0x0;
|
||||
MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
|
||||
MPU_InitStruct.SubRegionDisable = 0x87;
|
||||
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
|
||||
MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
|
||||
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
|
||||
MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
|
||||
MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
|
||||
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
|
||||
|
||||
HAL_MPU_ConfigRegion(&MPU_InitStruct);
|
||||
/* Enables the MPU */
|
||||
HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* @brief System Clock Configuration
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
WEAK void SystemClock_Config(void)
|
||||
{
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
|
||||
|
||||
MPU_Config();
|
||||
|
||||
/** Supply configuration update enable
|
||||
*/
|
||||
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
|
||||
/** Configure the main internal regulator output voltage
|
||||
*/
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
|
||||
|
||||
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
|
||||
/** Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure.
|
||||
*/
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; // 48Mhz for USB
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 5; // 25Mhz / 5 = 5Mhz
|
||||
RCC_OscInitStruct.PLL.PLLN = 110; // 25Mhz / 5 * 110 = 550Mhz
|
||||
RCC_OscInitStruct.PLL.PLLP = 1; // 550Mhz / 1 = 550Mhz
|
||||
RCC_OscInitStruct.PLL.PLLQ = 10; // 550Mhz / 10 = 55Mhz
|
||||
RCC_OscInitStruct.PLL.PLLR = 10; // unused
|
||||
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
|
||||
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
|
||||
RCC_OscInitStruct.PLL.PLLFRACN = 0;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/** Initializes the CPU, AHB and APB buses clocks
|
||||
*/
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|
||||
|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
|
||||
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
|
||||
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
|
||||
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB
|
||||
| RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_ADC
|
||||
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USART16
|
||||
| RCC_PERIPHCLK_USART234578 | RCC_PERIPHCLK_I2C123
|
||||
| RCC_PERIPHCLK_I2C4 | RCC_PERIPHCLK_SPI123
|
||||
| RCC_PERIPHCLK_SPI45 | RCC_PERIPHCLK_SPI6;
|
||||
|
||||
/* HSI48 used for USB 48 Mhz */
|
||||
/* PLL1 qclk also used for FMC, SDMMC, RNG, SAI */
|
||||
/* PLL2 pclk is needed for adc max 80 Mhz (p,q,r same) */
|
||||
/* PLL2 pclk also used for LP timers 2,3,4,5, SPI 1,2,3 */
|
||||
/* PLL2 qclk is needed for uart, can, spi4,5,6 80 Mhz */
|
||||
/* PLL3 r clk is needed for i2c 80 Mhz (p,q,r same) */
|
||||
PeriphClkInitStruct.PLL2.PLL2M = 15; // M DIV 15 vco 25 / 15 ~ 1.667 Mhz
|
||||
PeriphClkInitStruct.PLL2.PLL2N = 96; // N MUL 96
|
||||
PeriphClkInitStruct.PLL2.PLL2P = 2; // P div 2
|
||||
PeriphClkInitStruct.PLL2.PLL2Q = 2; // Q div 2
|
||||
PeriphClkInitStruct.PLL2.PLL2R = 2; // R div 2
|
||||
// RCC_PLL1VCIRANGE_0 Clock range frequency between 1 and 2 MHz
|
||||
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_0;
|
||||
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOMEDIUM;
|
||||
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
|
||||
PeriphClkInitStruct.PLL3.PLL3M = 15; // M DIV 15 vco 25 / 15 ~ 1.667 Mhz
|
||||
PeriphClkInitStruct.PLL3.PLL3N = 96; // N MUL 96
|
||||
PeriphClkInitStruct.PLL3.PLL3P = 2; // P div 2
|
||||
PeriphClkInitStruct.PLL3.PLL3Q = 2; // Q div 2
|
||||
PeriphClkInitStruct.PLL3.PLL3R = 2; // R div 2
|
||||
// RCC_PLL1VCIRANGE_0 Clock range frequency between 1 and 2 MHz
|
||||
PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_0;
|
||||
PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOMEDIUM;
|
||||
PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
|
||||
// ADC from PLL2 pclk
|
||||
PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
|
||||
// USB from HSI48
|
||||
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
|
||||
// SDMMC from PLL1 qclk
|
||||
PeriphClkInitStruct.SdmmcClockSelection = 0;
|
||||
//PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;
|
||||
// LPUART from PLL2 qclk
|
||||
PeriphClkInitStruct.Lpuart1ClockSelection = 0;
|
||||
//PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2;
|
||||
// USART from PLL2 qclk
|
||||
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_PLL2;
|
||||
// USART from PLL2 qclk
|
||||
PeriphClkInitStruct.Usart234578ClockSelection = 0;
|
||||
//PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_PLL2;
|
||||
// I2C123 from PLL3 rclk
|
||||
PeriphClkInitStruct.I2c123ClockSelection = RCC_I2C123CLKSOURCE_PLL3;
|
||||
// I2C4 from PLL3 rclk
|
||||
PeriphClkInitStruct.I2c4ClockSelection = 0;
|
||||
//PeriphClkInitStruct.I2c4ClockSelection = RCC_I2C4CLKSOURCE_PLL3;
|
||||
// SPI123 from PLL2 pclk
|
||||
PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL2;
|
||||
// SPI45 from PLL2 qclk
|
||||
PeriphClkInitStruct.Spi45ClockSelection = 0;
|
||||
//PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_PLL2;
|
||||
// SPI6 from PLL2 qclk
|
||||
PeriphClkInitStruct.Spi6ClockSelection = 0;
|
||||
//PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL2;
|
||||
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* ARDUINO_GENERIC_* */
|
@@ -0,0 +1,308 @@
|
||||
/*
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2020-2021, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* STM32 pins number
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define PA0 PIN_A0
|
||||
#define PA1 PIN_A1
|
||||
#define PA2 PIN_A2
|
||||
#define PA3 PIN_A3
|
||||
#define PA4 PIN_A4
|
||||
#define PA5 PIN_A5
|
||||
#define PA6 PIN_A6
|
||||
#define PA7 PIN_A7
|
||||
#define PA8 8
|
||||
#define PA9 9
|
||||
#define PA10 10
|
||||
#define PA11 11
|
||||
#define PA12 12
|
||||
#define PA13 13
|
||||
#define PA14 14
|
||||
#define PA15 15
|
||||
#define PB0 PIN_A8
|
||||
#define PB1 PIN_A9
|
||||
#define PB2 18
|
||||
#define PB3 19
|
||||
#define PB4 20
|
||||
#define PB5 21
|
||||
#define PB6 22
|
||||
#define PB7 23
|
||||
#define PB8 24
|
||||
#define PB9 25
|
||||
#define PB10 26
|
||||
#define PB11 27
|
||||
#define PB12 28
|
||||
#define PB13 29
|
||||
#define PB14 30
|
||||
#define PB15 31
|
||||
#define PC0 PIN_A10
|
||||
#define PC1 PIN_A11
|
||||
#define PC4 PIN_A12
|
||||
#define PC5 PIN_A13
|
||||
#define PC6 36
|
||||
#define PC7 37
|
||||
#define PC8 38
|
||||
#define PC9 39
|
||||
#define PC10 40
|
||||
#define PC11 41
|
||||
#define PC12 42
|
||||
#define PC13 43
|
||||
#define PC14 44
|
||||
#define PC15 45
|
||||
#define PD0 46
|
||||
#define PD1 47
|
||||
#define PD2 48
|
||||
#define PD3 49
|
||||
#define PD4 50
|
||||
#define PD5 51
|
||||
#define PD6 52
|
||||
#define PD7 53
|
||||
#define PD8 54
|
||||
#define PD9 55
|
||||
#define PD10 56
|
||||
#define PD11 57
|
||||
#define PD12 58
|
||||
#define PD13 59
|
||||
#define PD14 60
|
||||
#define PD15 61
|
||||
#define PE0 62
|
||||
#define PE1 63
|
||||
#define PE2 64
|
||||
#define PE3 65
|
||||
#define PE4 66
|
||||
#define PE5 67
|
||||
#define PE6 68
|
||||
#define PE7 69
|
||||
#define PE8 70
|
||||
#define PE9 71
|
||||
#define PE10 72
|
||||
#define PE11 73
|
||||
#define PE12 74
|
||||
#define PE13 75
|
||||
#define PE14 76
|
||||
#define PE15 77
|
||||
#define PF0 78
|
||||
#define PF1 79
|
||||
#define PF2 80
|
||||
#define PF3 PIN_A14
|
||||
#define PF4 PIN_A15
|
||||
#define PF5 PIN_A16
|
||||
#define PF6 PIN_A17
|
||||
#define PF7 PIN_A18
|
||||
#define PF8 PIN_A19
|
||||
#define PF9 PIN_A20
|
||||
#define PF10 PIN_A21
|
||||
#define PF11 PIN_A22
|
||||
#define PF12 PIN_A23
|
||||
#define PF13 PIN_A24
|
||||
#define PF14 PIN_A25
|
||||
#define PF15 93
|
||||
#define PG0 94
|
||||
#define PG1 95
|
||||
#define PG2 96
|
||||
#define PG3 97
|
||||
#define PG4 98
|
||||
#define PG5 99
|
||||
#define PG6 100
|
||||
#define PG7 101
|
||||
#define PG8 102
|
||||
#define PG9 103
|
||||
#define PG10 104
|
||||
#define PG11 105
|
||||
#define PG12 106
|
||||
#define PG13 107
|
||||
#define PG14 108
|
||||
#define PG15 109
|
||||
#define PH0 110
|
||||
#define PH1 111
|
||||
#define PC2_C PIN_A26
|
||||
#define PC3_C PIN_A27
|
||||
|
||||
// Alternate pins number
|
||||
#define PA0_ALT1 (PA0 | ALT1)
|
||||
#define PA1_ALT1 (PA1 | ALT1)
|
||||
#define PA1_ALT2 (PA1 | ALT2)
|
||||
#define PA2_ALT1 (PA2 | ALT1)
|
||||
#define PA2_ALT2 (PA2 | ALT2)
|
||||
#define PA3_ALT1 (PA3 | ALT1)
|
||||
#define PA3_ALT2 (PA3 | ALT2)
|
||||
#define PA4_ALT1 (PA4 | ALT1)
|
||||
#define PA4_ALT2 (PA4 | ALT2)
|
||||
#define PA5_ALT1 (PA5 | ALT1)
|
||||
#define PA6_ALT1 (PA6 | ALT1)
|
||||
#define PA7_ALT1 (PA7 | ALT1)
|
||||
#define PA7_ALT2 (PA7 | ALT2)
|
||||
#define PA7_ALT3 (PA7 | ALT3)
|
||||
#define PA8_ALT1 (PA8 | ALT1)
|
||||
#define PA9_ALT1 (PA9 | ALT1)
|
||||
#define PA10_ALT1 (PA10 | ALT1)
|
||||
#define PA11_ALT1 (PA11 | ALT1)
|
||||
#define PA12_ALT1 (PA12 | ALT1)
|
||||
#define PA15_ALT1 (PA15 | ALT1)
|
||||
#define PA15_ALT2 (PA15 | ALT2)
|
||||
#define PB0_ALT1 (PB0 | ALT1)
|
||||
#define PB0_ALT2 (PB0 | ALT2)
|
||||
#define PB1_ALT1 (PB1 | ALT1)
|
||||
#define PB1_ALT2 (PB1 | ALT2)
|
||||
#define PB3_ALT1 (PB3 | ALT1)
|
||||
#define PB3_ALT2 (PB3 | ALT2)
|
||||
#define PB4_ALT1 (PB4 | ALT1)
|
||||
#define PB4_ALT2 (PB4 | ALT2)
|
||||
#define PB5_ALT1 (PB5 | ALT1)
|
||||
#define PB5_ALT2 (PB5 | ALT2)
|
||||
#define PB6_ALT1 (PB6 | ALT1)
|
||||
#define PB6_ALT2 (PB6 | ALT2)
|
||||
#define PB7_ALT1 (PB7 | ALT1)
|
||||
#define PB8_ALT1 (PB8 | ALT1)
|
||||
#define PB8_ALT2 (PB8 | ALT2)
|
||||
#define PB9_ALT1 (PB9 | ALT1)
|
||||
#define PB9_ALT2 (PB9 | ALT2)
|
||||
#define PB14_ALT1 (PB14 | ALT1)
|
||||
#define PB14_ALT2 (PB14 | ALT2)
|
||||
#define PB15_ALT1 (PB15 | ALT1)
|
||||
#define PB15_ALT2 (PB15 | ALT2)
|
||||
#define PC0_ALT1 (PC0 | ALT1)
|
||||
#define PC0_ALT2 (PC0 | ALT2)
|
||||
#define PC1_ALT1 (PC1 | ALT1)
|
||||
#define PC1_ALT2 (PC1 | ALT2)
|
||||
#define PC4_ALT1 (PC4 | ALT1)
|
||||
#define PC5_ALT1 (PC5 | ALT1)
|
||||
#define PC6_ALT1 (PC6 | ALT1)
|
||||
#define PC6_ALT2 (PC6 | ALT2)
|
||||
#define PC7_ALT1 (PC7 | ALT1)
|
||||
#define PC7_ALT2 (PC7 | ALT2)
|
||||
#define PC8_ALT1 (PC8 | ALT1)
|
||||
#define PC9_ALT1 (PC9 | ALT1)
|
||||
#define PC10_ALT1 (PC10 | ALT1)
|
||||
#define PC11_ALT1 (PC11 | ALT1)
|
||||
#define PF0_ALT1 (PF0 | ALT1)
|
||||
#define PF1_ALT1 (PF1 | ALT1)
|
||||
#define PF6_ALT1 (PF6 | ALT1)
|
||||
#define PF7_ALT1 (PF7 | ALT1)
|
||||
#define PF8_ALT1 (PF8 | ALT1)
|
||||
#define PF8_ALT2 (PF8 | ALT2)
|
||||
#define PF9_ALT1 (PF9 | ALT1)
|
||||
#define PF9_ALT2 (PF9 | ALT2)
|
||||
#define PG13_ALT1 (PG13 | ALT1)
|
||||
|
||||
#define NUM_DIGITAL_PINS 114
|
||||
#define NUM_DUALPAD_PINS 2
|
||||
#define NUM_ANALOG_INPUTS 28
|
||||
|
||||
// On-board LED pin number
|
||||
#ifndef LED_BUILTIN
|
||||
#define LED_BUILTIN PNUM_NOT_DEFINED
|
||||
#endif
|
||||
|
||||
// On-board user button
|
||||
#ifndef USER_BTN
|
||||
#define USER_BTN PNUM_NOT_DEFINED
|
||||
#endif
|
||||
|
||||
// SPI definitions
|
||||
#ifndef PIN_SPI_SS
|
||||
#define PIN_SPI_SS PA4
|
||||
#endif
|
||||
#ifndef PIN_SPI_SS1
|
||||
#define PIN_SPI_SS1 PA15
|
||||
#endif
|
||||
#ifndef PIN_SPI_SS2
|
||||
#define PIN_SPI_SS2 PG10
|
||||
#endif
|
||||
#ifndef PIN_SPI_SS3
|
||||
#define PIN_SPI_SS3 PNUM_NOT_DEFINED
|
||||
#endif
|
||||
#ifndef PIN_SPI_MOSI
|
||||
#define PIN_SPI_MOSI PA7
|
||||
#endif
|
||||
#ifndef PIN_SPI_MISO
|
||||
#define PIN_SPI_MISO PA6
|
||||
#endif
|
||||
#ifndef PIN_SPI_SCK
|
||||
#define PIN_SPI_SCK PA5
|
||||
#endif
|
||||
|
||||
// I2C definitions
|
||||
#ifndef PIN_WIRE_SDA
|
||||
#define PIN_WIRE_SDA PB7
|
||||
#endif
|
||||
#ifndef PIN_WIRE_SCL
|
||||
#define PIN_WIRE_SCL PB6
|
||||
#endif
|
||||
|
||||
// Timer Definitions
|
||||
// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
|
||||
#ifndef TIMER_TONE
|
||||
#define TIMER_TONE TIM6
|
||||
#endif
|
||||
#ifndef TIMER_SERVO
|
||||
#define TIMER_SERVO TIM7
|
||||
#endif
|
||||
|
||||
// UART Definitions
|
||||
#ifndef SERIAL_UART_INSTANCE
|
||||
#define SERIAL_UART_INSTANCE 4
|
||||
#endif
|
||||
|
||||
// Default pin used for generic 'Serial' instance
|
||||
// Mandatory for Firmata
|
||||
#ifndef PIN_SERIAL_RX
|
||||
#define PIN_SERIAL_RX PA1
|
||||
#endif
|
||||
#ifndef PIN_SERIAL_TX
|
||||
#define PIN_SERIAL_TX PA0
|
||||
#endif
|
||||
|
||||
// Extra HAL modules
|
||||
#if !defined(HAL_DAC_MODULE_DISABLED)
|
||||
#define HAL_DAC_MODULE_ENABLED
|
||||
#endif
|
||||
#if !defined(HAL_ETH_MODULE_DISABLED)
|
||||
#define HAL_ETH_MODULE_ENABLED
|
||||
#endif
|
||||
#if !defined(HAL_OSPI_MODULE_DISABLED)
|
||||
#define HAL_OSPI_MODULE_ENABLED
|
||||
#endif
|
||||
#if !defined(HAL_SD_MODULE_DISABLED)
|
||||
#define HAL_SD_MODULE_ENABLED
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
// These serial port names are intended to allow libraries and architecture-neutral
|
||||
// sketches to automatically default to the correct port name for a particular type
|
||||
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
|
||||
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
|
||||
//
|
||||
// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
|
||||
//
|
||||
// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
|
||||
//
|
||||
// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
|
||||
//
|
||||
// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
|
||||
//
|
||||
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
|
||||
// pins are NOT connected to anything by default.
|
||||
#ifndef SERIAL_PORT_MONITOR
|
||||
#define SERIAL_PORT_MONITOR Serial
|
||||
#endif
|
||||
#ifndef SERIAL_PORT_HARDWARE
|
||||
#define SERIAL_PORT_HARDWARE Serial
|
||||
#endif
|
||||
#endif
|
@@ -218,6 +218,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
@@ -118,324 +118,324 @@ static const uint8_t A15 = PIN_A15;
|
||||
#ifdef ARDUINO_MAIN
|
||||
|
||||
const uint16_t PROGMEM port_to_mode_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &DDRA,
|
||||
(uint16_t) &DDRB,
|
||||
(uint16_t) &DDRC,
|
||||
(uint16_t) &DDRD,
|
||||
(uint16_t) &DDRE,
|
||||
(uint16_t) &DDRF,
|
||||
(uint16_t) &DDRG,
|
||||
(uint16_t) &DDRH,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &DDRJ,
|
||||
(uint16_t) &DDRK,
|
||||
(uint16_t) &DDRL,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &DDRA,
|
||||
(uint16_t) &DDRB,
|
||||
(uint16_t) &DDRC,
|
||||
(uint16_t) &DDRD,
|
||||
(uint16_t) &DDRE,
|
||||
(uint16_t) &DDRF,
|
||||
(uint16_t) &DDRG,
|
||||
(uint16_t) &DDRH,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &DDRJ,
|
||||
(uint16_t) &DDRK,
|
||||
(uint16_t) &DDRL,
|
||||
};
|
||||
|
||||
const uint16_t PROGMEM port_to_output_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &PORTA,
|
||||
(uint16_t) &PORTB,
|
||||
(uint16_t) &PORTC,
|
||||
(uint16_t) &PORTD,
|
||||
(uint16_t) &PORTE,
|
||||
(uint16_t) &PORTF,
|
||||
(uint16_t) &PORTG,
|
||||
(uint16_t) &PORTH,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &PORTJ,
|
||||
(uint16_t) &PORTK,
|
||||
(uint16_t) &PORTL,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &PORTA,
|
||||
(uint16_t) &PORTB,
|
||||
(uint16_t) &PORTC,
|
||||
(uint16_t) &PORTD,
|
||||
(uint16_t) &PORTE,
|
||||
(uint16_t) &PORTF,
|
||||
(uint16_t) &PORTG,
|
||||
(uint16_t) &PORTH,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &PORTJ,
|
||||
(uint16_t) &PORTK,
|
||||
(uint16_t) &PORTL,
|
||||
};
|
||||
|
||||
const uint16_t PROGMEM port_to_input_PGM[] = {
|
||||
NOT_A_PIN,
|
||||
(uint16_t) &PINA,
|
||||
(uint16_t) &PINB,
|
||||
(uint16_t) &PINC,
|
||||
(uint16_t) &PIND,
|
||||
(uint16_t) &PINE,
|
||||
(uint16_t) &PINF,
|
||||
(uint16_t) &PING,
|
||||
(uint16_t) &PINH,
|
||||
NOT_A_PIN,
|
||||
(uint16_t) &PINJ,
|
||||
(uint16_t) &PINK,
|
||||
(uint16_t) &PINL,
|
||||
NOT_A_PIN,
|
||||
(uint16_t) &PINA,
|
||||
(uint16_t) &PINB,
|
||||
(uint16_t) &PINC,
|
||||
(uint16_t) &PIND,
|
||||
(uint16_t) &PINE,
|
||||
(uint16_t) &PINF,
|
||||
(uint16_t) &PING,
|
||||
(uint16_t) &PINH,
|
||||
NOT_A_PIN,
|
||||
(uint16_t) &PINJ,
|
||||
(uint16_t) &PINK,
|
||||
(uint16_t) &PINL,
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_port_PGM[] = {
|
||||
// PORTLIST
|
||||
// -------------------------------------------
|
||||
PE , // PE 0 ** 0 ** USART0_RX
|
||||
PE , // PE 1 ** 1 ** USART0_TX
|
||||
PE , // PE 4 ** 2 ** PWM2
|
||||
PE , // PE 5 ** 3 ** PWM3
|
||||
PG , // PG 5 ** 4 ** PWM4
|
||||
PE , // PE 3 ** 5 ** PWM5
|
||||
PH , // PH 3 ** 6 ** PWM6
|
||||
PH , // PH 4 ** 7 ** PWM7
|
||||
PH , // PH 5 ** 8 ** PWM8
|
||||
PH , // PH 6 ** 9 ** PWM9
|
||||
PB , // PB 4 ** 10 ** PWM10
|
||||
PB , // PB 5 ** 11 ** PWM11
|
||||
PB , // PB 6 ** 12 ** PWM12
|
||||
PB , // PB 7 ** 13 ** PWM13
|
||||
PJ , // PJ 1 ** 14 ** USART3_TX
|
||||
PJ , // PJ 0 ** 15 ** USART3_RX
|
||||
PH , // PH 1 ** 16 ** USART2_TX
|
||||
PH , // PH 0 ** 17 ** USART2_RX
|
||||
PD , // PD 3 ** 18 ** USART1_TX
|
||||
PD , // PD 2 ** 19 ** USART1_RX
|
||||
PD , // PD 1 ** 20 ** I2C_SDA
|
||||
PD , // PD 0 ** 21 ** I2C_SCL
|
||||
PA , // PA 0 ** 22 ** D22
|
||||
PA , // PA 1 ** 23 ** D23
|
||||
PA , // PA 2 ** 24 ** D24
|
||||
PA , // PA 3 ** 25 ** D25
|
||||
PA , // PA 4 ** 26 ** D26
|
||||
PA , // PA 5 ** 27 ** D27
|
||||
PA , // PA 6 ** 28 ** D28
|
||||
PA , // PA 7 ** 29 ** D29
|
||||
PC , // PC 7 ** 30 ** D30
|
||||
PC , // PC 6 ** 31 ** D31
|
||||
PC , // PC 5 ** 32 ** D32
|
||||
PC , // PC 4 ** 33 ** D33
|
||||
PC , // PC 3 ** 34 ** D34
|
||||
PC , // PC 2 ** 35 ** D35
|
||||
PC , // PC 1 ** 36 ** D36
|
||||
PC , // PC 0 ** 37 ** D37
|
||||
PD , // PD 7 ** 38 ** D38
|
||||
PG , // PG 2 ** 39 ** D39
|
||||
PG , // PG 1 ** 40 ** D40
|
||||
PG , // PG 0 ** 41 ** D41
|
||||
PL , // PL 7 ** 42 ** D42
|
||||
PL , // PL 6 ** 43 ** D43
|
||||
PL , // PL 5 ** 44 ** D44
|
||||
PL , // PL 4 ** 45 ** D45
|
||||
PL , // PL 3 ** 46 ** D46
|
||||
PL , // PL 2 ** 47 ** D47
|
||||
PL , // PL 1 ** 48 ** D48
|
||||
PL , // PL 0 ** 49 ** D49
|
||||
PB , // PB 3 ** 50 ** SPI_MISO
|
||||
PB , // PB 2 ** 51 ** SPI_MOSI
|
||||
PB , // PB 1 ** 52 ** SPI_SCK
|
||||
PB , // PB 0 ** 53 ** SPI_SS
|
||||
PF , // PF 0 ** 54 ** A0
|
||||
PF , // PF 1 ** 55 ** A1
|
||||
PF , // PF 2 ** 56 ** A2
|
||||
PF , // PF 3 ** 57 ** A3
|
||||
PF , // PF 4 ** 58 ** A4
|
||||
PF , // PF 5 ** 59 ** A5
|
||||
PF , // PF 6 ** 60 ** A6
|
||||
PF , // PF 7 ** 61 ** A7
|
||||
PK , // PK 0 ** 62 ** A8
|
||||
PK , // PK 1 ** 63 ** A9
|
||||
PK , // PK 2 ** 64 ** A10
|
||||
PK , // PK 3 ** 65 ** A11
|
||||
PK , // PK 4 ** 66 ** A12
|
||||
PK , // PK 5 ** 67 ** A13
|
||||
PK , // PK 6 ** 68 ** A14
|
||||
PK , // PK 7 ** 69 ** A15
|
||||
PG , // PG 4 ** 70 ** D70
|
||||
PG , // PG 3 ** 71 ** D71
|
||||
PJ , // PJ 2 ** 72 ** D72
|
||||
PJ , // PJ 3 ** 73 ** D73
|
||||
PJ , // PJ 7 ** 74 ** D74
|
||||
PJ , // PJ 4 ** 75 ** D75
|
||||
PJ , // PJ 5 ** 76 ** D76
|
||||
PJ , // PJ 6 ** 77 ** D77
|
||||
PE , // PE 2 ** 78 ** D78
|
||||
PE , // PE 6 ** 79 ** D79
|
||||
PE , // PE 7 ** 80 ** D80
|
||||
PD , // PD 4 ** 81 ** D81
|
||||
PD , // PD 5 ** 82 ** D82
|
||||
PD , // PD 6 ** 83 ** D83
|
||||
PH , // PH 2 ** 84 ** D84
|
||||
PH , // PH 7 ** 85 ** D85
|
||||
// PORTLIST
|
||||
// -------------------------------------------
|
||||
PE , // PE 0 ** 0 ** USART0_RX
|
||||
PE , // PE 1 ** 1 ** USART0_TX
|
||||
PE , // PE 4 ** 2 ** PWM2
|
||||
PE , // PE 5 ** 3 ** PWM3
|
||||
PG , // PG 5 ** 4 ** PWM4
|
||||
PE , // PE 3 ** 5 ** PWM5
|
||||
PH , // PH 3 ** 6 ** PWM6
|
||||
PH , // PH 4 ** 7 ** PWM7
|
||||
PH , // PH 5 ** 8 ** PWM8
|
||||
PH , // PH 6 ** 9 ** PWM9
|
||||
PB , // PB 4 ** 10 ** PWM10
|
||||
PB , // PB 5 ** 11 ** PWM11
|
||||
PB , // PB 6 ** 12 ** PWM12
|
||||
PB , // PB 7 ** 13 ** PWM13
|
||||
PJ , // PJ 1 ** 14 ** USART3_TX
|
||||
PJ , // PJ 0 ** 15 ** USART3_RX
|
||||
PH , // PH 1 ** 16 ** USART2_TX
|
||||
PH , // PH 0 ** 17 ** USART2_RX
|
||||
PD , // PD 3 ** 18 ** USART1_TX
|
||||
PD , // PD 2 ** 19 ** USART1_RX
|
||||
PD , // PD 1 ** 20 ** I2C_SDA
|
||||
PD , // PD 0 ** 21 ** I2C_SCL
|
||||
PA , // PA 0 ** 22 ** D22
|
||||
PA , // PA 1 ** 23 ** D23
|
||||
PA , // PA 2 ** 24 ** D24
|
||||
PA , // PA 3 ** 25 ** D25
|
||||
PA , // PA 4 ** 26 ** D26
|
||||
PA , // PA 5 ** 27 ** D27
|
||||
PA , // PA 6 ** 28 ** D28
|
||||
PA , // PA 7 ** 29 ** D29
|
||||
PC , // PC 7 ** 30 ** D30
|
||||
PC , // PC 6 ** 31 ** D31
|
||||
PC , // PC 5 ** 32 ** D32
|
||||
PC , // PC 4 ** 33 ** D33
|
||||
PC , // PC 3 ** 34 ** D34
|
||||
PC , // PC 2 ** 35 ** D35
|
||||
PC , // PC 1 ** 36 ** D36
|
||||
PC , // PC 0 ** 37 ** D37
|
||||
PD , // PD 7 ** 38 ** D38
|
||||
PG , // PG 2 ** 39 ** D39
|
||||
PG , // PG 1 ** 40 ** D40
|
||||
PG , // PG 0 ** 41 ** D41
|
||||
PL , // PL 7 ** 42 ** D42
|
||||
PL , // PL 6 ** 43 ** D43
|
||||
PL , // PL 5 ** 44 ** D44
|
||||
PL , // PL 4 ** 45 ** D45
|
||||
PL , // PL 3 ** 46 ** D46
|
||||
PL , // PL 2 ** 47 ** D47
|
||||
PL , // PL 1 ** 48 ** D48
|
||||
PL , // PL 0 ** 49 ** D49
|
||||
PB , // PB 3 ** 50 ** SPI_MISO
|
||||
PB , // PB 2 ** 51 ** SPI_MOSI
|
||||
PB , // PB 1 ** 52 ** SPI_SCK
|
||||
PB , // PB 0 ** 53 ** SPI_SS
|
||||
PF , // PF 0 ** 54 ** A0
|
||||
PF , // PF 1 ** 55 ** A1
|
||||
PF , // PF 2 ** 56 ** A2
|
||||
PF , // PF 3 ** 57 ** A3
|
||||
PF , // PF 4 ** 58 ** A4
|
||||
PF , // PF 5 ** 59 ** A5
|
||||
PF , // PF 6 ** 60 ** A6
|
||||
PF , // PF 7 ** 61 ** A7
|
||||
PK , // PK 0 ** 62 ** A8
|
||||
PK , // PK 1 ** 63 ** A9
|
||||
PK , // PK 2 ** 64 ** A10
|
||||
PK , // PK 3 ** 65 ** A11
|
||||
PK , // PK 4 ** 66 ** A12
|
||||
PK , // PK 5 ** 67 ** A13
|
||||
PK , // PK 6 ** 68 ** A14
|
||||
PK , // PK 7 ** 69 ** A15
|
||||
PG , // PG 4 ** 70 ** D70
|
||||
PG , // PG 3 ** 71 ** D71
|
||||
PJ , // PJ 2 ** 72 ** D72
|
||||
PJ , // PJ 3 ** 73 ** D73
|
||||
PJ , // PJ 7 ** 74 ** D74
|
||||
PJ , // PJ 4 ** 75 ** D75
|
||||
PJ , // PJ 5 ** 76 ** D76
|
||||
PJ , // PJ 6 ** 77 ** D77
|
||||
PE , // PE 2 ** 78 ** D78
|
||||
PE , // PE 6 ** 79 ** D79
|
||||
PE , // PE 7 ** 80 ** D80
|
||||
PD , // PD 4 ** 81 ** D81
|
||||
PD , // PD 5 ** 82 ** D82
|
||||
PD , // PD 6 ** 83 ** D83
|
||||
PH , // PH 2 ** 84 ** D84
|
||||
PH , // PH 7 ** 85 ** D85
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] = {
|
||||
// PIN IN PORT
|
||||
// -------------------------------------------
|
||||
_BV( 0 ) , // PE 0 ** 0 ** USART0_RX
|
||||
_BV( 1 ) , // PE 1 ** 1 ** USART0_TX
|
||||
_BV( 4 ) , // PE 4 ** 2 ** PWM2
|
||||
_BV( 5 ) , // PE 5 ** 3 ** PWM3
|
||||
_BV( 5 ) , // PG 5 ** 4 ** PWM4
|
||||
_BV( 3 ) , // PE 3 ** 5 ** PWM5
|
||||
_BV( 3 ) , // PH 3 ** 6 ** PWM6
|
||||
_BV( 4 ) , // PH 4 ** 7 ** PWM7
|
||||
_BV( 5 ) , // PH 5 ** 8 ** PWM8
|
||||
_BV( 6 ) , // PH 6 ** 9 ** PWM9
|
||||
_BV( 4 ) , // PB 4 ** 10 ** PWM10
|
||||
_BV( 5 ) , // PB 5 ** 11 ** PWM11
|
||||
_BV( 6 ) , // PB 6 ** 12 ** PWM12
|
||||
_BV( 7 ) , // PB 7 ** 13 ** PWM13
|
||||
_BV( 1 ) , // PJ 1 ** 14 ** USART3_TX
|
||||
_BV( 0 ) , // PJ 0 ** 15 ** USART3_RX
|
||||
_BV( 1 ) , // PH 1 ** 16 ** USART2_TX
|
||||
_BV( 0 ) , // PH 0 ** 17 ** USART2_RX
|
||||
_BV( 3 ) , // PD 3 ** 18 ** USART1_TX
|
||||
_BV( 2 ) , // PD 2 ** 19 ** USART1_RX
|
||||
_BV( 1 ) , // PD 1 ** 20 ** I2C_SDA
|
||||
_BV( 0 ) , // PD 0 ** 21 ** I2C_SCL
|
||||
_BV( 0 ) , // PA 0 ** 22 ** D22
|
||||
_BV( 1 ) , // PA 1 ** 23 ** D23
|
||||
_BV( 2 ) , // PA 2 ** 24 ** D24
|
||||
_BV( 3 ) , // PA 3 ** 25 ** D25
|
||||
_BV( 4 ) , // PA 4 ** 26 ** D26
|
||||
_BV( 5 ) , // PA 5 ** 27 ** D27
|
||||
_BV( 6 ) , // PA 6 ** 28 ** D28
|
||||
_BV( 7 ) , // PA 7 ** 29 ** D29
|
||||
_BV( 7 ) , // PC 7 ** 30 ** D30
|
||||
_BV( 6 ) , // PC 6 ** 31 ** D31
|
||||
_BV( 5 ) , // PC 5 ** 32 ** D32
|
||||
_BV( 4 ) , // PC 4 ** 33 ** D33
|
||||
_BV( 3 ) , // PC 3 ** 34 ** D34
|
||||
_BV( 2 ) , // PC 2 ** 35 ** D35
|
||||
_BV( 1 ) , // PC 1 ** 36 ** D36
|
||||
_BV( 0 ) , // PC 0 ** 37 ** D37
|
||||
_BV( 7 ) , // PD 7 ** 38 ** D38
|
||||
_BV( 2 ) , // PG 2 ** 39 ** D39
|
||||
_BV( 1 ) , // PG 1 ** 40 ** D40
|
||||
_BV( 0 ) , // PG 0 ** 41 ** D41
|
||||
_BV( 7 ) , // PL 7 ** 42 ** D42
|
||||
_BV( 6 ) , // PL 6 ** 43 ** D43
|
||||
_BV( 5 ) , // PL 5 ** 44 ** D44
|
||||
_BV( 4 ) , // PL 4 ** 45 ** D45
|
||||
_BV( 3 ) , // PL 3 ** 46 ** D46
|
||||
_BV( 2 ) , // PL 2 ** 47 ** D47
|
||||
_BV( 1 ) , // PL 1 ** 48 ** D48
|
||||
_BV( 0 ) , // PL 0 ** 49 ** D49
|
||||
_BV( 3 ) , // PB 3 ** 50 ** SPI_MISO
|
||||
_BV( 2 ) , // PB 2 ** 51 ** SPI_MOSI
|
||||
_BV( 1 ) , // PB 1 ** 52 ** SPI_SCK
|
||||
_BV( 0 ) , // PB 0 ** 53 ** SPI_SS
|
||||
_BV( 0 ) , // PF 0 ** 54 ** A0
|
||||
_BV( 1 ) , // PF 1 ** 55 ** A1
|
||||
_BV( 2 ) , // PF 2 ** 56 ** A2
|
||||
_BV( 3 ) , // PF 3 ** 57 ** A3
|
||||
_BV( 4 ) , // PF 4 ** 58 ** A4
|
||||
_BV( 5 ) , // PF 5 ** 59 ** A5
|
||||
_BV( 6 ) , // PF 6 ** 60 ** A6
|
||||
_BV( 7 ) , // PF 7 ** 61 ** A7
|
||||
_BV( 0 ) , // PK 0 ** 62 ** A8
|
||||
_BV( 1 ) , // PK 1 ** 63 ** A9
|
||||
_BV( 2 ) , // PK 2 ** 64 ** A10
|
||||
_BV( 3 ) , // PK 3 ** 65 ** A11
|
||||
_BV( 4 ) , // PK 4 ** 66 ** A12
|
||||
_BV( 5 ) , // PK 5 ** 67 ** A13
|
||||
_BV( 6 ) , // PK 6 ** 68 ** A14
|
||||
_BV( 7 ) , // PK 7 ** 69 ** A15
|
||||
_BV( 4 ) , // PG 4 ** 70 ** D70
|
||||
_BV( 3 ) , // PG 3 ** 71 ** D71
|
||||
_BV( 2 ) , // PJ 2 ** 72 ** D72
|
||||
_BV( 3 ) , // PJ 3 ** 73 ** D73
|
||||
_BV( 7 ) , // PJ 7 ** 74 ** D74
|
||||
_BV( 4 ) , // PJ 4 ** 75 ** D75
|
||||
_BV( 5 ) , // PJ 5 ** 76 ** D76
|
||||
_BV( 6 ) , // PJ 6 ** 77 ** D77
|
||||
_BV( 2 ) , // PE 2 ** 78 ** D78
|
||||
_BV( 6 ) , // PE 6 ** 79 ** D79
|
||||
_BV( 7 ) , // PE 7 ** 80 ** D80
|
||||
_BV( 4 ) , // PD 4 ** 81 ** D81
|
||||
_BV( 5 ) , // PD 5 ** 82 ** D82
|
||||
_BV( 6 ) , // PD 6 ** 83 ** D83
|
||||
_BV( 2 ) , // PH 2 ** 84 ** D84
|
||||
_BV( 7 ) , // PH 7 ** 85 ** D85
|
||||
// PIN IN PORT
|
||||
// -------------------------------------------
|
||||
_BV( 0 ) , // PE 0 ** 0 ** USART0_RX
|
||||
_BV( 1 ) , // PE 1 ** 1 ** USART0_TX
|
||||
_BV( 4 ) , // PE 4 ** 2 ** PWM2
|
||||
_BV( 5 ) , // PE 5 ** 3 ** PWM3
|
||||
_BV( 5 ) , // PG 5 ** 4 ** PWM4
|
||||
_BV( 3 ) , // PE 3 ** 5 ** PWM5
|
||||
_BV( 3 ) , // PH 3 ** 6 ** PWM6
|
||||
_BV( 4 ) , // PH 4 ** 7 ** PWM7
|
||||
_BV( 5 ) , // PH 5 ** 8 ** PWM8
|
||||
_BV( 6 ) , // PH 6 ** 9 ** PWM9
|
||||
_BV( 4 ) , // PB 4 ** 10 ** PWM10
|
||||
_BV( 5 ) , // PB 5 ** 11 ** PWM11
|
||||
_BV( 6 ) , // PB 6 ** 12 ** PWM12
|
||||
_BV( 7 ) , // PB 7 ** 13 ** PWM13
|
||||
_BV( 1 ) , // PJ 1 ** 14 ** USART3_TX
|
||||
_BV( 0 ) , // PJ 0 ** 15 ** USART3_RX
|
||||
_BV( 1 ) , // PH 1 ** 16 ** USART2_TX
|
||||
_BV( 0 ) , // PH 0 ** 17 ** USART2_RX
|
||||
_BV( 3 ) , // PD 3 ** 18 ** USART1_TX
|
||||
_BV( 2 ) , // PD 2 ** 19 ** USART1_RX
|
||||
_BV( 1 ) , // PD 1 ** 20 ** I2C_SDA
|
||||
_BV( 0 ) , // PD 0 ** 21 ** I2C_SCL
|
||||
_BV( 0 ) , // PA 0 ** 22 ** D22
|
||||
_BV( 1 ) , // PA 1 ** 23 ** D23
|
||||
_BV( 2 ) , // PA 2 ** 24 ** D24
|
||||
_BV( 3 ) , // PA 3 ** 25 ** D25
|
||||
_BV( 4 ) , // PA 4 ** 26 ** D26
|
||||
_BV( 5 ) , // PA 5 ** 27 ** D27
|
||||
_BV( 6 ) , // PA 6 ** 28 ** D28
|
||||
_BV( 7 ) , // PA 7 ** 29 ** D29
|
||||
_BV( 7 ) , // PC 7 ** 30 ** D30
|
||||
_BV( 6 ) , // PC 6 ** 31 ** D31
|
||||
_BV( 5 ) , // PC 5 ** 32 ** D32
|
||||
_BV( 4 ) , // PC 4 ** 33 ** D33
|
||||
_BV( 3 ) , // PC 3 ** 34 ** D34
|
||||
_BV( 2 ) , // PC 2 ** 35 ** D35
|
||||
_BV( 1 ) , // PC 1 ** 36 ** D36
|
||||
_BV( 0 ) , // PC 0 ** 37 ** D37
|
||||
_BV( 7 ) , // PD 7 ** 38 ** D38
|
||||
_BV( 2 ) , // PG 2 ** 39 ** D39
|
||||
_BV( 1 ) , // PG 1 ** 40 ** D40
|
||||
_BV( 0 ) , // PG 0 ** 41 ** D41
|
||||
_BV( 7 ) , // PL 7 ** 42 ** D42
|
||||
_BV( 6 ) , // PL 6 ** 43 ** D43
|
||||
_BV( 5 ) , // PL 5 ** 44 ** D44
|
||||
_BV( 4 ) , // PL 4 ** 45 ** D45
|
||||
_BV( 3 ) , // PL 3 ** 46 ** D46
|
||||
_BV( 2 ) , // PL 2 ** 47 ** D47
|
||||
_BV( 1 ) , // PL 1 ** 48 ** D48
|
||||
_BV( 0 ) , // PL 0 ** 49 ** D49
|
||||
_BV( 3 ) , // PB 3 ** 50 ** SPI_MISO
|
||||
_BV( 2 ) , // PB 2 ** 51 ** SPI_MOSI
|
||||
_BV( 1 ) , // PB 1 ** 52 ** SPI_SCK
|
||||
_BV( 0 ) , // PB 0 ** 53 ** SPI_SS
|
||||
_BV( 0 ) , // PF 0 ** 54 ** A0
|
||||
_BV( 1 ) , // PF 1 ** 55 ** A1
|
||||
_BV( 2 ) , // PF 2 ** 56 ** A2
|
||||
_BV( 3 ) , // PF 3 ** 57 ** A3
|
||||
_BV( 4 ) , // PF 4 ** 58 ** A4
|
||||
_BV( 5 ) , // PF 5 ** 59 ** A5
|
||||
_BV( 6 ) , // PF 6 ** 60 ** A6
|
||||
_BV( 7 ) , // PF 7 ** 61 ** A7
|
||||
_BV( 0 ) , // PK 0 ** 62 ** A8
|
||||
_BV( 1 ) , // PK 1 ** 63 ** A9
|
||||
_BV( 2 ) , // PK 2 ** 64 ** A10
|
||||
_BV( 3 ) , // PK 3 ** 65 ** A11
|
||||
_BV( 4 ) , // PK 4 ** 66 ** A12
|
||||
_BV( 5 ) , // PK 5 ** 67 ** A13
|
||||
_BV( 6 ) , // PK 6 ** 68 ** A14
|
||||
_BV( 7 ) , // PK 7 ** 69 ** A15
|
||||
_BV( 4 ) , // PG 4 ** 70 ** D70
|
||||
_BV( 3 ) , // PG 3 ** 71 ** D71
|
||||
_BV( 2 ) , // PJ 2 ** 72 ** D72
|
||||
_BV( 3 ) , // PJ 3 ** 73 ** D73
|
||||
_BV( 7 ) , // PJ 7 ** 74 ** D74
|
||||
_BV( 4 ) , // PJ 4 ** 75 ** D75
|
||||
_BV( 5 ) , // PJ 5 ** 76 ** D76
|
||||
_BV( 6 ) , // PJ 6 ** 77 ** D77
|
||||
_BV( 2 ) , // PE 2 ** 78 ** D78
|
||||
_BV( 6 ) , // PE 6 ** 79 ** D79
|
||||
_BV( 7 ) , // PE 7 ** 80 ** D80
|
||||
_BV( 4 ) , // PD 4 ** 81 ** D81
|
||||
_BV( 5 ) , // PD 5 ** 82 ** D82
|
||||
_BV( 6 ) , // PD 6 ** 83 ** D83
|
||||
_BV( 2 ) , // PH 2 ** 84 ** D84
|
||||
_BV( 7 ) , // PH 7 ** 85 ** D85
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_timer_PGM[] = {
|
||||
// TIMERS
|
||||
// -------------------------------------------
|
||||
NOT_ON_TIMER , // PE 0 ** 0 ** USART0_RX
|
||||
NOT_ON_TIMER , // PE 1 ** 1 ** USART0_TX
|
||||
TIMER3B , // PE 4 ** 2 ** PWM2
|
||||
TIMER3C , // PE 5 ** 3 ** PWM3
|
||||
TIMER0B , // PG 5 ** 4 ** PWM4
|
||||
TIMER3A , // PE 3 ** 5 ** PWM5
|
||||
TIMER4A , // PH 3 ** 6 ** PWM6
|
||||
TIMER4B , // PH 4 ** 7 ** PWM7
|
||||
TIMER4C , // PH 5 ** 8 ** PWM8
|
||||
TIMER2B , // PH 6 ** 9 ** PWM9
|
||||
TIMER2A , // PB 4 ** 10 ** PWM10
|
||||
TIMER1A , // PB 5 ** 11 ** PWM11
|
||||
TIMER1B , // PB 6 ** 12 ** PWM12
|
||||
TIMER0A , // PB 7 ** 13 ** PWM13
|
||||
NOT_ON_TIMER , // PJ 1 ** 14 ** USART3_TX
|
||||
NOT_ON_TIMER , // PJ 0 ** 15 ** USART3_RX
|
||||
NOT_ON_TIMER , // PH 1 ** 16 ** USART2_TX
|
||||
NOT_ON_TIMER , // PH 0 ** 17 ** USART2_RX
|
||||
NOT_ON_TIMER , // PD 3 ** 18 ** USART1_TX
|
||||
NOT_ON_TIMER , // PD 2 ** 19 ** USART1_RX
|
||||
NOT_ON_TIMER , // PD 1 ** 20 ** I2C_SDA
|
||||
NOT_ON_TIMER , // PD 0 ** 21 ** I2C_SCL
|
||||
NOT_ON_TIMER , // PA 0 ** 22 ** D22
|
||||
NOT_ON_TIMER , // PA 1 ** 23 ** D23
|
||||
NOT_ON_TIMER , // PA 2 ** 24 ** D24
|
||||
NOT_ON_TIMER , // PA 3 ** 25 ** D25
|
||||
NOT_ON_TIMER , // PA 4 ** 26 ** D26
|
||||
NOT_ON_TIMER , // PA 5 ** 27 ** D27
|
||||
NOT_ON_TIMER , // PA 6 ** 28 ** D28
|
||||
NOT_ON_TIMER , // PA 7 ** 29 ** D29
|
||||
NOT_ON_TIMER , // PC 7 ** 30 ** D30
|
||||
NOT_ON_TIMER , // PC 6 ** 31 ** D31
|
||||
NOT_ON_TIMER , // PC 5 ** 32 ** D32
|
||||
NOT_ON_TIMER , // PC 4 ** 33 ** D33
|
||||
NOT_ON_TIMER , // PC 3 ** 34 ** D34
|
||||
NOT_ON_TIMER , // PC 2 ** 35 ** D35
|
||||
NOT_ON_TIMER , // PC 1 ** 36 ** D36
|
||||
NOT_ON_TIMER , // PC 0 ** 37 ** D37
|
||||
NOT_ON_TIMER , // PD 7 ** 38 ** D38
|
||||
NOT_ON_TIMER , // PG 2 ** 39 ** D39
|
||||
NOT_ON_TIMER , // PG 1 ** 40 ** D40
|
||||
NOT_ON_TIMER , // PG 0 ** 41 ** D41
|
||||
NOT_ON_TIMER , // PL 7 ** 42 ** D42
|
||||
NOT_ON_TIMER , // PL 6 ** 43 ** D43
|
||||
TIMER5C , // PL 5 ** 44 ** D44
|
||||
TIMER5B , // PL 4 ** 45 ** D45
|
||||
TIMER5A , // PL 3 ** 46 ** D46
|
||||
NOT_ON_TIMER , // PL 2 ** 47 ** D47
|
||||
NOT_ON_TIMER , // PL 1 ** 48 ** D48
|
||||
NOT_ON_TIMER , // PL 0 ** 49 ** D49
|
||||
NOT_ON_TIMER , // PB 3 ** 50 ** SPI_MISO
|
||||
NOT_ON_TIMER , // PB 2 ** 51 ** SPI_MOSI
|
||||
NOT_ON_TIMER , // PB 1 ** 52 ** SPI_SCK
|
||||
NOT_ON_TIMER , // PB 0 ** 53 ** SPI_SS
|
||||
NOT_ON_TIMER , // PF 0 ** 54 ** A0
|
||||
NOT_ON_TIMER , // PF 1 ** 55 ** A1
|
||||
NOT_ON_TIMER , // PF 2 ** 56 ** A2
|
||||
NOT_ON_TIMER , // PF 3 ** 57 ** A3
|
||||
NOT_ON_TIMER , // PF 4 ** 58 ** A4
|
||||
NOT_ON_TIMER , // PF 5 ** 59 ** A5
|
||||
NOT_ON_TIMER , // PF 6 ** 60 ** A6
|
||||
NOT_ON_TIMER , // PF 7 ** 61 ** A7
|
||||
NOT_ON_TIMER , // PK 0 ** 62 ** A8
|
||||
NOT_ON_TIMER , // PK 1 ** 63 ** A9
|
||||
NOT_ON_TIMER , // PK 2 ** 64 ** A10
|
||||
NOT_ON_TIMER , // PK 3 ** 65 ** A11
|
||||
NOT_ON_TIMER , // PK 4 ** 66 ** A12
|
||||
NOT_ON_TIMER , // PK 5 ** 67 ** A13
|
||||
NOT_ON_TIMER , // PK 6 ** 68 ** A14
|
||||
NOT_ON_TIMER , // PK 7 ** 69 ** A15
|
||||
NOT_ON_TIMER , // PG 4 ** 70 ** D70
|
||||
NOT_ON_TIMER , // PG 3 ** 71 ** D71
|
||||
NOT_ON_TIMER , // PJ 2 ** 72 ** D72
|
||||
NOT_ON_TIMER , // PJ 3 ** 73 ** D73
|
||||
NOT_ON_TIMER , // PJ 7 ** 74 ** D74
|
||||
NOT_ON_TIMER , // PJ 4 ** 75 ** D75
|
||||
NOT_ON_TIMER , // PJ 5 ** 76 ** D76
|
||||
NOT_ON_TIMER , // PJ 6 ** 77 ** D77
|
||||
NOT_ON_TIMER , // PE 2 ** 78 ** D78
|
||||
NOT_ON_TIMER , // PE 6 ** 79 ** D79
|
||||
NOT_ON_TIMER , // PE 7 ** 80 ** D80
|
||||
NOT_ON_TIMER , // PD 4 ** 81 ** D81
|
||||
NOT_ON_TIMER , // PD 5 ** 82 ** D82
|
||||
NOT_ON_TIMER , // PD 6 ** 83 ** D83
|
||||
NOT_ON_TIMER , // PH 2 ** 84 ** D84
|
||||
NOT_ON_TIMER , // PH 7 ** 85 ** D85
|
||||
// TIMERS
|
||||
// -------------------------------------------
|
||||
NOT_ON_TIMER , // PE 0 ** 0 ** USART0_RX
|
||||
NOT_ON_TIMER , // PE 1 ** 1 ** USART0_TX
|
||||
TIMER3B , // PE 4 ** 2 ** PWM2
|
||||
TIMER3C , // PE 5 ** 3 ** PWM3
|
||||
TIMER0B , // PG 5 ** 4 ** PWM4
|
||||
TIMER3A , // PE 3 ** 5 ** PWM5
|
||||
TIMER4A , // PH 3 ** 6 ** PWM6
|
||||
TIMER4B , // PH 4 ** 7 ** PWM7
|
||||
TIMER4C , // PH 5 ** 8 ** PWM8
|
||||
TIMER2B , // PH 6 ** 9 ** PWM9
|
||||
TIMER2A , // PB 4 ** 10 ** PWM10
|
||||
TIMER1A , // PB 5 ** 11 ** PWM11
|
||||
TIMER1B , // PB 6 ** 12 ** PWM12
|
||||
TIMER0A , // PB 7 ** 13 ** PWM13
|
||||
NOT_ON_TIMER , // PJ 1 ** 14 ** USART3_TX
|
||||
NOT_ON_TIMER , // PJ 0 ** 15 ** USART3_RX
|
||||
NOT_ON_TIMER , // PH 1 ** 16 ** USART2_TX
|
||||
NOT_ON_TIMER , // PH 0 ** 17 ** USART2_RX
|
||||
NOT_ON_TIMER , // PD 3 ** 18 ** USART1_TX
|
||||
NOT_ON_TIMER , // PD 2 ** 19 ** USART1_RX
|
||||
NOT_ON_TIMER , // PD 1 ** 20 ** I2C_SDA
|
||||
NOT_ON_TIMER , // PD 0 ** 21 ** I2C_SCL
|
||||
NOT_ON_TIMER , // PA 0 ** 22 ** D22
|
||||
NOT_ON_TIMER , // PA 1 ** 23 ** D23
|
||||
NOT_ON_TIMER , // PA 2 ** 24 ** D24
|
||||
NOT_ON_TIMER , // PA 3 ** 25 ** D25
|
||||
NOT_ON_TIMER , // PA 4 ** 26 ** D26
|
||||
NOT_ON_TIMER , // PA 5 ** 27 ** D27
|
||||
NOT_ON_TIMER , // PA 6 ** 28 ** D28
|
||||
NOT_ON_TIMER , // PA 7 ** 29 ** D29
|
||||
NOT_ON_TIMER , // PC 7 ** 30 ** D30
|
||||
NOT_ON_TIMER , // PC 6 ** 31 ** D31
|
||||
NOT_ON_TIMER , // PC 5 ** 32 ** D32
|
||||
NOT_ON_TIMER , // PC 4 ** 33 ** D33
|
||||
NOT_ON_TIMER , // PC 3 ** 34 ** D34
|
||||
NOT_ON_TIMER , // PC 2 ** 35 ** D35
|
||||
NOT_ON_TIMER , // PC 1 ** 36 ** D36
|
||||
NOT_ON_TIMER , // PC 0 ** 37 ** D37
|
||||
NOT_ON_TIMER , // PD 7 ** 38 ** D38
|
||||
NOT_ON_TIMER , // PG 2 ** 39 ** D39
|
||||
NOT_ON_TIMER , // PG 1 ** 40 ** D40
|
||||
NOT_ON_TIMER , // PG 0 ** 41 ** D41
|
||||
NOT_ON_TIMER , // PL 7 ** 42 ** D42
|
||||
NOT_ON_TIMER , // PL 6 ** 43 ** D43
|
||||
TIMER5C , // PL 5 ** 44 ** D44
|
||||
TIMER5B , // PL 4 ** 45 ** D45
|
||||
TIMER5A , // PL 3 ** 46 ** D46
|
||||
NOT_ON_TIMER , // PL 2 ** 47 ** D47
|
||||
NOT_ON_TIMER , // PL 1 ** 48 ** D48
|
||||
NOT_ON_TIMER , // PL 0 ** 49 ** D49
|
||||
NOT_ON_TIMER , // PB 3 ** 50 ** SPI_MISO
|
||||
NOT_ON_TIMER , // PB 2 ** 51 ** SPI_MOSI
|
||||
NOT_ON_TIMER , // PB 1 ** 52 ** SPI_SCK
|
||||
NOT_ON_TIMER , // PB 0 ** 53 ** SPI_SS
|
||||
NOT_ON_TIMER , // PF 0 ** 54 ** A0
|
||||
NOT_ON_TIMER , // PF 1 ** 55 ** A1
|
||||
NOT_ON_TIMER , // PF 2 ** 56 ** A2
|
||||
NOT_ON_TIMER , // PF 3 ** 57 ** A3
|
||||
NOT_ON_TIMER , // PF 4 ** 58 ** A4
|
||||
NOT_ON_TIMER , // PF 5 ** 59 ** A5
|
||||
NOT_ON_TIMER , // PF 6 ** 60 ** A6
|
||||
NOT_ON_TIMER , // PF 7 ** 61 ** A7
|
||||
NOT_ON_TIMER , // PK 0 ** 62 ** A8
|
||||
NOT_ON_TIMER , // PK 1 ** 63 ** A9
|
||||
NOT_ON_TIMER , // PK 2 ** 64 ** A10
|
||||
NOT_ON_TIMER , // PK 3 ** 65 ** A11
|
||||
NOT_ON_TIMER , // PK 4 ** 66 ** A12
|
||||
NOT_ON_TIMER , // PK 5 ** 67 ** A13
|
||||
NOT_ON_TIMER , // PK 6 ** 68 ** A14
|
||||
NOT_ON_TIMER , // PK 7 ** 69 ** A15
|
||||
NOT_ON_TIMER , // PG 4 ** 70 ** D70
|
||||
NOT_ON_TIMER , // PG 3 ** 71 ** D71
|
||||
NOT_ON_TIMER , // PJ 2 ** 72 ** D72
|
||||
NOT_ON_TIMER , // PJ 3 ** 73 ** D73
|
||||
NOT_ON_TIMER , // PJ 7 ** 74 ** D74
|
||||
NOT_ON_TIMER , // PJ 4 ** 75 ** D75
|
||||
NOT_ON_TIMER , // PJ 5 ** 76 ** D76
|
||||
NOT_ON_TIMER , // PJ 6 ** 77 ** D77
|
||||
NOT_ON_TIMER , // PE 2 ** 78 ** D78
|
||||
NOT_ON_TIMER , // PE 6 ** 79 ** D79
|
||||
NOT_ON_TIMER , // PE 7 ** 80 ** D80
|
||||
NOT_ON_TIMER , // PD 4 ** 81 ** D81
|
||||
NOT_ON_TIMER , // PD 5 ** 82 ** D82
|
||||
NOT_ON_TIMER , // PD 6 ** 83 ** D83
|
||||
NOT_ON_TIMER , // PH 2 ** 84 ** D84
|
||||
NOT_ON_TIMER , // PH 7 ** 85 ** D85
|
||||
};
|
||||
|
||||
#endif
|
||||
|
@@ -0,0 +1,437 @@
|
||||
/*
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2019, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************
|
||||
* Automatically generated from STM32F407Z(E-G)Tx.xml
|
||||
*/
|
||||
#include "Arduino.h"
|
||||
#include "PeripheralPins.h"
|
||||
|
||||
/* =====
|
||||
* Note: Commented lines are alternative possibilities which are not used by default.
|
||||
* If you change them, you should know what you're doing first.
|
||||
* =====
|
||||
*/
|
||||
|
||||
//*** ADC ***
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
const PinMap PinMap_ADC[] = {
|
||||
{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
|
||||
//{PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0
|
||||
//{PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0
|
||||
{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
|
||||
//{PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1
|
||||
//{PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1
|
||||
{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
|
||||
//{PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2
|
||||
//{PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2
|
||||
{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
|
||||
//{PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3
|
||||
//{PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3
|
||||
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
|
||||
//{PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4
|
||||
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
|
||||
//{PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5
|
||||
{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
|
||||
//{PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6
|
||||
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
|
||||
//{PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7
|
||||
{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
|
||||
//{PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8
|
||||
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
|
||||
//{PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9
|
||||
{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
|
||||
//{PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10
|
||||
//{PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10
|
||||
{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
|
||||
//{PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11
|
||||
//{PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11
|
||||
{PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
|
||||
//{PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12
|
||||
//{PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12
|
||||
{PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
|
||||
//{PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13
|
||||
//{PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13
|
||||
{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
|
||||
//{PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14
|
||||
{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
|
||||
//{PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15
|
||||
|
||||
#if STM32F4X_PIN_NUM >= 144 //144 pins mcu, 114 gpio, 24 ADC
|
||||
{PF_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_IN9
|
||||
{PF_4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_IN14
|
||||
{PF_5, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_IN15
|
||||
{PF_6, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4
|
||||
{PF_7, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5
|
||||
{PF_8, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6
|
||||
{PF_9, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7
|
||||
{PF_10, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8
|
||||
#endif
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** DAC ***
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
const PinMap PinMap_DAC[] = {
|
||||
{PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
|
||||
{PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** I2C ***
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
const PinMap PinMap_I2C_SDA[] = {
|
||||
{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||
{PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||
{PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
|
||||
#if STM32F4X_PIN_NUM >= 144 //144 pins mcu, 114 gpio
|
||||
{PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||
#endif
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
const PinMap PinMap_I2C_SCL[] = {
|
||||
{PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
|
||||
{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||
{PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||
{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||
#if STM32F4X_PIN_NUM >= 144 //144 pins mcu, 114 gpio
|
||||
{PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||
#endif
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** PWM ***
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
const PinMap PinMap_PWM[] = {
|
||||
{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
||||
//{PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
|
||||
{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
|
||||
//{PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
|
||||
{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
|
||||
//{PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
|
||||
//{PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
|
||||
{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
|
||||
//{PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
|
||||
//{PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
|
||||
{PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
||||
//{PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
|
||||
{PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||
//{PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
|
||||
//{PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
||||
{PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
||||
//{PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
|
||||
//{PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
|
||||
{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
|
||||
{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
|
||||
{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
|
||||
{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
|
||||
//{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
||||
//{PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
||||
{PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
|
||||
//{PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
|
||||
//{PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
|
||||
//{PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
|
||||
//{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
|
||||
{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
||||
//{PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
|
||||
//{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
|
||||
//{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
|
||||
{PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
|
||||
//{PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
|
||||
{PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
|
||||
{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
|
||||
{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
|
||||
{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
||||
{PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
||||
{PB_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
|
||||
{PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1
|
||||
{PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PB_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
|
||||
{PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2
|
||||
{PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
|
||||
{PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
||||
{PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
|
||||
{PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
|
||||
{PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3
|
||||
//{PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
|
||||
//{PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4
|
||||
{PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
|
||||
{PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
|
||||
{PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
|
||||
{PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
|
||||
{PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
|
||||
{PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
|
||||
{PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
||||
{PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
|
||||
{PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
||||
{PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
|
||||
{PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
|
||||
{PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
|
||||
#if STM32F4X_PIN_NUM >= 144 //144 pins mcu, 114 gpio
|
||||
{PF_6, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
|
||||
{PF_7, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
|
||||
{PF_8, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
|
||||
{PF_9, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
|
||||
#endif
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** SERIAL ***
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
const PinMap PinMap_UART_TX[] = {
|
||||
{PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||
{PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
#if STM32F4X_PIN_NUM >= 144 //144 pins mcu, 114 gpio
|
||||
{PG_14, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||
#endif
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
const PinMap PinMap_UART_RX[] = {
|
||||
{PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||
{PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
#if STM32F4X_PIN_NUM >= 144 //144 pins mcu, 114 gpio
|
||||
{PG_9, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||
#endif
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
const PinMap PinMap_UART_RTS[] = {
|
||||
{PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
#if STM32F4X_PIN_NUM >= 144 //144 pins mcu, 114 gpio
|
||||
{PG_8, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||
{PG_12, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||
#endif
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
const PinMap PinMap_UART_CTS[] = {
|
||||
{PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
#if STM32F4X_PIN_NUM >= 144 //144 pins mcu, 114 gpio
|
||||
{PG_13, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||
{PG_15, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||
#endif
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** SPI ***
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
const PinMap PinMap_SPI_MOSI[] = {
|
||||
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
const PinMap PinMap_SPI_MISO[] = {
|
||||
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
const PinMap PinMap_SPI_SCLK[] = {
|
||||
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
const PinMap PinMap_SPI_SSEL[] = {
|
||||
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** CAN ***
|
||||
|
||||
#ifdef HAL_CAN_MODULE_ENABLED
|
||||
const PinMap PinMap_CAN_RD[] = {
|
||||
{PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
||||
{PB_5, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
|
||||
{PB_8, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
||||
{PB_12, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
|
||||
{PD_0, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_CAN_MODULE_ENABLED
|
||||
const PinMap PinMap_CAN_TD[] = {
|
||||
{PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
||||
{PB_6, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
|
||||
{PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
||||
{PB_13, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
|
||||
{PD_1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** ETHERNET ***
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
const PinMap PinMap_Ethernet[] = {
|
||||
{PA_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS
|
||||
{PA_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK|ETH_RX_CLK
|
||||
{PA_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO
|
||||
{PA_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL
|
||||
{PA_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV|ETH_RX_DV
|
||||
{PB_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2
|
||||
{PB_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3
|
||||
{PB_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
|
||||
{PB_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
|
||||
{PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER
|
||||
{PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
|
||||
{PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
|
||||
{PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
|
||||
{PC_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC
|
||||
{PC_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2
|
||||
{PC_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK
|
||||
{PC_4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0
|
||||
{PC_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1
|
||||
{PE_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
|
||||
#if STM32F4X_PIN_NUM >= 144 //144 pins mcu, 114 gpio
|
||||
{PG_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
|
||||
{PG_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
|
||||
{PG_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
|
||||
{PG_14, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
|
||||
#endif
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** No QUADSPI ***
|
||||
|
||||
//*** USB ***
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
const PinMap PinMap_USB_OTG_FS[] = {
|
||||
//{PA_8, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
|
||||
//{PA_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS
|
||||
//{PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID
|
||||
{PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM
|
||||
{PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
const PinMap PinMap_USB_OTG_HS[] = {
|
||||
#ifdef USE_USB_HS_IN_FS
|
||||
{PA_4, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF
|
||||
{PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID
|
||||
{PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS
|
||||
{PB_14, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM
|
||||
{PB_15, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP
|
||||
#else
|
||||
{PA_3, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0
|
||||
{PA_5, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK
|
||||
{PB_0, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1
|
||||
{PB_1, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2
|
||||
{PB_5, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7
|
||||
{PB_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3
|
||||
{PB_11, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4
|
||||
{PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5
|
||||
{PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6
|
||||
{PC_0, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP
|
||||
{PC_2, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR
|
||||
{PC_3, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT
|
||||
#endif /* USE_USB_HS_IN_FS */
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
@@ -0,0 +1,50 @@
|
||||
/* SYS_WKUP */
|
||||
#ifdef PWR_WAKEUP_PIN1
|
||||
SYS_WKUP1 = PA_0,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN2
|
||||
SYS_WKUP2 = NC,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN3
|
||||
SYS_WKUP3 = NC,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN4
|
||||
SYS_WKUP4 = NC,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN5
|
||||
SYS_WKUP5 = NC,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN6
|
||||
SYS_WKUP6 = NC,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN7
|
||||
SYS_WKUP7 = NC,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN8
|
||||
SYS_WKUP8 = NC,
|
||||
#endif
|
||||
/* USB */
|
||||
#ifdef USBCON
|
||||
USB_OTG_FS_SOF = PA_8,
|
||||
USB_OTG_FS_VBUS = PA_9,
|
||||
USB_OTG_FS_ID = PA_10,
|
||||
USB_OTG_FS_DM = PA_11,
|
||||
USB_OTG_FS_DP = PA_12,
|
||||
USB_OTG_HS_ULPI_D0 = PA_3,
|
||||
USB_OTG_HS_SOF = PA_4,
|
||||
USB_OTG_HS_ULPI_CK = PA_5,
|
||||
USB_OTG_HS_ULPI_D1 = PB_0,
|
||||
USB_OTG_HS_ULPI_D2 = PB_1,
|
||||
USB_OTG_HS_ULPI_D7 = PB_5,
|
||||
USB_OTG_HS_ULPI_D3 = PB_10,
|
||||
USB_OTG_HS_ULPI_D4 = PB_11,
|
||||
USB_OTG_HS_ID = PB_12,
|
||||
USB_OTG_HS_ULPI_D5 = PB_12,
|
||||
USB_OTG_HS_ULPI_D6 = PB_13,
|
||||
USB_OTG_HS_VBUS = PB_13,
|
||||
USB_OTG_HS_DM = PB_14,
|
||||
USB_OTG_HS_DP = PB_15,
|
||||
USB_OTG_HS_ULPI_STP = PC_0,
|
||||
USB_OTG_HS_ULPI_DIR = PC_2,
|
||||
USB_OTG_HS_ULPI_NXT = PC_3,
|
||||
#endif
|
@@ -0,0 +1,481 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_conf.h
|
||||
* @brief HAL configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4xx_HAL_CONF_CUSTOM
|
||||
#define __STM32F4xx_HAL_CONF_CUSTOM
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* ########################## Module Selection ############################## */
|
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/
|
||||
#define HAL_MODULE_ENABLED
|
||||
#define HAL_ADC_MODULE_ENABLED
|
||||
/* #define HAL_CAN_MODULE_ENABLED */
|
||||
/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||
#define HAL_CRC_MODULE_ENABLED
|
||||
/* #define HAL_CEC_MODULE_ENABLED */
|
||||
/* #define HAL_CRYP_MODULE_ENABLED */
|
||||
#define HAL_DAC_MODULE_ENABLED
|
||||
/* #define HAL_DCMI_MODULE_ENABLED */
|
||||
#define HAL_DMA_MODULE_ENABLED
|
||||
/* #define HAL_DMA2D_MODULE_ENABLED */
|
||||
/* #define HAL_ETH_MODULE_ENABLED */
|
||||
#define HAL_FLASH_MODULE_ENABLED
|
||||
/* #define HAL_NAND_MODULE_ENABLED */
|
||||
/* #define HAL_NOR_MODULE_ENABLED */
|
||||
/* #define HAL_PCCARD_MODULE_ENABLED */
|
||||
#define HAL_SRAM_MODULE_ENABLED
|
||||
/* #define HAL_SDRAM_MODULE_ENABLED */
|
||||
/* #define HAL_HASH_MODULE_ENABLED */
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
/* #define HAL_EXTI_MODULE_ENABLED */
|
||||
#define HAL_I2C_MODULE_ENABLED
|
||||
/* #define HAL_SMBUS_MODULE_ENABLED */
|
||||
/* #define HAL_I2S_MODULE_ENABLED */
|
||||
/* #define HAL_IWDG_MODULE_ENABLED */
|
||||
/* #define HAL_LTDC_MODULE_ENABLED */
|
||||
/* #define HAL_DSI_MODULE_ENABLED */
|
||||
#define HAL_PWR_MODULE_ENABLED
|
||||
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||
#define HAL_RCC_MODULE_ENABLED
|
||||
/* #define HAL_RNG_MODULE_ENABLED */
|
||||
#define HAL_RTC_MODULE_ENABLED
|
||||
/* #define HAL_SAI_MODULE_ENABLED */
|
||||
#define HAL_SD_MODULE_ENABLED
|
||||
#define HAL_SPI_MODULE_ENABLED
|
||||
#define HAL_TIM_MODULE_ENABLED
|
||||
/* #define HAL_UART_MODULE_ENABLED */
|
||||
/* #define HAL_USART_MODULE_ENABLED */
|
||||
/* #define HAL_IRDA_MODULE_ENABLED */
|
||||
/* #define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
/* #define HAL_WWDG_MODULE_ENABLED */
|
||||
#define HAL_CORTEX_MODULE_ENABLED
|
||||
//#define HAL_PCD_MODULE_ENABLED
|
||||
/* #define HAL_HCD_MODULE_ENABLED */
|
||||
/* #define HAL_FMPI2C_MODULE_ENABLED */
|
||||
/* #define HAL_SPDIFRX_MODULE_ENABLED */
|
||||
/* #define HAL_DFSDM_MODULE_ENABLED */
|
||||
/* #define HAL_LPTIM_MODULE_ENABLED */
|
||||
/* #define HAL_MMC_MODULE_ENABLED */
|
||||
|
||||
/* ########################## HSE/HSI Values adaptation ##################### */
|
||||
/**
|
||||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI) value.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value.
|
||||
*/
|
||||
#if !defined (LSI_VALUE)
|
||||
#define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature.*/
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief External clock source for I2S peripheral
|
||||
* This value is used by the I2S HAL module to compute the I2S clock source
|
||||
* frequency, this source is inserted directly through I2S_CKIN pad.
|
||||
*/
|
||||
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||
#define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/
|
||||
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||
|
||||
/* ########################### System Configuration ######################### */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */
|
||||
#define USE_RTOS 0U
|
||||
#define PREFETCH_ENABLE 1U
|
||||
#define INSTRUCTION_CACHE_ENABLE 1U
|
||||
#define DATA_CACHE_ENABLE 1U
|
||||
|
||||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
|
||||
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
|
||||
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
|
||||
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
|
||||
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
|
||||
#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */
|
||||
#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */
|
||||
#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */
|
||||
#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */
|
||||
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
|
||||
#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */
|
||||
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
|
||||
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
|
||||
#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */
|
||||
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
|
||||
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
|
||||
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
|
||||
#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */
|
||||
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
|
||||
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
|
||||
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
|
||||
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */
|
||||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
|
||||
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */
|
||||
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
|
||||
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
|
||||
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
|
||||
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
|
||||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
|
||||
#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
|
||||
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
|
||||
#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
|
||||
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
|
||||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
|
||||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
|
||||
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
|
||||
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
|
||||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1U */
|
||||
|
||||
/* ################## Ethernet peripheral configuration ##################### */
|
||||
|
||||
/* Section 1 : Ethernet peripheral configuration */
|
||||
|
||||
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
|
||||
#define MAC_ADDR0 2U
|
||||
#define MAC_ADDR1 0U
|
||||
#define MAC_ADDR2 0U
|
||||
#define MAC_ADDR3 0U
|
||||
#define MAC_ADDR4 0U
|
||||
#define MAC_ADDR5 0U
|
||||
|
||||
/* Definition of the Ethernet driver buffers size and count */
|
||||
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
|
||||
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
|
||||
#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
|
||||
#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
|
||||
|
||||
/* Section 2: PHY configuration section */
|
||||
|
||||
/* DP83848_PHY_ADDRESS Address*/
|
||||
#define DP83848_PHY_ADDRESS 0x01U
|
||||
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
|
||||
#define PHY_RESET_DELAY ((uint32_t)0x000000FFU)
|
||||
/* PHY Configuration delay */
|
||||
#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU)
|
||||
|
||||
#define PHY_READ_TO ((uint32_t)0x0000FFFFU)
|
||||
#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU)
|
||||
|
||||
/* Section 3: Common PHY Registers */
|
||||
|
||||
#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */
|
||||
#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */
|
||||
|
||||
#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
|
||||
#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
|
||||
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
|
||||
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */
|
||||
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */
|
||||
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */
|
||||
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */
|
||||
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */
|
||||
#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */
|
||||
#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */
|
||||
|
||||
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */
|
||||
#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */
|
||||
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
|
||||
|
||||
/* Section 4: Extended PHY Registers */
|
||||
#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
|
||||
|
||||
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
|
||||
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
|
||||
|
||||
/* ################## SPI peripheral configuration ########################## */
|
||||
|
||||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||
* Activated: CRC code is present inside driver
|
||||
* Deactivated: CRC code cleaned from driver
|
||||
*/
|
||||
|
||||
#define USE_SPI_CRC 0U
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_exti.h"
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_can.h"
|
||||
#endif /* HAL_CAN_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_can_legacy.h"
|
||||
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cryp.h"
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA2D_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dma2d.h"
|
||||
#endif /* HAL_DMA2D_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DCMI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dcmi.h"
|
||||
#endif /* HAL_DCMI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_eth.h"
|
||||
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sram.h"
|
||||
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NOR_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_nor.h"
|
||||
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NAND_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_nand.h"
|
||||
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCCARD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pccard.h"
|
||||
#endif /* HAL_PCCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SDRAM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sdram.h"
|
||||
#endif /* HAL_SDRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HASH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_hash.h"
|
||||
#endif /* HAL_HASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMBUS_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_smbus.h"
|
||||
#endif /* HAL_SMBUS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_i2s.h"
|
||||
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LTDC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_ltdc.h"
|
||||
#endif /* HAL_LTDC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rng.h"
|
||||
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SAI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sai.h"
|
||||
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sd.h"
|
||||
#endif /* HAL_SD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HCD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_hcd.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DSI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dsi.h"
|
||||
#endif /* HAL_DSI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_QSPI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_qspi.h"
|
||||
#endif /* HAL_QSPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CEC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cec.h"
|
||||
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FMPI2C_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_fmpi2c.h"
|
||||
#endif /* HAL_FMPI2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPDIFRX_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_spdifrx.h"
|
||||
#endif /* HAL_SPDIFRX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DFSDM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dfsdm.h"
|
||||
#endif /* HAL_DFSDM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_lptim.h"
|
||||
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_MMC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_mmc.h"
|
||||
#endif /* HAL_MMC_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t *file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F4xx_HAL_CONF_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
@@ -0,0 +1,206 @@
|
||||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Abstract : Linker script for STM32F407ZGTx Device with
|
||||
** 1024KByte FLASH, 128KByte RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
**
|
||||
** Distribution: The file is distributed as is, without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© COPYRIGHT(c) 2014 Ac6</center></h2>
|
||||
**
|
||||
** Redistribution and use in source and binary forms, with or without modification,
|
||||
** are permitted provided that the following conditions are met:
|
||||
** 1. Redistributions of source code must retain the above copyright notice,
|
||||
** this list of conditions and the following disclaimer.
|
||||
** 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
** this list of conditions and the following disclaimer in the documentation
|
||||
** and/or other materials provided with the distribution.
|
||||
** 3. Neither the name of Ac6 nor the names of its contributors
|
||||
** may be used to endorse or promote products derived from this software
|
||||
** without specific prior written permission.
|
||||
**
|
||||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x20020000; /* end of RAM */
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x200;; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400;; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x800C000, LENGTH = 512K-48K
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
|
||||
CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 64K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text ALIGN(4):
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata ALIGN(4):
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
|
||||
.ARM : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >FLASH
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >FLASH
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM AT> FLASH
|
||||
|
||||
_siccmram = LOADADDR(.ccmram);
|
||||
|
||||
/* CCM-RAM section
|
||||
*
|
||||
* IMPORTANT NOTE!
|
||||
* If initialized variables will be placed in this section,
|
||||
* the startup code needs to be modified to copy the init-values.
|
||||
*/
|
||||
.ccmram :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sccmram = .; /* create a global symbol at ccmram start */
|
||||
*(.ccmram)
|
||||
*(.ccmram*)
|
||||
|
||||
. = ALIGN(4);
|
||||
_eccmram = .; /* create a global symbol at ccmram end */
|
||||
} >CCMRAM AT> FLASH
|
||||
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(4);
|
||||
} >RAM
|
||||
|
||||
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
@@ -0,0 +1,228 @@
|
||||
/*
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2017, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#include "variant.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "pins_arduino.h"
|
||||
|
||||
|
||||
// Pin number
|
||||
// This array allows to wrap Arduino pin number(Dx or x)
|
||||
// to STM32 PinName (PX_n)
|
||||
const PinName digitalPin[] = {
|
||||
PC_13, //D0
|
||||
PC_14, //D1 - OSC32_IN
|
||||
PC_15, //D2 - OSC32_OUT
|
||||
PH_0, //D3 - OSC_IN
|
||||
PH_1, //D4 - OSC_OUT
|
||||
PB_2, //D21 - BOOT1
|
||||
PB_10, //D22 - 1:SPI2_SCK / I2C2_SCL / USART3_TX / TIM2_CH3
|
||||
PB_11, //D23 - 1:I2C2_SDA / USART3_RX / TIM2_CH4
|
||||
PB_12, //D24 - 1:SPI2_NSS / OTG_HS_ID
|
||||
PB_13, //D25 - 1:SPI2_SCK 2:OTG_HS_VBUS
|
||||
PB_14, //D26 - 1:SPI2_MISO / TIM12_CH1 / OTG_HS_DM
|
||||
PB_15, //D27 - SPI2_MOSI / TIM12_CH2 / OTG_HS_DP
|
||||
PC_6, //D28 - 1:TIM8_CH1 / SDIO_D6 / USART6_TX / TIM3_CH1
|
||||
PC_7, //D29 - 1:TIM8_CH2 / SDIO_D7 / USART6_RX / TIM3_CH2
|
||||
PC_8, //D30 - 1:TIM8_CH3 / SDIO_D0 / TIM3_CH3
|
||||
PC_9, //D31 - 1:TIM8_CH4 / SDIO_D1 / TIM3_CH4
|
||||
PA_8, //D32 - 1:TIM1_CH1 / I2C3_SCL / OTG_FS_SOF
|
||||
PA_9, //D33 - 1:USART1_TX / TIM1_CH2 2:OTG_FS_VBUS
|
||||
PA_10, //34 - 1:USART1_RX / TIM1_CH3 / OTG_FS_ID
|
||||
PA_11, //D35 - 1:TIM1_CH4 / OTG_FS_DM
|
||||
PA_12, //D36 - 1:OTG_FS_DP
|
||||
PA_13, //D37 - 0:JTMS-SWDIO
|
||||
PA_14, //D38 - 0:JTCK-SWCLK
|
||||
PA_15, //D39 - 0:JTDI 1:SPI3_NSS / SPI1_NSS
|
||||
PC_10, //D40 - 1:UART4_TX / SPI3_SCK / SDIO_D2 / USART3_TX
|
||||
PC_11, //D41 - 1:UART4_RX / SPI3_MISO / SDIO_D3 / USART3_RX
|
||||
PC_12, //D42 - 1:UART5_TX / SPI3_MOSI / SDIO_CK
|
||||
PD_2, //D43 - 1:UART5_RX / SDIO_CMD
|
||||
PB_3, //D44 - 0:JTDO 1:SPI3_SCK / TIM2_CH2 / SPI1_SCK
|
||||
PB_4, //D45 - 0:NJTRST 1:SPI3_MISO / TIM3_CH1 / SPI1_MISO
|
||||
PB_5, //D45 - 1:TIM3_CH2 / SPI1_MOSI / SPI3_MOSI
|
||||
PB_6, //D47 - 1:I2C1_SCL / TIM4_CH1 / USART1_TX
|
||||
PB_7, //D48 - 1:I2C1_SDA / TIM4_CH2 / USART1_RX
|
||||
PB_8, //D49 - 1:I2C1_SCL / TIM4_CH3 / SDIO_D4 / TIM10_CH1
|
||||
PB_9, //D50 - 1:I2C1_SDA / TIM4_CH4 / SDIO_D5 / TIM11_CH1 / SPI2_NSS
|
||||
PE_2, //D51 - 1:FSMC_A23
|
||||
PE_3, //D52 - 1:FSMC_A19
|
||||
PE_4, //D53 - 1:FSMC_A20
|
||||
PE_5, //D54 - 1:FSMC_A21
|
||||
PE_6, //D55 - 1:FSMC_A22
|
||||
PE_7, //D56 - 1:FSMC_D4
|
||||
PE_8, //D57 - 1:FSMC_D5
|
||||
PE_9, //D58 - 1:FSMC_D6 / TIM1_CH1
|
||||
PE_10, //D59 - 1:FSMC_D7
|
||||
PE_11, //D60 - 1:FSMC_D8 / TIM1_CH2
|
||||
PE_12, //D61 - 1:FSMC_D9
|
||||
PE_13, //D62 - 1:FSMC_D10 / TIM1_CH3
|
||||
PE_14, //D63 - 1:FSMC_D11 / TIM1_CH4
|
||||
PE_15, //D64 - 1:FSMC_D12
|
||||
PD_8, //D65 - 1:FSMC_D13 / USART3_TX
|
||||
PD_9, //D66 - 1:FSMC_D14 / USART3_RX
|
||||
PD_10, //D67 - 1:FSMC_D15
|
||||
PD_11, //D68 - 1:FSMC_A16
|
||||
PD_12, //D69 - 1:FSMC_A17 / TIM4_CH1
|
||||
PD_13, //D70 - 1:FSMC_A18 / TIM4_CH2
|
||||
PD_14, //D71 - 1:FSMC_D0 / TIM4_CH3
|
||||
PD_15, //D72 - 1:FSMC_D1 / TIM4_CH4
|
||||
PD_0, //D73 - 1:FSMC_D2
|
||||
PD_1, //D74 - 1:FSMC_D3
|
||||
PD_3, //D75 - 1:FSMC_CLK
|
||||
PD_4, //D76 - 1:FSMC_NOE
|
||||
PD_5, //D77 - 1:USART2_TX
|
||||
PD_6, //D78 - 1:USART2_RX
|
||||
PD_7, //D79
|
||||
PE_0, //D80
|
||||
PE_1, //D81
|
||||
PF_0, //D82 - 1:FSMC_A0 / I2C2_SDA
|
||||
PF_1, //D83 - 1:FSMC_A1 / I2C2_SCL
|
||||
PF_2, //D84 - 1:FSMC_A2
|
||||
PF_11, //D93
|
||||
PF_12, //D94 - 1:FSMC_A6
|
||||
PF_13, //D95 - 1:FSMC_A7
|
||||
PF_14, //D96 - 1:FSMC_A8
|
||||
PF_15, //D97 - 1:FSMC_A9
|
||||
PG_0, //D98 - 1:FSMC_A10
|
||||
PG_1, //D99 - 1:FSMC_A11
|
||||
PG_2, //D100 - 1:FSMC_A12
|
||||
PG_3, //D101 - 1:FSMC_A13
|
||||
PG_4, //D102 - 1:FSMC_A14
|
||||
PG_5, //D103 - 1:FSMC_A15
|
||||
PG_6, //D104
|
||||
PG_7, //D105
|
||||
PG_8, //D106
|
||||
PG_9, //D107 - 1:USART6_RX
|
||||
PG_10, //D108 - 1:FSMC_NE3
|
||||
PG_11, //D109
|
||||
PG_12, //D110 - 1:FSMC_NE4
|
||||
PG_13, //D111 - 1:FSMC_A24
|
||||
PG_14, //D112 - 1:FSMC_A25 / USART6_TX
|
||||
PG_15, //D113
|
||||
PA_0, //D140/A0 = D9 - 1:UART4_TX / TIM5_CH1 2:ADC123_IN0
|
||||
PA_1, //D141/A1 = D10 - 1:UART4_RX / TIM5_CH2 / TIM2_CH2 2:ADC123_IN1
|
||||
PA_2, //D142/A2 = D11 - 1:USART2_TX /TIM5_CH3 / TIM9_CH1 / TIM2_CH3 2:ADC123_IN2
|
||||
PA_3, //D143/A3 = D12 - 1:USART2_RX /TIM5_CH4 / TIM9_CH2 / TIM2_CH4 2:ADC123_IN3
|
||||
PA_4, //D144/A4 = D13 - NOT FT 1:SPI1_NSS / SPI3_NSS / USART2_CK 2:ADC12_IN4 / DAC_OUT1
|
||||
PA_5, //D145/A5 = D14 - NOT FT 1:SPI1_SCK 2:ADC12_IN5 / DAC_OUT2
|
||||
PA_6, //D146/A6 = D15 - 1:SPI1_MISO / TIM13_CH1 / TIM3_CH1 2:ADC12_IN6
|
||||
PA_7, //D147/A7 = D16 - 1:SPI1_MOSI / TIM14_CH1 / TIM3_CH2 2:ADC12_IN7
|
||||
PB_0, //D148/A8 = D19 - 1:TIM3_CH3 2:ADC12_IN8
|
||||
PB_1, //D149/A9 = D20 - 1:TIM3_CH4 2:ADC12_IN9
|
||||
PC_0, //D150/A10 = D5 - 1: 2:ADC123_IN10
|
||||
PC_1, //D151/A11 = D6 - 1: 2:ADC123_IN11
|
||||
PC_2, //D152/A12 = D7 - 1:SPI2_MISO 2:ADC123_IN12
|
||||
PC_3, //D153/A13 = D8 - 1:SPI2_MOSI 2:ADC123_IN13
|
||||
PC_4, //D154/A14 = D17 - 1: 2:ADC12_IN14
|
||||
PC_5, //D155/A15 = D18 - 1: 2:ADC12_IN15
|
||||
PF_3, //D156/A16 = D85 - 1:FSMC_A3 2:ADC3_IN9
|
||||
PF_4, //D157/A17 = D86 - 1:FSMC_A4 2:ADC3_IN14
|
||||
PF_5, //D158/A18 = D87 - 1:FSMC_A5 2:ADC3_IN15
|
||||
PF_6, //D159/A19 = D88 - 1:TIM10_CH1 2:ADC3_IN4
|
||||
PF_7, //D160/A20 = D89 - 1:TIM11_CH1 2:ADC3_IN5
|
||||
PF_8, //D161/A21 = D90 - 1:TIM13_CH1 2:ADC3_IN6
|
||||
PF_9, //D162/A22 = D91 - 1;TIM14_CH1 2:ADC3_IN7
|
||||
PF_10, //D163/A23 = D92 - 2:ADC3_IN8
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
// ------------------------
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
WEAK void SystemClock_Config(void)
|
||||
{
|
||||
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||
|
||||
/**Configure the main internal regulator output voltage
|
||||
*/
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||
|
||||
/**Initializes the CPU, AHB and APB busses clocks
|
||||
*/
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 8;
|
||||
RCC_OscInitStruct.PLL.PLLN = 336;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 7;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||
_Error_Handler(__FILE__, __LINE__);
|
||||
}
|
||||
|
||||
/**Initializes the CPU, AHB and APB busses clocks
|
||||
*/
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
|
||||
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
||||
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
|
||||
_Error_Handler(__FILE__, __LINE__);
|
||||
}
|
||||
|
||||
/**Configure the Systick interrupt time
|
||||
*/
|
||||
HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);
|
||||
|
||||
/**Configure the Systick
|
||||
*/
|
||||
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
|
||||
|
||||
/* SysTick_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
242
buildroot/share/PlatformIO/variants/MARLIN_MKS_ROBIN2/variant.h
Normal file
242
buildroot/share/PlatformIO/variants/MARLIN_MKS_ROBIN2/variant.h
Normal file
@@ -0,0 +1,242 @@
|
||||
|
||||
/*
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2017, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef _VARIANT_ARDUINO_STM32_
|
||||
#define _VARIANT_ARDUINO_STM32_
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Headers
|
||||
*----------------------------------------------------------------------------*/
|
||||
// #include "PeripheralPins.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif // __cplusplus
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Pins
|
||||
*----------------------------------------------------------------------------*/
|
||||
//extern const PinName digitalPin[];
|
||||
|
||||
#define PC13 0
|
||||
#define PC14 1 //OSC32_IN
|
||||
#define PC15 2 //OSC32_OUT
|
||||
#define PH0 3 //OSC_IN
|
||||
#define PH1 4 //OSC_OUT
|
||||
#define PB2 5 //BOOT1
|
||||
#define PB10 6 //1:SPI2_SCK / I2C2_SCL / USART3_TX / TIM2_CH3
|
||||
#define PB11 7 //1:I2C2_SDA / USART3_RX / TIM2_CH4
|
||||
#define PB12 8 //1:SPI2_NSS / OTG_HS_ID
|
||||
#define PB13 9 //1:SPI2_SCK 2:OTG_HS_VBUS
|
||||
#define PB14 10 //1:SPI2_MISO / TIM12_CH1 / OTG_HS_DM
|
||||
#define PB15 11 //SPI2_MOSI / TIM12_CH2 / OTG_HS_DP
|
||||
#define PC6 12 //1:TIM8_CH1 / SDIO_D6 / USART6_TX / TIM3_CH1
|
||||
#define PC7 13 //1:TIM8_CH2 / SDIO_D7 / USART6_RX / TIM3_CH2
|
||||
#define PC8 14 //1:TIM8_CH3 / SDIO_D0 / TIM3_CH3
|
||||
#define PC9 15 //1:TIM8_CH4 / SDIO_D1 / TIM3_CH4
|
||||
#define PA8 16 //1:TIM1_CH1 / I2C3_SCL / OTG_FS_SOF
|
||||
#define PA9 17 //1:USART1_TX / TIM1_CH2 2:OTG_FS_VBUS
|
||||
#define PA10 18 //1:USART1_RX / TIM1_CH3 / OTG_FS_ID
|
||||
#define PA11 19 //1:TIM1_CH4 / OTG_FS_DM
|
||||
#define PA12 20 //1:OTG_FS_DP
|
||||
#define PA13 21 //0:JTMS-SWDIO
|
||||
#define PA14 22 //0:JTCK-SWCLK
|
||||
#define PA15 23 //0:JTDI 1:SPI3_NSS / SPI1_NSS
|
||||
#define PC10 24 //1:UART4_TX / SPI3_SCK / SDIO_D2 / USART3_TX
|
||||
#define PC11 25 //1:UART4_RX / SPI3_MISO / SDIO_D3 / USART3_RX
|
||||
#define PC12 26 //1:UART5_TX / SPI3_MOSI / SDIO_CK
|
||||
#define PD2 27 //1:UART5_RX / SDIO_CMD
|
||||
#define PB3 28 //0:JTDO 1:SPI3_SCK / TIM2_CH2 / SPI1_SCK
|
||||
#define PB4 29 //0:NJTRST 1:SPI3_MISO / TIM3_CH1 / SPI1_MISO
|
||||
#define PB5 30 //1:TIM3_CH2 / SPI1_MOSI / SPI3_MOSI
|
||||
#define PB6 31 //1:I2C1_SCL / TIM4_CH1 / USART1_TX
|
||||
#define PB7 32 //1:I2C1_SDA / TIM4_CH2 / USART1_RX
|
||||
#define PB8 33 //1:I2C1_SCL / TIM4_CH3 / SDIO_D4 / TIM10_CH1
|
||||
#define PB9 34 //1:I2C1_SDA / TIM4_CH4 / SDIO_D5 / TIM11_CH1 / SPI2_NSS
|
||||
#define PE2 35 //1:FSMC_A23
|
||||
#define PE3 36 //1:FSMC_A19
|
||||
#define PE4 37 //1:FSMC_A20
|
||||
#define PE5 38 //1:FSMC_A21
|
||||
#define PE6 39 //1:FSMC_A22
|
||||
#define PE7 40 //1:FSMC_D4
|
||||
#define PE8 41 //1:FSMC_D5
|
||||
#define PE9 42 //1:FSMC_D6 / TIM1_CH1
|
||||
#define PE10 43 //1:FSMC_D7
|
||||
#define PE11 44 //1:FSMC_D8 / TIM1_CH2
|
||||
#define PE12 45 //1:FSMC_D9
|
||||
#define PE13 46 //1:FSMC_D10 / TIM1_CH3
|
||||
#define PE14 47 //1:FSMC_D11 / TIM1_CH4
|
||||
#define PE15 48 //1:FSMC_D12
|
||||
#define PD8 49 //1:FSMC_D13 / USART3_TX
|
||||
#define PD9 50 //1:FSMC_D14 / USART3_RX
|
||||
#define PD10 51 //1:FSMC_D15
|
||||
#define PD11 52 //1:FSMC_A16
|
||||
#define PD12 53 //1:FSMC_A17 / TIM4_CH1
|
||||
#define PD13 54 //1:FSMC_A18 / TIM4_CH2
|
||||
#define PD14 55 //1:FSMC_D0 / TIM4_CH3
|
||||
#define PD15 56 //1:FSMC_D1 / TIM4_CH4
|
||||
#define PD0 57 //1:FSMC_D2
|
||||
#define PD1 58 //1:FSMC_D3
|
||||
#define PD3 59 //1:FSMC_CLK
|
||||
#define PD4 60 //1:FSMC_NOE
|
||||
#define PD5 61 //1:USART2_TX
|
||||
#define PD6 62 //1:USART2_RX
|
||||
#define PD7 63
|
||||
#define PE0 64
|
||||
#define PE1 65
|
||||
#define PF0 66 //1:FSMC_A0 / I2C2_SDA
|
||||
#define PF1 67 //1:FSMC_A1 / I2C2_SCL
|
||||
#define PF2 68 //1:FSMC_A2
|
||||
#define PF11 69
|
||||
#define PF12 70 //1:FSMC_A6
|
||||
#define PF13 71 //1:FSMC_A7
|
||||
#define PF14 72 //1:FSMC_A8
|
||||
#define PF15 73 //1:FSMC_A9
|
||||
#define PG0 74 //1:FSMC_A10
|
||||
#define PG1 75 //1:FSMC_A11
|
||||
#define PG2 76 //1:FSMC_A12
|
||||
#define PG3 77 //1:FSMC_A13
|
||||
#define PG4 78 //1:FSMC_A14
|
||||
#define PG5 79 //1:FSMC_A15
|
||||
#define PG6 80
|
||||
#define PG7 81
|
||||
#define PG8 82
|
||||
#define PG9 83 //1:USART6_RX
|
||||
#define PG10 84 //1:FSMC_NE3
|
||||
#define PG11 85
|
||||
#define PG12 86 //1:FSMC_NE4
|
||||
#define PG13 87 //1:FSMC_A24
|
||||
#define PG14 88 //1:FSMC_A25 / USART6_TX
|
||||
#define PG15 89
|
||||
#define PA0 90 //1:UART4_TX / TIM5_CH1 2:ADC123_IN0
|
||||
#define PA1 91 //1:UART4_RX / TIM5_CH2 / TIM2_CH2 2:ADC123_IN1
|
||||
#define PA2 92 //1:USART2_TX /TIM5_CH3 / TIM9_CH1 / TIM2_CH3 2:ADC123_IN2
|
||||
#define PA3 93 //1:USART2_RX /TIM5_CH4 / TIM9_CH2 / TIM2_CH4 2:ADC123_IN3
|
||||
#define PA4 94 //NOT FT 1:SPI1_NSS / SPI3_NSS / USART2_CK 2:ADC12_IN4 / DAC_OUT1
|
||||
#define PA5 95 //NOT FT 1:SPI1_SCK 2:ADC12_IN5 / DAC_OUT2
|
||||
#define PA6 96 //1:SPI1_MISO / TIM13_CH1 / TIM3_CH1 2:ADC12_IN6
|
||||
#define PA7 97 //1:SPI1_MOSI / TIM14_CH1 / TIM3_CH2 2:ADC12_IN7
|
||||
#define PB0 98 //1:TIM3_CH3 2:ADC12_IN8
|
||||
#define PB1 99 //1:TIM3_CH4 2:ADC12_IN9
|
||||
#define PC0 100 //1: 2:ADC123_IN10
|
||||
#define PC1 101 //1: 2:ADC123_IN11
|
||||
#define PC2 102 //1:SPI2_MISO 2:ADC123_IN12
|
||||
#define PC3 103 //1:SPI2_MOSI 2:ADC123_IN13
|
||||
#define PC4 104 //1: 2:ADC12_IN14
|
||||
#define PC5 105 //1: 2:ADC12_IN15
|
||||
#define PF3 106 //1:FSMC_A3 2:ADC3_IN9
|
||||
#define PF4 107 //1:FSMC_A4 2:ADC3_IN14
|
||||
#define PF5 108 //1:FSMC_A5 2:ADC3_IN15
|
||||
#define PF6 109 //1:TIM10_CH1 2:ADC3_IN4
|
||||
#define PF7 110 //1:TIM11_CH1 2:ADC3_IN5
|
||||
#define PF8 111 //1:TIM13_CH1 2:ADC3_IN6
|
||||
#define PF9 112 //1;TIM14_CH1 2:ADC3_IN7
|
||||
#define PF10 113 //2:ADC3_IN8
|
||||
|
||||
// This must be a literal
|
||||
#define NUM_DIGITAL_PINS 114
|
||||
// This must be a literal with a value less than or equal to MAX_ANALOG_INPUTS
|
||||
#define NUM_ANALOG_INPUTS 24
|
||||
#define NUM_ANALOG_FIRST 90
|
||||
|
||||
// Below ADC, DAC and PWM definitions already done in the core
|
||||
// Could be redefined here if needed
|
||||
// ADC resolution is 12bits
|
||||
//#define ADC_RESOLUTION 12
|
||||
//#define DACC_RESOLUTION 12
|
||||
|
||||
// PWM resolution
|
||||
#define PWM_RESOLUTION 8
|
||||
#define PWM_FREQUENCY 20000
|
||||
#define PWM_MAX_DUTY_CYCLE 255
|
||||
|
||||
// Below SPI and I2C definitions already done in the core
|
||||
// Could be redefined here if differs from the default one
|
||||
// SPI Definitions
|
||||
#define PIN_SPI_MOSI PB15
|
||||
#define PIN_SPI_MISO PB14
|
||||
#define PIN_SPI_SCK PB13
|
||||
#define PIN_SPI_SS PB12
|
||||
|
||||
// I2C Definitions
|
||||
#define PIN_WIRE_SDA PB7
|
||||
#define PIN_WIRE_SCL PB6
|
||||
|
||||
// Timer Definitions
|
||||
//Do not use timer used by PWM pins when possible. See PinMap_PWM in PeripheralPins.c
|
||||
#define TIMER_TONE TIM6
|
||||
|
||||
// Do not use basic timer: OC is required
|
||||
#define TIMER_SERVO TIM2 //TODO: advanced-control timers don't work
|
||||
|
||||
// UART Definitions
|
||||
// Define here Serial instance number to map on Serial generic name
|
||||
#define SERIAL_UART_INSTANCE 3 //ex: 2 for Serial2 (USART2)
|
||||
// DEBUG_UART could be redefined to print on another instance than 'Serial'
|
||||
//#define DEBUG_UART ((USART_TypeDef *) U(S)ARTX) // ex: USART3
|
||||
// DEBUG_UART baudrate, default: 9600 if not defined
|
||||
//#define DEBUG_UART_BAUDRATE x
|
||||
// DEBUG_UART Tx pin name, default: the first one found in PinMap_UART_TX for DEBUG_UART
|
||||
//#define DEBUG_PINNAME_TX PX_n // PinName used for TX
|
||||
|
||||
// Default pin used for 'Serial' instance (ex: ST-Link)
|
||||
// Mandatory for Firmata
|
||||
#define PIN_SERIAL_RX PB11//PA10
|
||||
#define PIN_SERIAL_TX PB10//PA9
|
||||
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
// These serial port names are intended to allow libraries and architecture-neutral
|
||||
// sketches to automatically default to the correct port name for a particular type
|
||||
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
|
||||
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
|
||||
//
|
||||
// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
|
||||
//
|
||||
// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
|
||||
//
|
||||
// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
|
||||
//
|
||||
// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
|
||||
//
|
||||
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
|
||||
// pins are NOT connected to anything by default.
|
||||
#define SERIAL_PORT_MONITOR Serial
|
||||
#define SERIAL_PORT_HARDWARE Serial1
|
||||
#endif
|
||||
|
||||
#endif /* _VARIANT_ARDUINO_STM32_ */
|
@@ -167,6 +167,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
@@ -121,6 +121,7 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
Reference in New Issue
Block a user