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Merge upstream changes from Marlin 2.1.2.1

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This commit is contained in:
Stefan Kalscheuer
2023-05-26 18:48:34 +02:00
parent 22dedaeb81
commit f92a587638
620 changed files with 41015 additions and 28889 deletions
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2
buildroot/share/PlatformIO/variants/MARLIN_G0B1RE/PeripheralPins.c
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@@ -218,6 +218,7 @@ WEAK const PinMap PinMap_UART_TX[] = {
{PC_12, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART5)},
{PD_3, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART5)},
{PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART2)},
{PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
{PF_2, LPUART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_LPUART2)},
{NC, NP, 0}
};
@@ -252,6 +253,7 @@ WEAK const PinMap PinMap_UART_RX[] = {
{PC_11_ALT1, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART4)},
{PD_2, USART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART5)},
{PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART2)},
{PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
{NC, NP, 0}
};
#endif

9
buildroot/share/PlatformIO/variants/MARLIN_G0B1RE/variant_MARLIN_STM32G0B1RE.cpp
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@@ -130,14 +130,7 @@ WEAK void SystemClock_Config(void)
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
// Reset clock registers (in case bootloader has changed them)
RCC->CR |= RCC_CR_HSION;
while (!(RCC->CR & RCC_CR_HSIRDY))
;
RCC->CFGR = 0x00000000;
RCC->CR = RCC_CR_HSION;
while (RCC->CR & RCC_CR_PLLRDY)
;
RCC->PLLCFGR = 0x00001000;
SystemInit();
/** Configure the main internal regulator output voltage
*/